48 lines
2.0 KiB
Diff
48 lines
2.0 KiB
Diff
From 01fc1c24b9a03c519efae4d006a71c350c0529fa Mon Sep 17 00:00:00 2001
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From: Soby Mathew <soby.mathew@arm.com>
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Date: Fri, 16 Nov 2018 15:43:34 +0000
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Subject: [PATCH] BL31: Use helper function to save registers in SMC handler
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Use the helper function `save_gp_registers` to save the register
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state to cpu_context on entry to EL3 in SMC handler. This has the
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effect of saving x0 - x3 as well into the cpu_context which was
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not done previously but it unifies the register save sequence
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in BL31.
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Change-Id: I5753c942263a5f9178deda3dba896e3220f3dd83
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Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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---
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bl31/aarch64/runtime_exceptions.S | 18 +-----------------
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1 file changed, 1 insertion(+), 17 deletions(-)
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diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
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index 54db6814d5..77bd63ec08 100644
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--- a/bl31/aarch64/runtime_exceptions.S
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+++ b/bl31/aarch64/runtime_exceptions.S
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@@ -356,24 +356,8 @@ smc_handler64:
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* We already have x0-x4 in place. x5 will point to a cookie (not used
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* now). x6 will point to the context structure (SP_EL3) and x7 will
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* contain flags we need to pass to the handler.
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- *
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- * Save x4-x29 and sp_el0.
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*/
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- stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
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- stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6]
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- stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
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- stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10]
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- stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12]
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- stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14]
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- stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
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- stp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18]
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- stp x20, x21, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X20]
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- stp x22, x23, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X22]
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- stp x24, x25, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X24]
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- stp x26, x27, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X26]
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- stp x28, x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X28]
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- mrs x18, sp_el0
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- str x18, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_SP_EL0]
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+ bl save_gp_registers
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mov x5, xzr
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mov x6, sp
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