From 961b89322f558eb63ab752876a995068fac6cd8f Mon Sep 17 00:00:00 2001 From: Xing Li Date: Wed, 21 Dec 2022 09:05:30 +0800 Subject: [PATCH] Add LoongArch support --- bfd/Makefile.am | 17 +- bfd/Makefile.in | 21 +- bfd/archures.c | 5 + bfd/bfd-in2.h | 85 + bfd/config.bfd | 15 + bfd/configure | 2 + bfd/configure.ac | 2 + bfd/cpu-loongarch.c | 61 + bfd/elf-bfd.h | 9 + bfd/elf.c | 109 + bfd/elfnn-loongarch.c | 4159 +++++++++++++++++ bfd/elfxx-loongarch.c | 1618 +++++++ bfd/elfxx-loongarch.h | 45 + bfd/libbfd.h | 80 + bfd/po/BLD-POTFILES.in | 2 + bfd/po/SRC-POTFILES.in | 1 + bfd/reloc.c | 171 + bfd/targets.c | 8 + binutils/readelf.c | 26 + binutils/testsuite/binutils-all/objdump.exp | 2 +- gas/Makefile.am | 17 +- gas/Makefile.in | 24 +- gas/config/loongarch-lex-wrapper.c | 20 + gas/config/loongarch-lex.h | 37 + gas/config/loongarch-lex.l | 61 + gas/config/loongarch-parse.y | 407 ++ gas/config/tc-loongarch.c | 1385 ++++++ gas/config/tc-loongarch.h | 93 + gas/configure | 9 + gas/configure.ac | 9 + gas/configure.tgt | 5 +- gas/doc/as.texi | 31 + gas/doc/c-loongarch.texi | 39 + gas/po/POTFILES.in | 1 + gas/testsuite/gas/all/gas.exp | 3 +- gas/testsuite/gas/elf/bad-bss.d | 2 +- gas/testsuite/gas/elf/bss.d | 2 +- gas/testsuite/gas/elf/elf.exp | 1 + gas/testsuite/gas/loongarch/4opt_op.d | 70 + gas/testsuite/gas/loongarch/4opt_op.s | 61 + gas/testsuite/gas/loongarch/bfd_reloc_8.s | 16 + gas/testsuite/gas/loongarch/fix_op.d | 134 + gas/testsuite/gas/loongarch/fix_op.s | 125 + gas/testsuite/gas/loongarch/float_op.d | 85 + gas/testsuite/gas/loongarch/float_op.s | 76 + gas/testsuite/gas/loongarch/imm_op.d | 48 + gas/testsuite/gas/loongarch/imm_op.s | 39 + gas/testsuite/gas/loongarch/jmp_op.d | 30 + gas/testsuite/gas/loongarch/jmp_op.s | 22 + gas/testsuite/gas/loongarch/load_store_op.d | 178 + gas/testsuite/gas/loongarch/load_store_op.s | 169 + gas/testsuite/gas/loongarch/loongarch.exp | 24 + gas/testsuite/gas/loongarch/macro_op.d | 59 + gas/testsuite/gas/loongarch/macro_op.s | 15 + gas/testsuite/gas/loongarch/macro_op_32.d | 55 + gas/testsuite/gas/loongarch/macro_op_32.s | 16 + .../gas/loongarch/macro_op_large_abs.d | 77 + .../gas/loongarch/macro_op_large_abs.s | 9 + .../gas/loongarch/macro_op_large_pc.d | 77 + .../gas/loongarch/macro_op_large_pc.s | 9 + gas/testsuite/gas/loongarch/nop.d | 10 + gas/testsuite/gas/loongarch/nop.s | 2 + gas/testsuite/gas/loongarch/privilege_op.d | 44 + gas/testsuite/gas/loongarch/privilege_op.s | 35 + gas/testsuite/gas/loongarch/reloc.d | 167 + gas/testsuite/gas/loongarch/reloc.s | 144 + gas/testsuite/gas/loongarch/syscall.d | 11 + gas/testsuite/gas/loongarch/syscall.s | 2 + gas/testsuite/lib/gas-defs.exp | 4 + include/dis-asm.h | 1 + include/elf/common.h | 12 +- include/elf/loongarch.h | 265 ++ include/opcode/loongarch.h | 239 + ld/Makefile.am | 4 + ld/Makefile.in | 5 + ld/configure.tgt | 4 + ld/emulparams/elf32loongarch-defs.sh | 36 + ld/emulparams/elf32loongarch.sh | 11 + ld/emulparams/elf64loongarch-defs.sh | 39 + ld/emulparams/elf64loongarch.sh | 11 + ld/emultempl/loongarchelf.em | 87 + ld/po/BLD-POTFILES.in | 2 + ld/testsuite/ld-elf/pr21884.d | 2 +- ld/testsuite/ld-elf/shared.exp | 5 +- ld/testsuite/ld-loongarch-elf/attr-ifunc-4.c | 23 + .../ld-loongarch-elf/attr-ifunc-4.out | 1 + .../ld-loongarch-elf/cmodel-libjirl.dd | 4 + ld/testsuite/ld-loongarch-elf/cmodel.exp | 37 + ld/testsuite/ld-loongarch-elf/disas-jirl-32.d | 15 + ld/testsuite/ld-loongarch-elf/disas-jirl-32.s | 5 + ld/testsuite/ld-loongarch-elf/disas-jirl.d | 14 + ld/testsuite/ld-loongarch-elf/disas-jirl.s | 5 + ld/testsuite/ld-loongarch-elf/ifunc.exp | 34 + ld/testsuite/ld-loongarch-elf/jmp_op.d | 30 + ld/testsuite/ld-loongarch-elf/jmp_op.s | 22 + .../ld-loongarch-elf/ld-loongarch-elf.exp | 42 + ld/testsuite/ld-loongarch-elf/libjirl.s | 2 + .../ld-loongarch-elf/libnopic-global.s | 113 + .../ld-loongarch-elf/local-ifunc-reloc.d | 10 + .../ld-loongarch-elf/local-ifunc-reloc.s | 28 + ld/testsuite/ld-loongarch-elf/macro_op.d | 164 + ld/testsuite/ld-loongarch-elf/macro_op.s | 30 + ld/testsuite/ld-loongarch-elf/macro_op_32.d | 55 + ld/testsuite/ld-loongarch-elf/macro_op_32.s | 16 + .../ld-loongarch-elf/nopic-global-so.rd | 5 + .../ld-loongarch-elf/nopic-global-so.sd | 10 + .../ld-loongarch-elf/nopic-global.out | 1 + ld/testsuite/ld-loongarch-elf/nopic-global.s | 373 ++ ld/testsuite/ld-loongarch-elf/nopic-global.sd | 5 + ld/testsuite/ld-loongarch-elf/nopic-global.xd | 3 + ld/testsuite/ld-loongarch-elf/nopic-local.out | 1 + ld/testsuite/ld-loongarch-elf/nopic-local.rd | 0 ld/testsuite/ld-loongarch-elf/nopic-local.s | 383 ++ ld/testsuite/ld-loongarch-elf/nopic-local.sd | 5 + ld/testsuite/ld-loongarch-elf/nopic-local.xd | 3 + .../ld-loongarch-elf/nopic-weak-global-so.rd | 5 + .../ld-loongarch-elf/nopic-weak-global-so.sd | 10 + .../ld-loongarch-elf/nopic-weak-global.out | 1 + .../ld-loongarch-elf/nopic-weak-global.s | 374 ++ .../ld-loongarch-elf/nopic-weak-global.sd | 5 + .../ld-loongarch-elf/nopic-weak-global.xd | 3 + .../ld-loongarch-elf/nopic-weak-local.out | 1 + .../ld-loongarch-elf/nopic-weak-local.rd | 0 .../ld-loongarch-elf/nopic-weak-local.s | 383 ++ .../ld-loongarch-elf/nopic-weak-local.sd | 5 + .../ld-loongarch-elf/nopic-weak-local.xd | 3 + ld/testsuite/ld-loongarch-elf/pic.exp | 202 + ld/testsuite/ld-loongarch-elf/pic.ld | 18 + ld/testsuite/ld-loongarch-elf/syscall-0.s | 9 + ld/testsuite/ld-loongarch-elf/syscall-1.s | 20 + ld/testsuite/ld-loongarch-elf/syscall.d | 5 + ld/testsuite/ld-srec/srec.exp | 6 + ld/testsuite/ld-unique/pr21529.d | 2 +- opcodes/Makefile.am | 3 + opcodes/Makefile.in | 6 + opcodes/configure | 1 + opcodes/configure.ac | 1 + opcodes/disassemble.c | 9 + opcodes/disassemble.h | 1 + opcodes/loongarch-coder.c | 481 ++ opcodes/loongarch-dis.c | 342 ++ opcodes/loongarch-opc.c | 870 ++++ opcodes/po/POTFILES.in | 3 + 143 files changed, 15313 insertions(+), 15 deletions(-) create mode 100644 bfd/cpu-loongarch.c create mode 100644 bfd/elfnn-loongarch.c create mode 100644 bfd/elfxx-loongarch.c create mode 100644 bfd/elfxx-loongarch.h create mode 100644 gas/config/loongarch-lex-wrapper.c create mode 100644 gas/config/loongarch-lex.h create mode 100644 gas/config/loongarch-lex.l create mode 100644 gas/config/loongarch-parse.y create mode 100644 gas/config/tc-loongarch.c create mode 100644 gas/config/tc-loongarch.h create mode 100644 gas/doc/c-loongarch.texi create mode 100644 gas/testsuite/gas/loongarch/4opt_op.d create mode 100644 gas/testsuite/gas/loongarch/4opt_op.s create mode 100644 gas/testsuite/gas/loongarch/bfd_reloc_8.s create mode 100644 gas/testsuite/gas/loongarch/fix_op.d create mode 100644 gas/testsuite/gas/loongarch/fix_op.s create mode 100644 gas/testsuite/gas/loongarch/float_op.d create mode 100644 gas/testsuite/gas/loongarch/float_op.s create mode 100644 gas/testsuite/gas/loongarch/imm_op.d create mode 100644 gas/testsuite/gas/loongarch/imm_op.s create mode 100644 gas/testsuite/gas/loongarch/jmp_op.d create mode 100644 gas/testsuite/gas/loongarch/jmp_op.s create mode 100644 gas/testsuite/gas/loongarch/load_store_op.d create mode 100644 gas/testsuite/gas/loongarch/load_store_op.s create mode 100644 gas/testsuite/gas/loongarch/loongarch.exp create mode 100644 gas/testsuite/gas/loongarch/macro_op.d create mode 100644 gas/testsuite/gas/loongarch/macro_op.s create mode 100644 gas/testsuite/gas/loongarch/macro_op_32.d create mode 100644 gas/testsuite/gas/loongarch/macro_op_32.s create mode 100644 gas/testsuite/gas/loongarch/macro_op_large_abs.d create mode 100644 gas/testsuite/gas/loongarch/macro_op_large_abs.s create mode 100644 gas/testsuite/gas/loongarch/macro_op_large_pc.d create mode 100644 gas/testsuite/gas/loongarch/macro_op_large_pc.s create mode 100644 gas/testsuite/gas/loongarch/nop.d create mode 100644 gas/testsuite/gas/loongarch/nop.s create mode 100644 gas/testsuite/gas/loongarch/privilege_op.d create mode 100644 gas/testsuite/gas/loongarch/privilege_op.s create mode 100644 gas/testsuite/gas/loongarch/reloc.d create mode 100644 gas/testsuite/gas/loongarch/reloc.s create mode 100644 gas/testsuite/gas/loongarch/syscall.d create mode 100644 gas/testsuite/gas/loongarch/syscall.s create mode 100644 include/elf/loongarch.h create mode 100644 include/opcode/loongarch.h create mode 100644 ld/emulparams/elf32loongarch-defs.sh create mode 100644 ld/emulparams/elf32loongarch.sh create mode 100644 ld/emulparams/elf64loongarch-defs.sh create mode 100644 ld/emulparams/elf64loongarch.sh create mode 100644 ld/emultempl/loongarchelf.em create mode 100644 ld/testsuite/ld-loongarch-elf/attr-ifunc-4.c create mode 100644 ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out create mode 100644 ld/testsuite/ld-loongarch-elf/cmodel-libjirl.dd create mode 100644 ld/testsuite/ld-loongarch-elf/cmodel.exp create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl-32.d create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl-32.s create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.d create mode 100644 ld/testsuite/ld-loongarch-elf/disas-jirl.s create mode 100644 ld/testsuite/ld-loongarch-elf/ifunc.exp create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.d create mode 100644 ld/testsuite/ld-loongarch-elf/jmp_op.s create mode 100644 ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp create mode 100644 ld/testsuite/ld-loongarch-elf/libjirl.s create mode 100644 ld/testsuite/ld-loongarch-elf/libnopic-global.s create mode 100644 ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d create mode 100644 ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.s create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.d create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op.s create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op_32.d create mode 100644 ld/testsuite/ld-loongarch-elf/macro_op_32.s create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-global-so.rd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-global-so.sd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-global.out create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-global.s create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-global.sd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-global.xd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-local.out create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-local.rd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-local.s create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-local.sd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-local.xd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-global.out create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-global.s create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-local.out create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-local.rd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-local.s create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd create mode 100644 ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd create mode 100644 ld/testsuite/ld-loongarch-elf/pic.exp create mode 100644 ld/testsuite/ld-loongarch-elf/pic.ld create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-0.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall-1.s create mode 100644 ld/testsuite/ld-loongarch-elf/syscall.d create mode 100644 opcodes/loongarch-coder.c create mode 100644 opcodes/loongarch-dis.c create mode 100644 opcodes/loongarch-opc.c diff --git a/bfd/Makefile.am b/bfd/Makefile.am index 7c859428..376d54ae 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -118,6 +118,7 @@ ALL_MACHINES = \ cpu-ip2k.lo \ cpu-iq2000.lo \ cpu-lm32.lo \ + cpu-loongarch.lo \ cpu-m10200.lo \ cpu-m10300.lo \ cpu-m32c.lo \ @@ -202,6 +203,7 @@ ALL_MACHINES_CFILES = \ cpu-ip2k.c \ cpu-iq2000.c \ cpu-lm32.c \ + cpu-loongarch.c \ cpu-m10200.c \ cpu-m10300.c \ cpu-m32c.c \ @@ -548,6 +550,9 @@ BFD64_BACKENDS = \ elf64-ia64.lo \ elf64-ia64-vms.lo \ elfxx-ia64.lo \ + elf32-loongarch.lo \ + elf64-loongarch.lo \ + elfxx-loongarch.lo \ elfn32-mips.lo \ elf64-mips.lo \ elfxx-mips.lo \ @@ -603,6 +608,7 @@ BFD64_BACKENDS_CFILES = \ elfn32-mips.c \ elfxx-aarch64.c \ elfxx-ia64.c \ + elfxx-loongarch.c \ elfxx-mips.c \ elfxx-riscv.c \ mach-o-aarch64.c \ @@ -668,6 +674,7 @@ SOURCE_CFILES = \ BUILD_CFILES = \ elf32-aarch64.c elf64-aarch64.c \ elf32-ia64.c elf64-ia64.c \ + elf32-loongarch.c elf64-loongarch.c \ elf32-riscv.c elf64-riscv.c \ peigen.c pepigen.c pex64igen.c pe-aarch64igen.c @@ -689,7 +696,7 @@ SOURCE_HFILES = \ elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ - elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ + elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ genlink.h go32stub.h \ libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ libpei.h libxcoff.h \ @@ -854,6 +861,14 @@ elf64-ia64.c : elfnn-ia64.c echo "#line 1 \"elfnn-ia64.c\"" > $@ $(SED) -e s/NN/64/g < $< >> $@ +elf32-loongarch.c : elfnn-loongarch.c + echo "#line 1 \"elfnn-loongarch.c\"" > $@ + $(SED) -e s/NN/32/g < $< >> $@ + +elf64-loongarch.c : elfnn-loongarch.c + echo "#line 1 \"elfnn-loongarch.c\"" > $@ + $(SED) -e s/NN/64/g < $< >> $@ + elf32-riscv.c : elfnn-riscv.c echo "#line 1 \"elfnn-riscv.c\"" > $@ $(SED) -e s/NN/32/g < $< >> $@ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 66fa92c1..809ea2fd 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -543,6 +543,7 @@ ALL_MACHINES = \ cpu-ip2k.lo \ cpu-iq2000.lo \ cpu-lm32.lo \ + cpu-loongarch.lo \ cpu-m10200.lo \ cpu-m10300.lo \ cpu-m32c.lo \ @@ -627,6 +628,7 @@ ALL_MACHINES_CFILES = \ cpu-ip2k.c \ cpu-iq2000.c \ cpu-lm32.c \ + cpu-loongarch.c \ cpu-m10200.c \ cpu-m10300.c \ cpu-m32c.c \ @@ -975,6 +977,9 @@ BFD64_BACKENDS = \ elf64-ia64.lo \ elf64-ia64-vms.lo \ elfxx-ia64.lo \ + elf32-loongarch.lo \ + elf64-loongarch.lo \ + elfxx-loongarch.lo \ elfn32-mips.lo \ elf64-mips.lo \ elfxx-mips.lo \ @@ -1030,6 +1035,7 @@ BFD64_BACKENDS_CFILES = \ elfn32-mips.c \ elfxx-aarch64.c \ elfxx-ia64.c \ + elfxx-loongarch.c \ elfxx-mips.c \ elfxx-riscv.c \ mach-o-aarch64.c \ @@ -1094,6 +1100,7 @@ SOURCE_CFILES = \ BUILD_CFILES = \ elf32-aarch64.c elf64-aarch64.c \ elf32-ia64.c elf64-ia64.c \ + elf32-loongarch.c elf64-loongarch.c \ elf32-riscv.c elf64-riscv.c \ peigen.c pepigen.c pex64igen.c pe-aarch64igen.c @@ -1112,7 +1119,7 @@ SOURCE_HFILES = \ elf-bfd.h elfcode.h elfcore.h elf-hppa.h elf-linker-x86.h \ elf-linux-core.h elf-nacl.h elf-s390.h elf-vxworks.h \ elfxx-aarch64.h elfxx-ia64.h elfxx-mips.h elfxx-riscv.h \ - elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h \ + elfxx-sparc.h elfxx-tilegx.h elfxx-x86.h elfxx-loongarch.h \ genlink.h go32stub.h \ libaout.h libbfd.h libcoff.h libecoff.h libhppa.h \ libpei.h libxcoff.h \ @@ -1352,6 +1359,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-k1om.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-l1om.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-lm32.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-loongarch.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10200.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m10300.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m32c.Plo@am__quote@ @@ -1445,6 +1453,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-ip2k.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-iq2000.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-lm32.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-loongarch.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m32c.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m32r.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-m68hc11.Plo@am__quote@ @@ -1495,6 +1504,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-loongarch.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@ @@ -1509,6 +1519,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfn32-mips.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-aarch64.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-ia64.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-loongarch.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-mips.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-riscv.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elfxx-sparc.Plo@am__quote@ @@ -1983,6 +1994,14 @@ elf64-ia64.c : elfnn-ia64.c echo "#line 1 \"elfnn-ia64.c\"" > $@ $(SED) -e s/NN/64/g < $< >> $@ +elf32-loongarch.c : elfnn-loongarch.c + echo "#line 1 \"elfnn-loongarch.c\"" > $@ + $(SED) -e s/NN/32/g < $< >> $@ + +elf64-loongarch.c : elfnn-loongarch.c + echo "#line 1 \"elfnn-loongarch.c\"" > $@ + $(SED) -e s/NN/64/g < $< >> $@ + elf32-riscv.c : elfnn-riscv.c echo "#line 1 \"elfnn-riscv.c\"" > $@ $(SED) -e s/NN/32/g < $< >> $@ diff --git a/bfd/archures.c b/bfd/archures.c index 390691bf..b1e88697 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -555,6 +555,9 @@ DESCRIPTION .#define bfd_mach_ck807 6 .#define bfd_mach_ck810 7 .#define bfd_mach_ck860 8 +. bfd_arch_loongarch, {* LoongArch *} +.#define bfd_mach_loongarch32 1 +.#define bfd_mach_loongarch64 2 . bfd_arch_last . }; */ @@ -635,6 +638,7 @@ extern const bfd_arch_info_type bfd_iq2000_arch; extern const bfd_arch_info_type bfd_k1om_arch; extern const bfd_arch_info_type bfd_l1om_arch; extern const bfd_arch_info_type bfd_lm32_arch; +extern const bfd_arch_info_type bfd_loongarch_arch; extern const bfd_arch_info_type bfd_m32c_arch; extern const bfd_arch_info_type bfd_m32r_arch; extern const bfd_arch_info_type bfd_m68hc11_arch; @@ -724,6 +728,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] = &bfd_k1om_arch, &bfd_l1om_arch, &bfd_lm32_arch, + &bfd_loongarch_arch, &bfd_m32c_arch, &bfd_m32r_arch, &bfd_m68hc11_arch, diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 5abde5fe..c8761a61 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1927,6 +1927,9 @@ enum bfd_architecture #define bfd_mach_ck807 6 #define bfd_mach_ck810 7 #define bfd_mach_ck860 8 + bfd_arch_loongarch, /* LoongArch */ +#define bfd_mach_loongarch32 1 +#define bfd_mach_loongarch64 2 bfd_arch_last }; @@ -6258,6 +6261,88 @@ assembler and not (currently) written to any object files. */ /* S12Z relocations. */ BFD_RELOC_S12Z_OPR, + +/* LARCH relocations. */ + BFD_RELOC_LARCH_TLS_DTPMOD32, + BFD_RELOC_LARCH_TLS_DTPREL32, + BFD_RELOC_LARCH_TLS_DTPMOD64, + BFD_RELOC_LARCH_TLS_DTPREL64, + BFD_RELOC_LARCH_TLS_TPREL32, + BFD_RELOC_LARCH_TLS_TPREL64, + BFD_RELOC_LARCH_MARK_LA, + BFD_RELOC_LARCH_MARK_PCREL, + BFD_RELOC_LARCH_SOP_PUSH_PCREL, + BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE, + BFD_RELOC_LARCH_SOP_PUSH_DUP, + BFD_RELOC_LARCH_SOP_PUSH_GPREL, + BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL, + BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT, + BFD_RELOC_LARCH_SOP_PUSH_TLS_GD, + BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL, + BFD_RELOC_LARCH_SOP_ASSERT, + BFD_RELOC_LARCH_SOP_NOT, + BFD_RELOC_LARCH_SOP_SUB, + BFD_RELOC_LARCH_SOP_SL, + BFD_RELOC_LARCH_SOP_SR, + BFD_RELOC_LARCH_SOP_ADD, + BFD_RELOC_LARCH_SOP_AND, + BFD_RELOC_LARCH_SOP_IF_ELSE, + BFD_RELOC_LARCH_SOP_POP_32_S_10_5, + BFD_RELOC_LARCH_SOP_POP_32_U_10_12, + BFD_RELOC_LARCH_SOP_POP_32_S_10_12, + BFD_RELOC_LARCH_SOP_POP_32_S_10_16, + BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2, + BFD_RELOC_LARCH_SOP_POP_32_S_5_20, + BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2, + BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2, + BFD_RELOC_LARCH_SOP_POP_32_U, + BFD_RELOC_LARCH_ADD8, + BFD_RELOC_LARCH_ADD16, + BFD_RELOC_LARCH_ADD24, + BFD_RELOC_LARCH_ADD32, + BFD_RELOC_LARCH_ADD64, + BFD_RELOC_LARCH_SUB8, + BFD_RELOC_LARCH_SUB16, + BFD_RELOC_LARCH_SUB24, + BFD_RELOC_LARCH_SUB32, + BFD_RELOC_LARCH_SUB64, + BFD_RELOC_LARCH_B16, + BFD_RELOC_LARCH_B21, + BFD_RELOC_LARCH_B26, + BFD_RELOC_LARCH_ABS_HI20, + BFD_RELOC_LARCH_ABS_LO12, + BFD_RELOC_LARCH_ABS64_LO20, + BFD_RELOC_LARCH_ABS64_HI12, + BFD_RELOC_LARCH_PCALA_HI20, + BFD_RELOC_LARCH_PCALA_LO12, + BFD_RELOC_LARCH_PCALA64_LO20, + BFD_RELOC_LARCH_PCALA64_HI12, + BFD_RELOC_LARCH_GOT_PC_HI20, + BFD_RELOC_LARCH_GOT_PC_LO12, + BFD_RELOC_LARCH_GOT64_PC_LO20, + BFD_RELOC_LARCH_GOT64_PC_HI12, + BFD_RELOC_LARCH_GOT_HI20, + BFD_RELOC_LARCH_GOT_LO12, + BFD_RELOC_LARCH_GOT64_LO20, + BFD_RELOC_LARCH_GOT64_HI12, + BFD_RELOC_LARCH_TLS_LE_HI20, + BFD_RELOC_LARCH_TLS_LE_LO12, + BFD_RELOC_LARCH_TLS_LE64_LO20, + BFD_RELOC_LARCH_TLS_LE64_HI12, + BFD_RELOC_LARCH_TLS_IE_PC_HI20, + BFD_RELOC_LARCH_TLS_IE_PC_LO12, + BFD_RELOC_LARCH_TLS_IE64_PC_LO20, + BFD_RELOC_LARCH_TLS_IE64_PC_HI12, + BFD_RELOC_LARCH_TLS_IE_HI20, + BFD_RELOC_LARCH_TLS_IE_LO12, + BFD_RELOC_LARCH_TLS_IE64_LO20, + BFD_RELOC_LARCH_TLS_IE64_HI12, + BFD_RELOC_LARCH_TLS_LD_PC_HI20, + BFD_RELOC_LARCH_TLS_LD_HI20, + BFD_RELOC_LARCH_TLS_GD_PC_HI20, + BFD_RELOC_LARCH_TLS_GD_HI20, + BFD_RELOC_LARCH_32_PCREL, + BFD_RELOC_LARCH_RELAX, BFD_RELOC_UNUSED }; typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; diff --git a/bfd/config.bfd b/bfd/config.bfd index c3325d8f..3288e40b 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -182,6 +182,7 @@ hppa*) targ_archs=bfd_hppa_arch ;; i[3-7]86) targ_archs=bfd_i386_arch ;; ia16) targ_archs=bfd_i386_arch ;; lm32) targ_archs=bfd_lm32_arch ;; +loongarch*) targ_archs=bfd_loongarch_arch ;; m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;; m68*) targ_archs=bfd_m68k_arch ;; @@ -1413,6 +1414,20 @@ case "${targ}" in targ_underscore=yes ;; +#ifdef BFD64 + loongarch32-*) + targ_defvec=loongarch_elf32_vec + targ_selvecs="loongarch_elf32_vec" + want64=true + ;; + + loongarch64-*) + targ_defvec=loongarch_elf64_vec + targ_selvecs="loongarch_elf32_vec loongarch_elf64_vec" + want64=true + ;; +#endif + # END OF targmatch.h bpf-*-*) echo "*** Configuration $targ is not fully supported." >&2 diff --git a/bfd/configure b/bfd/configure index 721caf2f..089b4a22 100755 --- a/bfd/configure +++ b/bfd/configure @@ -13373,6 +13373,8 @@ do l1om_elf64_fbsd_vec) tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; lm32_elf32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; lm32_elf32_fdpic_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; + loongarch_elf32_vec) tb="$tb elf32-loongarch.lo elfxx-loongarch.lo elf32.lo elf-ifunc.lo $elf" ;; + loongarch_elf64_vec) tb="$tb elf64-loongarch.lo elf64.lo elfxx-loongarch.lo elf32.lo elf-ifunc.lo $elf"; target_size=64 ;; m32c_elf32_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;; m32r_elf32_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; m32r_elf32_le_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; diff --git a/bfd/configure.ac b/bfd/configure.ac index cccc7316..210188d3 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -529,6 +529,8 @@ do l1om_elf64_fbsd_vec) tb="$tb elf64-x86-64.lo elfxx-x86.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;; lm32_elf32_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; lm32_elf32_fdpic_vec) tb="$tb elf32-lm32.lo elf32.lo $elf" ;; + loongarch_elf32_vec) tb="$tb elf32-loongarch.lo elfxx-loongarch.lo elf32.lo elf-ifunc.lo $elf" ;; + loongarch_elf64_vec) tb="$tb elf64-loongarch.lo elf64.lo elfxx-loongarch.lo elf32.lo elf-ifunc.lo $elf"; target_size=64 ;; m32c_elf32_vec) tb="$tb elf32-m32c.lo elf32.lo $elf" ;; m32r_elf32_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; m32r_elf32_le_vec) tb="$tb elf32-m32r.lo elf32.lo $elf" ;; diff --git a/bfd/cpu-loongarch.c b/bfd/cpu-loongarch.c new file mode 100644 index 00000000..bf6702a8 --- /dev/null +++ b/bfd/cpu-loongarch.c @@ -0,0 +1,61 @@ +/* BFD support for LoongArch. + Copyright (C) 2021 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" + +static const bfd_arch_info_type bfd_loongarch32_arch = +{ + 32, /* 32 bits in a word. */ + 32, /* 64 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_loongarch, /* Architecture. */ + bfd_mach_loongarch32, /* Machine number - 0 for now. */ + "loongarch32", /* Architecture name. */ + "Loongarch32", /* Printable name. */ + 3, /* Section align power. */ + false, /* This is the default architecture. */ + bfd_default_compatible, /* Architecture comparison function. */ + bfd_default_scan, /* String to architecture conversion. */ + bfd_arch_default_fill, /* Default fill. */ + NULL, /* Next in list. */ + 0, +}; + +const bfd_arch_info_type bfd_loongarch_arch = +{ + 32, /* 32 bits in a word. */ + 64, /* 64 bits in an address. */ + 8, /* 8 bits in a byte. */ + bfd_arch_loongarch, /* Architecture. */ + /* Machine number of LoongArch64 is larger + * so that LoongArch64 is compatible to LoongArch32. */ + bfd_mach_loongarch64, + "loongarch64", /* Architecture name. */ + "Loongarch64", /* Printable name. */ + 3, /* Section align power. */ + true, /* This is the default architecture. */ + bfd_default_compatible, /* Architecture comparison function. */ + bfd_default_scan, /* String to architecture conversion. */ + bfd_arch_default_fill, /* Default fill. */ + &bfd_loongarch32_arch, /* Next in list. */ + 0, +}; diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h index 8f985ab8..651db974 100644 --- a/bfd/elf-bfd.h +++ b/bfd/elf-bfd.h @@ -508,6 +508,7 @@ enum elf_target_id I386_ELF_DATA, IA64_ELF_DATA, LM32_ELF_DATA, + LARCH_ELF_DATA, M32R_ELF_DATA, M68HC11_ELF_DATA, M68K_ELF_DATA, @@ -2845,6 +2846,14 @@ extern char *elfcore_write_register_note (bfd *, char *, int *, const char *, const void *, int); extern char *elfcore_write_file_note (bfd *, char *, int *, const void*, int); +extern char *elfcore_write_loongarch_cpucfg + (bfd *, char *, int *, const void*, int); +extern char *elfcore_write_loongarch_lbt + (bfd *, char *, int *, const void*, int); +extern char *elfcore_write_loongarch_lsx + (bfd *, char *, int *, const void*, int); +extern char *elfcore_write_loongarch_lasx + (bfd *, char *, int *, const void*, int); /* Internal structure which holds information to be included in the PRPSINFO section of Linux core files. diff --git a/bfd/elf.c b/bfd/elf.c index 9c3f34c4..4ac1dc49 100644 --- a/bfd/elf.c +++ b/bfd/elf.c @@ -9975,6 +9975,30 @@ elfcore_grok_gdb_tdesc (bfd *abfd, Elf_Internal_Note *note) return elfcore_make_note_pseudosection (abfd, ".gdb-tdesc", note); } +static bool +elfcore_grok_loongarch_cpucfg (bfd *abfd, Elf_Internal_Note *note) +{ + return elfcore_make_note_pseudosection (abfd, ".reg-loongarch-cpucfg", note); +} + +static bool +elfcore_grok_loongarch_lbt (bfd *abfd, Elf_Internal_Note *note) +{ + return elfcore_make_note_pseudosection (abfd, ".reg-loongarch-lbt", note); +} + +static bool +elfcore_grok_loongarch_lsx (bfd *abfd, Elf_Internal_Note *note) +{ + return elfcore_make_note_pseudosection (abfd, ".reg-loongarch-lsx", note); +} + +static bool +elfcore_grok_loongarch_lasx (bfd *abfd, Elf_Internal_Note *note) +{ + return elfcore_make_note_pseudosection (abfd, ".reg-loongarch-lasx", note); +} + #if defined (HAVE_PRPSINFO_T) typedef prpsinfo_t elfcore_psinfo_t; #if defined (HAVE_PRPSINFO32_T) /* Sparc64 cross Sparc32 */ @@ -10654,6 +10678,34 @@ elfcore_grok_note (bfd *abfd, Elf_Internal_Note *note) else return true; + case NT_LARCH_CPUCFG: + if (note->namesz == 6 + && strcmp (note->namedata, "LINUX") == 0) + return elfcore_grok_loongarch_cpucfg (abfd, note); + else + return true; + + case NT_LARCH_LBT: + if (note->namesz == 6 + && strcmp (note->namedata, "LINUX") == 0) + return elfcore_grok_loongarch_lbt (abfd, note); + else + return true; + + case NT_LARCH_LSX: + if (note->namesz == 6 + && strcmp (note->namedata, "LINUX") == 0) + return elfcore_grok_loongarch_lsx (abfd, note); + else + return true; + + case NT_LARCH_LASX: + if (note->namesz == 6 + && strcmp (note->namedata, "LINUX") == 0) + return elfcore_grok_loongarch_lasx (abfd, note); + else + return true; + case NT_PRPSINFO: case NT_PSINFO: if (bed->elf_backend_grok_psinfo) @@ -12047,6 +12099,55 @@ elfcore_write_arc_v2 (bfd *abfd, note_name, NT_ARC_V2, arc_v2, size); } +char * +elfcore_write_loongarch_cpucfg (bfd *abfd, + char *buf, + int *bufsiz, + const void *loongarch_cpucfg, + int size) +{ + char *note_name = "LINUX"; + return elfcore_write_note (abfd, buf, bufsiz, + note_name, NT_LARCH_CPUCFG, + loongarch_cpucfg, size); +} + +char * +elfcore_write_loongarch_lbt (bfd *abfd, + char *buf, + int *bufsiz, + const void *loongarch_lbt, + int size) +{ + char *note_name = "LINUX"; + return elfcore_write_note (abfd, buf, bufsiz, + note_name, NT_LARCH_LBT, loongarch_lbt, size); +} + +char * +elfcore_write_loongarch_lsx (bfd *abfd, + char *buf, + int *bufsiz, + const void *loongarch_lsx, + int size) +{ + char *note_name = "LINUX"; + return elfcore_write_note (abfd, buf, bufsiz, + note_name, NT_LARCH_LSX, loongarch_lsx, size); +} + +char * +elfcore_write_loongarch_lasx (bfd *abfd, + char *buf, + int *bufsiz, + const void *loongarch_lasx, + int size) +{ + char *note_name = "LINUX"; + return elfcore_write_note (abfd, buf, bufsiz, + note_name, NT_LARCH_LASX, loongarch_lasx, size); +} + /* Write the buffer of csr values in CSRS (length SIZE) into the note buffer BUF and update *BUFSIZ. ABFD is the bfd the note is being written into. Return a pointer to the new start of the note buffer, to @@ -12171,6 +12272,14 @@ elfcore_write_register_note (bfd *abfd, return elfcore_write_gdb_tdesc (abfd, buf, bufsiz, data, size); if (strcmp (section, ".reg-riscv-csr") == 0) return elfcore_write_riscv_csr (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-loongarch-cpucfg") == 0) + return elfcore_write_loongarch_cpucfg (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-loongarch-lbt") == 0) + return elfcore_write_loongarch_lbt (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-loongarch-lsx") == 0) + return elfcore_write_loongarch_lsx (abfd, buf, bufsiz, data, size); + if (strcmp (section, ".reg-loongarch-lasx") == 0) + return elfcore_write_loongarch_lasx (abfd, buf, bufsiz, data, size); return NULL; } diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c new file mode 100644 index 00000000..459dd0df --- /dev/null +++ b/bfd/elfnn-loongarch.c @@ -0,0 +1,4159 @@ +/* LoongArch-specific support for NN-bit ELF. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "ansidecl.h" +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#define ARCH_SIZE NN +#include "elf-bfd.h" +#include "objalloc.h" +#include "elf/loongarch.h" +#include "elfxx-loongarch.h" + +static bool +loongarch_info_to_howto_rela (bfd *abfd, arelent *cache_ptr, + Elf_Internal_Rela *dst) +{ + cache_ptr->howto = loongarch_elf_rtype_to_howto (abfd, + ELFNN_R_TYPE (dst->r_info)); + return cache_ptr->howto != NULL; +} + +/* LoongArch ELF linker hash entry. */ +struct loongarch_elf_link_hash_entry +{ + struct elf_link_hash_entry elf; + +#define GOT_UNKNOWN 0 +#define GOT_NORMAL 1 +#define GOT_TLS_GD 2 +#define GOT_TLS_IE 4 +#define GOT_TLS_LE 8 + char tls_type; +}; + +#define loongarch_elf_hash_entry(ent) \ + ((struct loongarch_elf_link_hash_entry *) (ent)) + +struct _bfd_loongarch_elf_obj_tdata +{ + struct elf_obj_tdata root; + + /* The tls_type for each local got entry. */ + char *local_got_tls_type; +}; + +#define _bfd_loongarch_elf_tdata(abfd) \ + ((struct _bfd_loongarch_elf_obj_tdata *) (abfd)->tdata.any) + +#define _bfd_loongarch_elf_local_got_tls_type(abfd) \ + (_bfd_loongarch_elf_tdata (abfd)->local_got_tls_type) + +#define _bfd_loongarch_elf_tls_type(abfd, h, symndx) \ + (*((h) != NULL \ + ? &loongarch_elf_hash_entry (h)->tls_type \ + : &_bfd_loongarch_elf_local_got_tls_type (abfd)[symndx])) + +#define is_loongarch_elf(bfd) \ + (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ + && elf_tdata (bfd) != NULL \ + && elf_object_id (bfd) == LARCH_ELF_DATA) + +struct loongarch_elf_link_hash_table +{ + struct elf_link_hash_table elf; + + /* Short-cuts to get to dynamic linker sections. */ + asection *sdyntdata; + + /* Small local sym to section mapping cache. */ + struct sym_cache sym_cache; + + /* Used by local STT_GNU_IFUNC symbols. */ + htab_t loc_hash_table; + void *loc_hash_memory; + + /* The max alignment of output sections. */ + bfd_vma max_alignment; +}; + +/* Get the LoongArch ELF linker hash table from a link_info structure. */ +#define loongarch_elf_hash_table(p) \ + (elf_hash_table_id (elf_hash_table (p)) == LARCH_ELF_DATA \ + ? ((struct loongarch_elf_link_hash_table *) ((p)->hash)) \ + : NULL) + +#define MINUS_ONE ((bfd_vma) 0 - 1) + +#define sec_addr(sec) ((sec)->output_section->vma + (sec)->output_offset) + +#define LARCH_ELF_LOG_WORD_BYTES (ARCH_SIZE == 32 ? 2 : 3) +#define LARCH_ELF_WORD_BYTES (1 << LARCH_ELF_LOG_WORD_BYTES) + +#define PLT_HEADER_INSNS 8 +#define PLT_HEADER_SIZE (PLT_HEADER_INSNS * 4) + +#define PLT_ENTRY_INSNS 4 +#define PLT_ENTRY_SIZE (PLT_ENTRY_INSNS * 4) + +#define GOT_ENTRY_SIZE (LARCH_ELF_WORD_BYTES) + +#define GOTPLT_HEADER_SIZE (GOT_ENTRY_SIZE * 2) + +#define elf_backend_want_got_plt 1 + +#define elf_backend_plt_readonly 1 + +#define elf_backend_want_plt_sym 1 +#define elf_backend_plt_alignment 4 +#define elf_backend_can_gc_sections 1 +#define elf_backend_can_refcount 1 +#define elf_backend_want_got_sym 1 + +#define elf_backend_got_header_size (GOT_ENTRY_SIZE * 1) + +#define elf_backend_want_dynrelro 1 +#define elf_backend_rela_normal 1 +#define elf_backend_default_execstack 0 + +/* Generate a PLT header. */ + +static bool +loongarch_make_plt_header (bfd_vma got_plt_addr, bfd_vma plt_header_addr, + uint32_t *entry) +{ + bfd_vma pcrel = got_plt_addr - plt_header_addr; + bfd_vma hi, lo; + + if (pcrel + 0x80000800 > 0xffffffff) + { + _bfd_error_handler (_("%#" PRIx64 " invaild imm"), (uint64_t) pcrel); + bfd_set_error (bfd_error_bad_value); + return false; + } + hi = ((pcrel + 0x800) >> 12) & 0xfffff; + lo = pcrel & 0xfff; + + /* pcaddu12i $t2, %hi(%pcrel(.got.plt)) + sub.[wd] $t1, $t1, $t3 + ld.[wd] $t3, $t2, %lo(%pcrel(.got.plt)) # _dl_runtime_resolve + addi.[wd] $t1, $t1, -(PLT_HEADER_SIZE + 12) + addi.[wd] $t0, $t2, %lo(%pcrel(.got.plt)) + srli.[wd] $t1, $t1, log2(16 / GOT_ENTRY_SIZE) + ld.[wd] $t0, $t0, GOT_ENTRY_SIZE + jirl $r0, $t3, 0 */ + + if (GOT_ENTRY_SIZE == 8) + { + entry[0] = 0x1c00000e | (hi & 0xfffff) << 5; + entry[1] = 0x0011bdad; + entry[2] = 0x28c001cf | (lo & 0xfff) << 10; + entry[3] = 0x02c001ad | ((-(PLT_HEADER_SIZE + 12)) & 0xfff) << 10; + entry[4] = 0x02c001cc | (lo & 0xfff) << 10; + entry[5] = 0x004501ad | (4 - LARCH_ELF_LOG_WORD_BYTES) << 10; + entry[6] = 0x28c0018c | GOT_ENTRY_SIZE << 10; + entry[7] = 0x4c0001e0; + } + else + { + entry[0] = 0x1c00000e | (hi & 0xfffff) << 5; + entry[1] = 0x00113dad; + entry[2] = 0x288001cf | (lo & 0xfff) << 10; + entry[3] = 0x028001ad | ((-(PLT_HEADER_SIZE + 12)) & 0xfff) << 10; + entry[4] = 0x028001cc | (lo & 0xfff) << 10; + entry[5] = 0x004481ad | (4 - LARCH_ELF_LOG_WORD_BYTES) << 10; + entry[6] = 0x2880018c | GOT_ENTRY_SIZE << 10; + entry[7] = 0x4c0001e0; + } + return true; +} + +/* Generate a PLT entry. */ + +static bool +loongarch_make_plt_entry (bfd_vma got_plt_entry_addr, bfd_vma plt_entry_addr, + uint32_t *entry) +{ + bfd_vma pcrel = got_plt_entry_addr - plt_entry_addr; + bfd_vma hi, lo; + + if (pcrel + 0x80000800 > 0xffffffff) + { + _bfd_error_handler (_("%#" PRIx64 " invaild imm"), (uint64_t) pcrel); + bfd_set_error (bfd_error_bad_value); + return false; + } + hi = ((pcrel + 0x800) >> 12) & 0xfffff; + lo = pcrel & 0xfff; + + entry[0] = 0x1c00000f | (hi & 0xfffff) << 5; + entry[1] = ((GOT_ENTRY_SIZE == 8 ? 0x28c001ef : 0x288001ef) + | (lo & 0xfff) << 10); + entry[2] = 0x4c0001ed; /* jirl $r13, $15, 0 */ + entry[3] = 0x03400000; /* nop */ + + return true; +} + +/* Create an entry in an LoongArch ELF linker hash table. */ + +static struct bfd_hash_entry * +link_hash_newfunc (struct bfd_hash_entry *entry, struct bfd_hash_table *table, + const char *string) +{ + struct loongarch_elf_link_hash_entry *eh; + + /* Allocate the structure if it has not already been allocated by a + subclass. */ + if (entry == NULL) + { + entry = bfd_hash_allocate (table, sizeof (*eh)); + if (entry == NULL) + return entry; + } + + /* Call the allocation method of the superclass. */ + entry = _bfd_elf_link_hash_newfunc (entry, table, string); + if (entry != NULL) + { + eh = (struct loongarch_elf_link_hash_entry *) entry; + eh->tls_type = GOT_UNKNOWN; + } + + return entry; +} + +/* Compute a hash of a local hash entry. We use elf_link_hash_entry + for local symbol so that we can handle local STT_GNU_IFUNC symbols + as global symbol. We reuse indx and dynstr_index for local symbol + hash since they aren't used by global symbols in this backend. */ + +static hashval_t +elfNN_loongarch_local_htab_hash (const void *ptr) +{ + struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) ptr; + return ELF_LOCAL_SYMBOL_HASH (h->indx, h->dynstr_index); +} + +/* Compare local hash entries. */ + +static int +elfNN_loongarch_local_htab_eq (const void *ptr1, const void *ptr2) +{ + struct elf_link_hash_entry *h1 = (struct elf_link_hash_entry *) ptr1; + struct elf_link_hash_entry *h2 = (struct elf_link_hash_entry *) ptr2; + + return h1->indx == h2->indx && h1->dynstr_index == h2->dynstr_index; +} + +/* Find and/or create a hash entry for local symbol. */ +static struct elf_link_hash_entry * +elfNN_loongarch_get_local_sym_hash (struct loongarch_elf_link_hash_table *htab, + bfd *abfd, const Elf_Internal_Rela *rel, + bool create) +{ + struct loongarch_elf_link_hash_entry e, *ret; + asection *sec = abfd->sections; + hashval_t h = ELF_LOCAL_SYMBOL_HASH (sec->id, ELFNN_R_SYM (rel->r_info)); + void **slot; + + e.elf.indx = sec->id; + e.elf.dynstr_index = ELFNN_R_SYM (rel->r_info); + slot = htab_find_slot_with_hash (htab->loc_hash_table, &e, h, + create ? INSERT : NO_INSERT); + + if (!slot) + return NULL; + + if (*slot) + { + ret = (struct loongarch_elf_link_hash_entry *) *slot; + return &ret->elf; + } + + ret = ((struct loongarch_elf_link_hash_entry *) + objalloc_alloc ((struct objalloc *) htab->loc_hash_memory, + sizeof (struct loongarch_elf_link_hash_entry))); + if (ret) + { + memset (ret, 0, sizeof (*ret)); + ret->elf.indx = sec->id; + ret->elf.pointer_equality_needed = 0; + ret->elf.dynstr_index = ELFNN_R_SYM (rel->r_info); + ret->elf.dynindx = -1; + ret->elf.needs_plt = 0; + ret->elf.plt.refcount = -1; + ret->elf.got.refcount = -1; + ret->elf.def_dynamic = 0; + ret->elf.def_regular = 1; + ret->elf.ref_dynamic = 0; /* This should be always 0 for local. */ + ret->elf.ref_regular = 0; + ret->elf.forced_local = 1; + ret->elf.root.type = bfd_link_hash_defined; + *slot = ret; + } + return &ret->elf; +} + +/* Destroy an LoongArch elf linker hash table. */ + +static void +elfNN_loongarch_link_hash_table_free (bfd *obfd) +{ + struct loongarch_elf_link_hash_table *ret; + ret = (struct loongarch_elf_link_hash_table *) obfd->link.hash; + + if (ret->loc_hash_table) + htab_delete (ret->loc_hash_table); + if (ret->loc_hash_memory) + objalloc_free ((struct objalloc *) ret->loc_hash_memory); + + _bfd_elf_link_hash_table_free (obfd); +} + +/* Create a LoongArch ELF linker hash table. */ + +static struct bfd_link_hash_table * +loongarch_elf_link_hash_table_create (bfd *abfd) +{ + struct loongarch_elf_link_hash_table *ret; + bfd_size_type amt = sizeof (struct loongarch_elf_link_hash_table); + + ret = (struct loongarch_elf_link_hash_table *) bfd_zmalloc (amt); + if (ret == NULL) + return NULL; + + if (!_bfd_elf_link_hash_table_init + (&ret->elf, abfd, link_hash_newfunc, + sizeof (struct loongarch_elf_link_hash_entry), LARCH_ELF_DATA)) + { + free (ret); + return NULL; + } + + ret->max_alignment = MINUS_ONE; + + ret->loc_hash_table = htab_try_create (1024, elfNN_loongarch_local_htab_hash, + elfNN_loongarch_local_htab_eq, NULL); + ret->loc_hash_memory = objalloc_create (); + if (!ret->loc_hash_table || !ret->loc_hash_memory) + { + elfNN_loongarch_link_hash_table_free (abfd); + return NULL; + } + ret->elf.root.hash_table_free = elfNN_loongarch_link_hash_table_free; + + return &ret->elf.root; +} + +/* Merge backend specific data from an object file to the output + object file when linking. */ + +static bool +elfNN_loongarch_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) +{ + bfd *obfd = info->output_bfd; + flagword in_flags = elf_elfheader (ibfd)->e_flags; + flagword out_flags = elf_elfheader (obfd)->e_flags; + + if (!is_loongarch_elf (ibfd) || !is_loongarch_elf (obfd)) + return true; + + if (strcmp (bfd_get_target (ibfd), bfd_get_target (obfd)) != 0) + { + _bfd_error_handler (_("%pB: ABI is incompatible with that of " + "the selected emulation:\n" + " target emulation `%s' does not match `%s'"), + ibfd, bfd_get_target (ibfd), bfd_get_target (obfd)); + return false; + } + + if (!_bfd_elf_merge_object_attributes (ibfd, info)) + return false; + + /* If the input BFD is not a dynamic object and it does not contain any + non-data sections, do not account its ABI. For example, various + packages produces such data-only relocatable objects with + `ld -r -b binary` or `objcopy`, and these objects have zero e_flags. + But they are compatible with all ABIs. */ + if (!(ibfd->flags & DYNAMIC)) + { + asection *sec; + bool have_code_sections = false; + for (sec = ibfd->sections; sec != NULL; sec = sec->next) + if ((bfd_section_flags (sec) + & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) + == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) + { + have_code_sections = true; + break; + } + if (!have_code_sections) + return true; + } + + if (!elf_flags_init (obfd)) + { + elf_flags_init (obfd) = true; + elf_elfheader (obfd)->e_flags = in_flags; + return true; + } + else if (out_flags != in_flags) + { + if ((EF_LOONGARCH_IS_OBJ_V0 (out_flags) + && EF_LOONGARCH_IS_OBJ_V1 (in_flags)) + || (EF_LOONGARCH_IS_OBJ_V0 (in_flags) + && EF_LOONGARCH_IS_OBJ_V1 (out_flags))) + { + elf_elfheader (obfd)->e_flags |= EF_LOONGARCH_OBJABI_V1; + out_flags = elf_elfheader (obfd)->e_flags; + in_flags = out_flags; + } + } + + /* Disallow linking different ABIs. */ + /* Only check relocation version. + The obj_v0 is compatible with obj_v1. */ + if (EF_LOONGARCH_ABI(out_flags ^ in_flags) & EF_LOONGARCH_ABI_MASK) + { + _bfd_error_handler (_("%pB: can't link different ABI object."), ibfd); + goto fail; + } + + return true; + + fail: + bfd_set_error (bfd_error_bad_value); + return false; +} + +/* Create the .got section. */ + +static bool +loongarch_elf_create_got_section (bfd *abfd, struct bfd_link_info *info) +{ + flagword flags; + char *name; + asection *s, *s_got; + struct elf_link_hash_entry *h; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + struct elf_link_hash_table *htab = elf_hash_table (info); + + /* This function may be called more than once. */ + if (htab->sgot != NULL) + return true; + + flags = bed->dynamic_sec_flags; + name = bed->rela_plts_and_copies_p ? ".rela.got" : ".rel.got"; + s = bfd_make_section_anyway_with_flags (abfd, name, flags | SEC_READONLY); + + if (s == NULL || !bfd_set_section_alignment (s, bed->s->log_file_align)) + return false; + htab->srelgot = s; + + s = s_got = bfd_make_section_anyway_with_flags (abfd, ".got", flags); + if (s == NULL || !bfd_set_section_alignment (s, bed->s->log_file_align)) + return false; + htab->sgot = s; + + /* The first bit of the global offset table is the header. */ + s->size += bed->got_header_size; + + if (bed->want_got_plt) + { + s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags); + if (s == NULL || !bfd_set_section_alignment (s, bed->s->log_file_align)) + return false; + htab->sgotplt = s; + + /* Reserve room for the header. */ + s->size = GOTPLT_HEADER_SIZE; + } + + if (bed->want_got_sym) + { + /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got + section. We don't do this in the linker script because we don't want + to define the symbol if we are not creating a global offset table. */ + h = _bfd_elf_define_linkage_sym (abfd, info, s_got, + "_GLOBAL_OFFSET_TABLE_"); + elf_hash_table (info)->hgot = h; + if (h == NULL) + return false; + } + return true; +} + +/* Create .plt, .rela.plt, .got, .got.plt, .rela.got, .dynbss, and + .rela.bss sections in DYNOBJ, and set up shortcuts to them in our + hash table. */ + +static bool +loongarch_elf_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) +{ + struct loongarch_elf_link_hash_table *htab; + + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + if (!loongarch_elf_create_got_section (dynobj, info)) + return false; + + if (!_bfd_elf_create_dynamic_sections (dynobj, info)) + return false; + + if (!bfd_link_pic (info)) + htab->sdyntdata + = bfd_make_section_anyway_with_flags (dynobj, ".tdata.dyn", + SEC_ALLOC | SEC_THREAD_LOCAL); + + if (!htab->elf.splt || !htab->elf.srelplt || !htab->elf.sdynbss + || (!bfd_link_pic (info) && (!htab->elf.srelbss || !htab->sdyntdata))) + abort (); + + return true; +} + +static bool +loongarch_elf_record_tls_and_got_reference (bfd *abfd, + struct bfd_link_info *info, + struct elf_link_hash_entry *h, + unsigned long symndx, + char tls_type) +{ + struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); + Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + + /* This is a global offset table entry for a local symbol. */ + if (elf_local_got_refcounts (abfd) == NULL) + { + bfd_size_type size = + symtab_hdr->sh_info * (sizeof (bfd_vma) + sizeof (tls_type)); + if (!(elf_local_got_refcounts (abfd) = bfd_zalloc (abfd, size))) + return false; + _bfd_loongarch_elf_local_got_tls_type (abfd) = + (char *) (elf_local_got_refcounts (abfd) + symtab_hdr->sh_info); + } + + switch (tls_type) + { + case GOT_NORMAL: + case GOT_TLS_GD: + case GOT_TLS_IE: + /* Need GOT. */ + if (htab->elf.sgot == NULL + && !loongarch_elf_create_got_section (htab->elf.dynobj, info)) + return false; + if (h) + { + if (h->got.refcount < 0) + h->got.refcount = 0; + h->got.refcount++; + } + else + elf_local_got_refcounts (abfd)[symndx]++; + break; + case GOT_TLS_LE: + /* No need for GOT. */ + break; + default: + _bfd_error_handler (_("Internal error: unreachable.")); + return false; + } + + char *new_tls_type = &_bfd_loongarch_elf_tls_type (abfd, h, symndx); + *new_tls_type |= tls_type; + if ((*new_tls_type & GOT_NORMAL) && (*new_tls_type & ~GOT_NORMAL)) + { + _bfd_error_handler (_("%pB: `%s' accessed both as normal and " + "thread local symbol"), + abfd, + h ? h->root.root.string : ""); + return false; + } + + return true; +} + +/* Look through the relocs for a section during the first phase, and + allocate space in the global offset table or procedure linkage + table. */ + +static bool +loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, + asection *sec, const Elf_Internal_Rela *relocs) +{ + struct loongarch_elf_link_hash_table *htab; + Elf_Internal_Shdr *symtab_hdr; + struct elf_link_hash_entry **sym_hashes; + const Elf_Internal_Rela *rel; + asection *sreloc = NULL; + + if (bfd_link_relocatable (info)) + return true; + + htab = loongarch_elf_hash_table (info); + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sym_hashes = elf_sym_hashes (abfd); + + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + + for (rel = relocs; rel < relocs + sec->reloc_count; rel++) + { + unsigned int r_type; + unsigned int r_symndx; + struct elf_link_hash_entry *h; + Elf_Internal_Sym *isym = NULL; + + r_symndx = ELFNN_R_SYM (rel->r_info); + r_type = ELFNN_R_TYPE (rel->r_info); + + if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr)) + { + _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd, r_symndx); + return false; + } + + if (r_symndx < symtab_hdr->sh_info) + { + /* A local symbol. */ + isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, abfd, r_symndx); + if (isym == NULL) + return false; + + if (ELF_ST_TYPE (isym->st_info) == STT_GNU_IFUNC) + { + h = elfNN_loongarch_get_local_sym_hash (htab, abfd, rel, true); + if (h == NULL) + return false; + + h->type = STT_GNU_IFUNC; + h->ref_regular = 1; + } + else + h = NULL; + } + else + { + h = sym_hashes[r_symndx - symtab_hdr->sh_info]; + while (h->root.type == bfd_link_hash_indirect + || h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + } + + /* It is referenced by a non-shared object. */ + if (h != NULL) + h->ref_regular = 1; + + if (h && h->type == STT_GNU_IFUNC) + { + if (htab->elf.dynobj == NULL) + htab->elf.dynobj = abfd; + + /* Create 'irelifunc' in PIC object. */ + if (bfd_link_pic (info) + && !_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) + return false; + /* If '.plt' not represent, create '.iplt' to deal with ifunc. */ + else if (!htab->elf.splt + && !_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) + return false; + /* Create the ifunc sections, iplt and ipltgot, for static + executables. */ + if ((r_type == R_LARCH_64 || r_type == R_LARCH_32) + && !_bfd_elf_create_ifunc_sections (htab->elf.dynobj, info)) + return false; + + if (h->plt.refcount < 0) + h->plt.refcount = 0; + h->plt.refcount++; + h->needs_plt = 1; + + elf_tdata (info->output_bfd)->has_gnu_osabi |= elf_gnu_osabi_ifunc; + } + + int need_dynreloc = 0; + int only_need_pcrel = 0; + + switch (r_type) + { + case R_LARCH_GOT_PC_HI20: + case R_LARCH_GOT_HI20: + case R_LARCH_SOP_PUSH_GPREL: + /* For la.global. */ + if (h) + h->pointer_equality_needed = 1; + if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, + r_symndx, + GOT_NORMAL)) + return false; + break; + + case R_LARCH_TLS_LD_PC_HI20: + case R_LARCH_TLS_LD_HI20: + case R_LARCH_TLS_GD_PC_HI20: + case R_LARCH_TLS_GD_HI20: + case R_LARCH_SOP_PUSH_TLS_GD: + if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, + r_symndx, + GOT_TLS_GD)) + return false; + break; + + case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_HI20: + case R_LARCH_SOP_PUSH_TLS_GOT: + if (bfd_link_pic (info)) + /* May fail for lazy-bind. */ + info->flags |= DF_STATIC_TLS; + + if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, + r_symndx, + GOT_TLS_IE)) + return false; + break; + + case R_LARCH_TLS_LE_HI20: + case R_LARCH_SOP_PUSH_TLS_TPREL: + if (!bfd_link_executable (info)) + return false; + + info->flags |= DF_STATIC_TLS; + + if (!loongarch_elf_record_tls_and_got_reference (abfd, info, h, + r_symndx, + GOT_TLS_LE)) + return false; + break; + + case R_LARCH_ABS_HI20: + case R_LARCH_SOP_PUSH_ABSOLUTE: + if (h != NULL) + /* If this reloc is in a read-only section, we might + need a copy reloc. We can't check reliably at this + stage whether the section is read-only, as input + sections have not yet been mapped to output sections. + Tentatively set the flag for now, and correct in + adjust_dynamic_symbol. */ + h->non_got_ref = 1; + break; + + case R_LARCH_PCALA_HI20: + if (h != NULL) + { + /* For pcalau12i + jirl. */ + h->needs_plt = 1; + if (h->plt.refcount < 0) + h->plt.refcount = 0; + h->plt.refcount++; + + h->non_got_ref = 1; + h->pointer_equality_needed = 1; + } + + break; + + case R_LARCH_B21: + case R_LARCH_B16: + case R_LARCH_B26: + if (h != NULL) + { + h->needs_plt = 1; + if (!bfd_link_pic (info)) + h->non_got_ref = 1; + + /* We try to create PLT stub for all non-local function. */ + if (h->plt.refcount < 0) + h->plt.refcount = 0; + h->plt.refcount++; + } + + break; + + case R_LARCH_SOP_PUSH_PCREL: + if (h != NULL) + { + if (!bfd_link_pic (info)) + h->non_got_ref = 1; + + /* We try to create PLT stub for all non-local function. */ + if (h->plt.refcount < 0) + h->plt.refcount = 0; + h->plt.refcount++; + h->pointer_equality_needed = 1; + } + + break; + + case R_LARCH_SOP_PUSH_PLT_PCREL: + /* This symbol requires a procedure linkage table entry. We + actually build the entry in adjust_dynamic_symbol, + because this might be a case of linking PIC code without + linking in any dynamic objects, in which case we don't + need to generate a procedure linkage table after all. */ + if (h != NULL) + { + h->needs_plt = 1; + if (h->plt.refcount < 0) + h->plt.refcount = 0; + h->plt.refcount++; + } + break; + + case R_LARCH_TLS_DTPREL32: + case R_LARCH_TLS_DTPREL64: + need_dynreloc = 1; + only_need_pcrel = 1; + break; + + case R_LARCH_JUMP_SLOT: + case R_LARCH_32: + case R_LARCH_64: + + need_dynreloc = 1; + + /* If resolved symbol is defined in this object, + 1. Under pie, the symbol is known. We convert it + into R_LARCH_RELATIVE and need load-addr still. + 2. Under pde, the symbol is known and we can discard R_LARCH_NN. + 3. Under dll, R_LARCH_NN can't be changed normally, since + its defination could be covered by the one in executable. + For symbolic, we convert it into R_LARCH_RELATIVE. + Thus, only under pde, it needs pcrel only. We discard it. */ + only_need_pcrel = bfd_link_pde (info); + + if (h != NULL + && (!bfd_link_pic (info) + || h->type == STT_GNU_IFUNC)) + { + /* This reloc might not bind locally. */ + h->non_got_ref = 1; + h->pointer_equality_needed = 1; + + if (!h->def_regular + || (sec->flags & (SEC_CODE | SEC_READONLY)) != 0) + { + /* We may need a .plt entry if the symbol is a function + defined in a shared lib or is a function referenced + from the code or read-only section. */ + h->plt.refcount += 1; + } + } + break; + + case R_LARCH_GNU_VTINHERIT: + if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) + return false; + break; + + case R_LARCH_GNU_VTENTRY: + if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) + return false; + break; + + default: + break; + } + + /* Record some info for sizing and allocating dynamic entry. */ + if (need_dynreloc && (sec->flags & SEC_ALLOC)) + { + /* When creating a shared object, we must copy these + relocs into the output file. We create a reloc + section in dynobj and make room for the reloc. */ + struct elf_dyn_relocs *p; + struct elf_dyn_relocs **head; + + if (sreloc == NULL) + { + sreloc + = _bfd_elf_make_dynamic_reloc_section (sec, htab->elf.dynobj, + LARCH_ELF_LOG_WORD_BYTES, + abfd, /*rela?*/ true); + if (sreloc == NULL) + return false; + } + + /* If this is a global symbol, we count the number of + relocations we need for this symbol. */ + if (h != NULL) + head = &h->dyn_relocs; + else + { + /* Track dynamic relocs needed for local syms too. + We really need local syms available to do this + easily. Oh well. */ + + asection *s; + void *vpp; + + s = bfd_section_from_elf_index (abfd, isym->st_shndx); + if (s == NULL) + s = sec; + + vpp = &elf_section_data (s)->local_dynrel; + head = (struct elf_dyn_relocs **) vpp; + } + + p = *head; + if (p == NULL || p->sec != sec) + { + bfd_size_type amt = sizeof *p; + p = (struct elf_dyn_relocs *) bfd_alloc (htab->elf.dynobj, amt); + if (p == NULL) + return false; + p->next = *head; + *head = p; + p->sec = sec; + p->count = 0; + p->pc_count = 0; + } + + p->count++; + p->pc_count += only_need_pcrel; + } + } + + return true; +} + +/* Find dynamic relocs for H that apply to read-only sections. */ + +static asection * +readonly_dynrelocs (struct elf_link_hash_entry *h) +{ + struct elf_dyn_relocs *p; + + for (p = h->dyn_relocs; p != NULL; p = p->next) + { + asection *s = p->sec->output_section; + + if (s != NULL && (s->flags & SEC_READONLY) != 0) + return p->sec; + } + return NULL; +} + +/* Adjust a symbol defined by a dynamic object and referenced by a + regular object. The current definition is in some section of the + dynamic object, but we're not including those sections. We have to + change the definition to something the rest of the link can + understand. */ +static bool +loongarch_elf_adjust_dynamic_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *h) +{ + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; + + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + + dynobj = htab->elf.dynobj; + + /* Make sure we know what is going on here. */ + BFD_ASSERT (dynobj != NULL + && (h->needs_plt || h->type == STT_GNU_IFUNC || h->is_weakalias + || (h->def_dynamic && h->ref_regular && !h->def_regular))); + + /* If this is a function, put it in the procedure linkage table. We + will fill in the contents of the procedure linkage table later + (although we could actually do it here). */ + if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt) + { + if (h->plt.refcount < 0 + || (h->type != STT_GNU_IFUNC + && (SYMBOL_REFERENCES_LOCAL (info, h) + || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT + && h->root.type == bfd_link_hash_undefweak)))) + { + /* This case can occur if we saw a R_LARCH_SOP_PUSH_PLT_PCREL reloc + in an input file, but the symbol was never referred to by a + dynamic object, or if all references were garbage collected. + In such a case, we don't actually need to build a PLT entry. */ + h->plt.offset = MINUS_ONE; + h->needs_plt = 0; + } + else + h->needs_plt = 1; + + return true; + } + else + h->plt.offset = MINUS_ONE; + + /* If this is a weak symbol, and there is a real definition, the + processor independent code will have arranged for us to see the + real definition first, and we can just use the same value. */ + if (h->is_weakalias) + { + struct elf_link_hash_entry *def = weakdef (h); + BFD_ASSERT (def->root.type == bfd_link_hash_defined); + h->root.u.def.section = def->root.u.def.section; + h->root.u.def.value = def->root.u.def.value; + return true; + } + + /* R_LARCH_COPY is not adept glibc, not to generate. */ + /* Can not print anything, because make check ld. */ + return true; +} + +/* Allocate space in .plt, .got and associated reloc sections for + dynamic relocs. */ + +static bool +allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) +{ + struct bfd_link_info *info; + struct loongarch_elf_link_hash_table *htab; + struct elf_dyn_relocs *p; + + if (h->root.type == bfd_link_hash_indirect) + return true; + + if (h->type == STT_GNU_IFUNC + && h->def_regular) + return true; + + info = (struct bfd_link_info *) inf; + htab = loongarch_elf_hash_table (info); + bool dyn = htab->elf.dynamic_sections_created; + BFD_ASSERT (htab != NULL); + + do + { + asection *plt, *gotplt, *relplt; + + if (!h->needs_plt) + break; + + h->needs_plt = 0; + + if (htab->elf.splt) + { + if (h->dynindx == -1 && !h->forced_local && dyn + && h->root.type == bfd_link_hash_undefweak) + { + if (!bfd_elf_link_record_dynamic_symbol (info, h)) + return false; + } + + if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h) + && h->type != STT_GNU_IFUNC) + break; + + plt = htab->elf.splt; + gotplt = htab->elf.sgotplt; + relplt = htab->elf.srelplt; + } + else if (htab->elf.iplt) + { + /* .iplt only for IFUNC. */ + if (h->type != STT_GNU_IFUNC) + break; + + plt = htab->elf.iplt; + gotplt = htab->elf.igotplt; + relplt = htab->elf.irelplt; + } + else + break; + + if (plt->size == 0) + plt->size = PLT_HEADER_SIZE; + + h->plt.offset = plt->size; + plt->size += PLT_ENTRY_SIZE; + gotplt->size += GOT_ENTRY_SIZE; + relplt->size += sizeof (ElfNN_External_Rela); + + /* If this symbol is not defined in a regular file, and we are + not generating a shared library, then set the symbol to this + location in the .plt. This is required to make function + pointers compare as equal between the normal executable and + the shared library. */ + if (!bfd_link_pic (info) + && !h->def_regular) + { + h->root.u.def.section = plt; + h->root.u.def.value = h->plt.offset; + } + + h->needs_plt = 1; + } + while (0); + + if (!h->needs_plt) + h->plt.offset = MINUS_ONE; + + if (0 < h->got.refcount) + { + asection *s; + int tls_type = loongarch_elf_hash_entry (h)->tls_type; + + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (h->dynindx == -1 && !h->forced_local && dyn + && h->root.type == bfd_link_hash_undefweak) + { + if (!bfd_elf_link_record_dynamic_symbol (info, h)) + return false; + } + + s = htab->elf.sgot; + h->got.offset = s->size; + if (tls_type & (GOT_TLS_GD | GOT_TLS_IE)) + { + /* TLS_GD needs two dynamic relocs and two GOT slots. */ + if (tls_type & GOT_TLS_GD) + { + s->size += 2 * GOT_ENTRY_SIZE; + if (bfd_link_executable (info)) + { + /* Link exe and not defined local. */ + if (!SYMBOL_REFERENCES_LOCAL (info, h)) + htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela); + } + else + { + if (SYMBOL_REFERENCES_LOCAL (info, h)) + htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); + else + htab->elf.srelgot->size += 2 * sizeof (ElfNN_External_Rela); + } + } + + /* TLS_IE needs one dynamic reloc and one GOT slot. */ + if (tls_type & GOT_TLS_IE) + { + s->size += GOT_ENTRY_SIZE; + + if (bfd_link_executable (info)) + { + /* Link exe and not defined local. */ + if (!SYMBOL_REFERENCES_LOCAL (info, h)) + htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); + } + else + { + htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); + } + } + } + else + { + s->size += GOT_ENTRY_SIZE; + if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT + || h->root.type != bfd_link_hash_undefweak) + && (bfd_link_pic (info) + || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), + h)) + && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) + /* Undefined weak symbol in static PIE resolves to 0 without + any dynamic relocations. */ + htab->elf.srelgot->size += sizeof (ElfNN_External_Rela); + } + } + else + h->got.offset = MINUS_ONE; + + if (h->dyn_relocs == NULL) + return true; + + /* Extra dynamic relocate, + * R_LARCH_64 + * R_LARCH_TLS_DTPRELNN + * R_LARCH_JUMP_SLOT + * R_LARCH_NN. */ + + if (SYMBOL_CALLS_LOCAL (info, h)) + { + struct elf_dyn_relocs **pp; + + for (pp = &h->dyn_relocs; (p = *pp) != NULL;) + { + p->count -= p->pc_count; + p->pc_count = 0; + if (p->count == 0) + *pp = p->next; + else + pp = &p->next; + } + } + + if (h->root.type == bfd_link_hash_undefweak) + { + if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h) + || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT + || (!bfd_link_pic (info) && h->non_got_ref)) + h->dyn_relocs = NULL; + else if (h->dynindx == -1 && !h->forced_local) + { + /* Make sure this symbol is output as a dynamic symbol. + Undefined weak syms won't yet be marked as dynamic. */ + if (!bfd_elf_link_record_dynamic_symbol (info, h)) + return false; + + if (h->dynindx == -1) + h->dyn_relocs = NULL; + } + } + + for (p = h->dyn_relocs; p != NULL; p = p->next) + { + asection *sreloc = elf_section_data (p->sec)->sreloc; + sreloc->size += p->count * sizeof (ElfNN_External_Rela); + } + + return true; +} + +/* A modified version of _bfd_elf_allocate_ifunc_dyn_relocs. + For local def and ref ifunc, + dynamic relocations are stored in + 1. rela.srelgot section in dynamic object (dll or exec). + 2. rela.irelplt section in static executable. + Unlike _bfd_elf_allocate_ifunc_dyn_relocs, rela.srelgot is used + instead of rela.srelplt. Glibc ELF loader will not support + R_LARCH_IRELATIVE relocation in rela.plt. */ + +static bool +local_allocate_ifunc_dyn_relocs (struct bfd_link_info *info, + struct elf_link_hash_entry *h, + struct elf_dyn_relocs **head, + unsigned int plt_entry_size, + unsigned int plt_header_size, + unsigned int got_entry_size, + bool avoid_plt) +{ + asection *plt, *gotplt, *relplt; + struct elf_dyn_relocs *p; + unsigned int sizeof_reloc; + const struct elf_backend_data *bed; + struct elf_link_hash_table *htab; + /* If AVOID_PLT is TRUE, don't use PLT if possible. */ + bool use_plt = !avoid_plt || h->plt.refcount > 0; + bool need_dynreloc = !use_plt || bfd_link_pic (info); + + /* When a PIC object references a STT_GNU_IFUNC symbol defined + in executable or it isn't referenced via PLT, the address of + the resolved function may be used. But in non-PIC executable, + the address of its plt slot may be used. Pointer equality may + not work correctly. PIE or non-PLT reference should be used if + pointer equality is required here. + + If STT_GNU_IFUNC symbol is defined in position-dependent executable, + backend should change it to the normal function and set its address + to its PLT entry which should be resolved by R_*_IRELATIVE at + run-time. All external references should be resolved to its PLT in + executable. */ + if (!need_dynreloc + && !(bfd_link_pde (info) && h->def_regular) + && (h->dynindx != -1 + || info->export_dynamic) + && h->pointer_equality_needed) + { + info->callbacks->einfo + /* xgettext:c-format. */ + (_("%F%P: dynamic STT_GNU_IFUNC symbol `%s' with pointer " + "equality in `%pB' can not be used when making an " + "executable; recompile with -fPIE and relink with -pie\n"), + h->root.root.string, + h->root.u.def.section->owner); + bfd_set_error (bfd_error_bad_value); + return false; + } + + htab = elf_hash_table (info); + + /* When the symbol is marked with regular reference, if PLT isn't used + or we are building a PIC object, we must keep dynamic relocation + if there is non-GOT reference and use PLT if there is PC-relative + reference. */ + if (need_dynreloc && h->ref_regular) + { + bool keep = false; + for (p = *head; p != NULL; p = p->next) + if (p->count) + { + h->non_got_ref = 1; + /* Need dynamic relocations for non-GOT reference. */ + keep = true; + if (p->pc_count) + { + /* Must use PLT for PC-relative reference. */ + use_plt = true; + need_dynreloc = bfd_link_pic (info); + break; + } + } + if (keep) + goto keep; + } + + /* Support garbage collection against STT_GNU_IFUNC symbols. */ + if (h->plt.refcount <= 0 && h->got.refcount <= 0) + { + h->got = htab->init_got_offset; + h->plt = htab->init_plt_offset; + *head = NULL; + return true; + } + + /* Return and discard space for dynamic relocations against it if + it is never referenced. */ + if (!h->ref_regular) + { + if (h->plt.refcount > 0 + || h->got.refcount > 0) + abort (); + h->got = htab->init_got_offset; + h->plt = htab->init_plt_offset; + *head = NULL; + return true; + } + + keep: + bed = get_elf_backend_data (info->output_bfd); + if (bed->rela_plts_and_copies_p) + sizeof_reloc = bed->s->sizeof_rela; + else + sizeof_reloc = bed->s->sizeof_rel; + + /* When building a static executable, use iplt, igot.plt and + rela.iplt sections for STT_GNU_IFUNC symbols. */ + if (htab->splt != NULL) + { + plt = htab->splt; + gotplt = htab->sgotplt; + /* Change dynamic info of ifunc gotplt from srelplt to srelgot. */ + relplt = htab->srelgot; + + /* If this is the first plt entry and PLT is used, make room for + the special first entry. */ + if (plt->size == 0 && use_plt) + plt->size += plt_header_size; + } + else + { + plt = htab->iplt; + gotplt = htab->igotplt; + relplt = htab->irelplt; + } + + if (use_plt) + { + /* Don't update value of STT_GNU_IFUNC symbol to PLT. We need + the original value for R_*_IRELATIVE. */ + h->plt.offset = plt->size; + + /* Make room for this entry in the plt/iplt section. */ + plt->size += plt_entry_size; + + /* We also need to make an entry in the got.plt/got.iplt section, + which will be placed in the got section by the linker script. */ + gotplt->size += got_entry_size; + } + + /* We also need to make an entry in the rela.plt/.rela.iplt + section for GOTPLT relocation if PLT is used. */ + if (use_plt) + { + relplt->size += sizeof_reloc; + relplt->reloc_count++; + } + + /* We need dynamic relocation for STT_GNU_IFUNC symbol only when + there is a non-GOT reference in a PIC object or PLT isn't used. */ + if (!need_dynreloc || !h->non_got_ref) + *head = NULL; + + /* Finally, allocate space. */ + p = *head; + if (p != NULL) + { + bfd_size_type count = 0; + do + { + count += p->count; + p = p->next; + } + while (p != NULL); + + htab->ifunc_resolvers = count != 0; + + /* Dynamic relocations are stored in + 1. rela.srelgot section in PIC object. + 2. rela.srelgot section in dynamic executable. + 3. rela.irelplt section in static executable. */ + if (htab->splt != NULL) + htab->srelgot->size += count * sizeof_reloc; + else + { + relplt->size += count * sizeof_reloc; + relplt->reloc_count += count; + } + } + + /* For STT_GNU_IFUNC symbol, got.plt has the real function address + and got has the PLT entry adddress. We will load the GOT entry + with the PLT entry in finish_dynamic_symbol if it is used. For + branch, it uses got.plt. For symbol value, if PLT is used, + 1. Use got.plt in a PIC object if it is forced local or not + dynamic. + 2. Use got.plt in a non-PIC object if pointer equality isn't + needed. + 3. Use got.plt in PIE. + 4. Use got.plt if got isn't used. + 5. Otherwise use got so that it can be shared among different + objects at run-time. + If PLT isn't used, always use got for symbol value. + We only need to relocate got entry in PIC object or in dynamic + executable without PLT. */ + if (use_plt + && (h->got.refcount <= 0 + || (bfd_link_pic (info) + && (h->dynindx == -1 + || h->forced_local)) + || ( + !h->pointer_equality_needed) + || htab->sgot == NULL)) + { + /* Use got.plt. */ + h->got.offset = (bfd_vma) -1; + } + else + { + if (!use_plt) + { + /* PLT isn't used. */ + h->plt.offset = (bfd_vma) -1; + } + if (h->got.refcount <= 0) + { + /* GOT isn't need when there are only relocations for static + pointers. */ + h->got.offset = (bfd_vma) -1; + } + else + { + h->got.offset = htab->sgot->size; + htab->sgot->size += got_entry_size; + /* Need to relocate the GOT entry in a PIC object or PLT isn't + used. Otherwise, the GOT entry will be filled with the PLT + entry and dynamic GOT relocation isn't needed. */ + if (need_dynreloc) + { + /* For non-static executable, dynamic GOT relocation is in + rela.got section, but for static executable, it is + in rela.iplt section. */ + if (htab->splt != NULL) + htab->srelgot->size += sizeof_reloc; + else + { + relplt->size += sizeof_reloc; + relplt->reloc_count++; + } + } + } + } + + return true; +} + +/* Allocate space in .plt, .got and associated reloc sections for + ifunc dynamic relocs. */ + +static bool +elfNN_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h, void *inf) +{ + struct bfd_link_info *info; + /* An example of a bfd_link_hash_indirect symbol is versioned + symbol. For example: __gxx_personality_v0(bfd_link_hash_indirect) + -> __gxx_personality_v0(bfd_link_hash_defined) + + There is no need to process bfd_link_hash_indirect symbols here + because we will also be presented with the concrete instance of + the symbol and loongarch_elf_copy_indirect_symbol () will have been + called to copy all relevant data from the generic to the concrete + symbol instance. */ + if (h->root.type == bfd_link_hash_indirect) + return true; + + if (h->root.type == bfd_link_hash_warning) + h = (struct elf_link_hash_entry *) h->root.u.i.link; + + info = (struct bfd_link_info *) inf; + + /* Since STT_GNU_IFUNC symbol must go through PLT, we handle it + here if it is defined and referenced in a non-shared object. */ + if (h->type == STT_GNU_IFUNC && h->def_regular) + { + if (SYMBOL_REFERENCES_LOCAL (info, h)) + return local_allocate_ifunc_dyn_relocs (info, h, + &h->dyn_relocs, + PLT_ENTRY_SIZE, + PLT_HEADER_SIZE, + GOT_ENTRY_SIZE, + false); + else + return _bfd_elf_allocate_ifunc_dyn_relocs (info, h, + &h->dyn_relocs, + PLT_ENTRY_SIZE, + PLT_HEADER_SIZE, + GOT_ENTRY_SIZE, + false); + } + + return true; +} + +/* Allocate space in .plt, .got and associated reloc sections for + ifunc dynamic relocs. */ + +static bool +elfNN_allocate_local_ifunc_dynrelocs (void **slot, void *inf) +{ + struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot; + + if (h->type != STT_GNU_IFUNC + || !h->def_regular + || !h->ref_regular + || !h->forced_local + || h->root.type != bfd_link_hash_defined) + abort (); + + return elfNN_allocate_ifunc_dynrelocs (h, inf); +} + +/* Set DF_TEXTREL if we find any dynamic relocs that apply to + read-only sections. */ + +static bool +maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p) +{ + asection *sec; + + if (h->root.type == bfd_link_hash_indirect) + return true; + + sec = readonly_dynrelocs (h); + if (sec != NULL) + { + struct bfd_link_info *info = (struct bfd_link_info *) info_p; + + info->flags |= DF_TEXTREL; + info->callbacks->minfo (_("%pB: dynamic relocation against `%pT' in " + "read-only section `%pA'\n"), + sec->owner, h->root.root.string, sec); + + /* Not an error, just cut short the traversal. */ + return false; + } + return true; +} + +static bool +loongarch_elf_size_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) +{ + struct loongarch_elf_link_hash_table *htab; + bfd *dynobj; + asection *s; + bfd *ibfd; + + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab != NULL); + dynobj = htab->elf.dynobj; + BFD_ASSERT (dynobj != NULL); + + if (htab->elf.dynamic_sections_created) + { + /* Set the contents of the .interp section to the interpreter. */ + if (bfd_link_executable (info) && !info->nointerp) + { + const char *interpreter; + s = bfd_get_linker_section (dynobj, ".interp"); + BFD_ASSERT (s != NULL); + + if (elf_elfheader (output_bfd)->e_ident[EI_CLASS] == ELFCLASS32) + interpreter = "/lib32/ld.so.1"; + else if (elf_elfheader (output_bfd)->e_ident[EI_CLASS] == ELFCLASS64) + interpreter = "/lib64/ld.so.1"; + else + interpreter = "/lib/ld.so.1"; + + s->contents = (unsigned char *) interpreter; + s->size = strlen (interpreter) + 1; + } + } + + /* Set up .got offsets for local syms, and space for local dynamic + relocs. */ + for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) + { + bfd_signed_vma *local_got; + bfd_signed_vma *end_local_got; + char *local_tls_type; + bfd_size_type locsymcount; + Elf_Internal_Shdr *symtab_hdr; + asection *srel; + + if (!is_loongarch_elf (ibfd)) + continue; + + for (s = ibfd->sections; s != NULL; s = s->next) + { + struct elf_dyn_relocs *p; + + for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next) + { + p->count -= p->pc_count; + if (!bfd_is_abs_section (p->sec) + && bfd_is_abs_section (p->sec->output_section)) + { + /* Input section has been discarded, either because + it is a copy of a linkonce section or due to + linker script /DISCARD/, so we'll be discarding + the relocs too. */ + } + else if (0 < p->count) + { + srel = elf_section_data (p->sec)->sreloc; + srel->size += p->count * sizeof (ElfNN_External_Rela); + if ((p->sec->output_section->flags & SEC_READONLY) != 0) + info->flags |= DF_TEXTREL; + } + } + } + + local_got = elf_local_got_refcounts (ibfd); + if (!local_got) + continue; + + symtab_hdr = &elf_symtab_hdr (ibfd); + locsymcount = symtab_hdr->sh_info; + end_local_got = local_got + locsymcount; + local_tls_type = _bfd_loongarch_elf_local_got_tls_type (ibfd); + s = htab->elf.sgot; + srel = htab->elf.srelgot; + for (; local_got < end_local_got; ++local_got, ++local_tls_type) + { + if (0 < *local_got) + { + *local_got = s->size; + + /* TLS gd use two got. */ + if (*local_tls_type & GOT_TLS_GD) + s->size += GOT_ENTRY_SIZE * 2; + else + /* Normal got, tls ie/ld use one got. */ + s->size += GOT_ENTRY_SIZE; + + if (bfd_link_executable (info) + && (*local_tls_type & (GOT_TLS_GD| GOT_TLS_IE))) + ;/* Do nothing. */ + else + { + srel->size += sizeof (ElfNN_External_Rela); + } + } + else + *local_got = MINUS_ONE; + } + } + + /* Allocate global sym .plt and .got entries, and space for global + sym dynamic relocs. */ + elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, info); + + /* Allocate global ifunc sym .plt and .got entries, and space for global + ifunc sym dynamic relocs. */ + elf_link_hash_traverse (&htab->elf, elfNN_allocate_ifunc_dynrelocs, info); + + /* Allocate .plt and .got entries, and space for local ifunc symbols. */ + htab_traverse (htab->loc_hash_table, + (void *) elfNN_allocate_local_ifunc_dynrelocs, info); + + /* Don't allocate .got.plt section if there are no PLT. */ + if (htab->elf.sgotplt && htab->elf.sgotplt->size == GOTPLT_HEADER_SIZE + && (htab->elf.splt == NULL || htab->elf.splt->size == 0)) + htab->elf.sgotplt->size = 0; + + /* The check_relocs and adjust_dynamic_symbol entry points have + determined the sizes of the various dynamic sections. Allocate + memory for them. */ + for (s = dynobj->sections; s != NULL; s = s->next) + { + if ((s->flags & SEC_LINKER_CREATED) == 0) + continue; + + if (s == htab->elf.splt || s == htab->elf.iplt || s == htab->elf.sgot + || s == htab->elf.sgotplt || s == htab->elf.igotplt + || s == htab->elf.sdynbss || s == htab->elf.sdynrelro) + { + /* Strip this section if we don't need it; see the + comment below. */ + } + else if (strncmp (s->name, ".rela", 5) == 0) + { + if (s->size != 0) + { + /* We use the reloc_count field as a counter if we need + to copy relocs into the output file. */ + s->reloc_count = 0; + } + } + else + { + /* It's not one of our sections. */ + continue; + } + + if (s->size == 0) + { + /* If we don't need this section, strip it from the + output file. This is mostly to handle .rela.bss and + .rela.plt. We must create both sections in + create_dynamic_sections, because they must be created + before the linker maps input sections to output + sections. The linker does that before + adjust_dynamic_symbol is called, and it is that + function which decides whether anything needs to go + into these sections. */ + s->flags |= SEC_EXCLUDE; + continue; + } + + if ((s->flags & SEC_HAS_CONTENTS) == 0) + continue; + + /* Allocate memory for the section contents. Zero the memory + for the benefit of .rela.plt, which has 4 unused entries + at the beginning, and we don't want garbage. */ + s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); + if (s->contents == NULL) + return false; + } + + if (elf_hash_table (info)->dynamic_sections_created) + { + /* Add some entries to the .dynamic section. We fill in the + values later, in loongarch_elf_finish_dynamic_sections, but we + must add the entries now so that we get the correct size for + the .dynamic section. The DT_DEBUG entry is filled in by the + dynamic linker and used by the debugger. */ +#define add_dynamic_entry(TAG, VAL) _bfd_elf_add_dynamic_entry (info, TAG, VAL) + + if (bfd_link_executable (info)) + { + if (!add_dynamic_entry (DT_DEBUG, 0)) + return false; + } + + if (htab->elf.srelplt->size != 0) + { + if (!add_dynamic_entry (DT_PLTGOT, 0) + || !add_dynamic_entry (DT_PLTRELSZ, 0) + || !add_dynamic_entry (DT_PLTREL, DT_RELA) + || !add_dynamic_entry (DT_JMPREL, 0)) + return false; + } + + if (!add_dynamic_entry (DT_RELA, 0) + || !add_dynamic_entry (DT_RELASZ, 0) + || !add_dynamic_entry (DT_RELAENT, sizeof (ElfNN_External_Rela))) + return false; + + /* If any dynamic relocs apply to a read-only section, + then we need a DT_TEXTREL entry. */ + if ((info->flags & DF_TEXTREL) == 0) + elf_link_hash_traverse (&htab->elf, maybe_set_textrel, info); + + if (info->flags & DF_TEXTREL) + { + if (!add_dynamic_entry (DT_TEXTREL, 0)) + return false; + /* Clear the DF_TEXTREL flag. It will be set again if we + write out an actual text relocation; we may not, because + at this point we do not know whether e.g. any .eh_frame + absolute relocations have been converted to PC-relative. */ + info->flags &= ~DF_TEXTREL; + } + } +#undef add_dynamic_entry + + return true; +} + +#define LARCH_LD_STACK_DEPTH 16 +static int64_t larch_opc_stack[LARCH_LD_STACK_DEPTH]; +static size_t larch_stack_top = 0; + +static bfd_reloc_status_type +loongarch_push (int64_t val) +{ + if (LARCH_LD_STACK_DEPTH <= larch_stack_top) + return bfd_reloc_outofrange; + larch_opc_stack[larch_stack_top++] = val; + return bfd_reloc_ok; +} + +static bfd_reloc_status_type +loongarch_pop (int64_t *val) +{ + if (larch_stack_top == 0) + return bfd_reloc_outofrange; + BFD_ASSERT (val); + *val = larch_opc_stack[--larch_stack_top]; + return bfd_reloc_ok; +} + +static bfd_reloc_status_type +loongarch_top (int64_t *val) +{ + if (larch_stack_top == 0) + return bfd_reloc_outofrange; + BFD_ASSERT (val); + *val = larch_opc_stack[larch_stack_top - 1]; + return bfd_reloc_ok; +} + +static void +loongarch_elf_append_rela (bfd *abfd, asection *s, Elf_Internal_Rela *rel) +{ + BFD_ASSERT (s && s->contents); + const struct elf_backend_data *bed; + bfd_byte *loc; + + bed = get_elf_backend_data (abfd); + if (!(s->size > s->reloc_count * bed->s->sizeof_rela)) + BFD_ASSERT (s->size > s->reloc_count * bed->s->sizeof_rela); + loc = s->contents + (s->reloc_count++ * bed->s->sizeof_rela); + bed->s->swap_reloca_out (abfd, rel, loc); +} + +/* Check rel->r_offset in range of contents. */ +static bfd_reloc_status_type +loongarch_check_offset (const Elf_Internal_Rela *rel, + const asection *input_section) +{ + if (0 == strcmp(input_section->name, ".text") + && rel->r_offset > input_section->size) + return bfd_reloc_overflow; + + return bfd_reloc_ok; +} + +#define LARCH_RELOC_PERFORM_3OP(op1, op2, op3) \ + ({ \ + bfd_reloc_status_type ret = loongarch_pop (&op2); \ + if (ret == bfd_reloc_ok) \ + { \ + ret = loongarch_pop (&op1); \ + if (ret == bfd_reloc_ok) \ + ret = loongarch_push (op3); \ + } \ + ret; \ + }) + +static bfd_reloc_status_type +loongarch_reloc_rewrite_imm_insn (const Elf_Internal_Rela *rel, + const asection *input_section ATTRIBUTE_UNUSED, + reloc_howto_type *howto, bfd *input_bfd, + bfd_byte *contents, bfd_vma reloc_val) +{ + int bits = bfd_get_reloc_size (howto) * 8; + uint32_t insn = bfd_get (bits, input_bfd, contents + rel->r_offset); + + if (!loongarch_adjust_reloc_bitsfield(howto, &reloc_val)) + return bfd_reloc_overflow; + + insn = (insn & (uint32_t)howto->src_mask) + | ((insn & (~(uint32_t)howto->dst_mask)) | reloc_val); + + bfd_put (bits, input_bfd, insn, contents + rel->r_offset); + + return bfd_reloc_ok; +} + +static bfd_reloc_status_type +perform_relocation (const Elf_Internal_Rela *rel, asection *input_section, + reloc_howto_type *howto, bfd_vma value, + bfd *input_bfd, bfd_byte *contents) +{ + int64_t opr1, opr2, opr3; + bfd_reloc_status_type r = bfd_reloc_ok; + int bits = bfd_get_reloc_size (howto) * 8; + + switch (ELFNN_R_TYPE (rel->r_info)) + { + case R_LARCH_SOP_PUSH_PCREL: + case R_LARCH_SOP_PUSH_ABSOLUTE: + case R_LARCH_SOP_PUSH_GPREL: + case R_LARCH_SOP_PUSH_TLS_TPREL: + case R_LARCH_SOP_PUSH_TLS_GOT: + case R_LARCH_SOP_PUSH_TLS_GD: + case R_LARCH_SOP_PUSH_PLT_PCREL: + r = loongarch_push (value); + break; + + case R_LARCH_SOP_PUSH_DUP: + r = loongarch_pop (&opr1); + if (r == bfd_reloc_ok) + { + r = loongarch_push (opr1); + if (r == bfd_reloc_ok) + r = loongarch_push (opr1); + } + break; + + case R_LARCH_SOP_ASSERT: + r = loongarch_pop (&opr1); + if (r != bfd_reloc_ok || !opr1) + r = bfd_reloc_notsupported; + break; + + case R_LARCH_SOP_NOT: + r = loongarch_pop (&opr1); + if (r == bfd_reloc_ok) + r = loongarch_push (!opr1); + break; + + case R_LARCH_SOP_SUB: + r = LARCH_RELOC_PERFORM_3OP (opr1, opr2, opr1 - opr2); + break; + + case R_LARCH_SOP_SL: + r = LARCH_RELOC_PERFORM_3OP (opr1, opr2, opr1 << opr2); + break; + + case R_LARCH_SOP_SR: + r = LARCH_RELOC_PERFORM_3OP (opr1, opr2, opr1 >> opr2); + break; + + case R_LARCH_SOP_AND: + r = LARCH_RELOC_PERFORM_3OP (opr1, opr2, opr1 & opr2); + break; + + case R_LARCH_SOP_ADD: + r = LARCH_RELOC_PERFORM_3OP (opr1, opr2, opr1 + opr2); + break; + + case R_LARCH_SOP_IF_ELSE: + r = loongarch_pop (&opr3); + if (r == bfd_reloc_ok) + { + r = loongarch_pop (&opr2); + if (r == bfd_reloc_ok) + { + r = loongarch_pop (&opr1); + if (r == bfd_reloc_ok) + r = loongarch_push (opr1 ? opr2 : opr3); + } + } + break; + + case R_LARCH_SOP_POP_32_S_10_5: + case R_LARCH_SOP_POP_32_S_10_12: + case R_LARCH_SOP_POP_32_S_10_16: + case R_LARCH_SOP_POP_32_S_10_16_S2: + case R_LARCH_SOP_POP_32_S_0_5_10_16_S2: + case R_LARCH_SOP_POP_32_S_0_10_10_16_S2: + case R_LARCH_SOP_POP_32_S_5_20: + case R_LARCH_SOP_POP_32_U_10_12: + case R_LARCH_SOP_POP_32_U: + r = loongarch_pop (&opr1); + if (r != bfd_reloc_ok) + break; + r = loongarch_check_offset (rel, input_section); + if (r != bfd_reloc_ok) + break; + + r = loongarch_reloc_rewrite_imm_insn (rel, input_section, + howto, input_bfd, + contents, (bfd_vma)opr1); + break; + + case R_LARCH_TLS_DTPREL32: + case R_LARCH_32: + case R_LARCH_TLS_DTPREL64: + case R_LARCH_64: + r = loongarch_check_offset (rel, input_section); + if (r != bfd_reloc_ok) + break; + + bfd_put (bits, input_bfd, value, contents + rel->r_offset); + break; + + case R_LARCH_ADD8: + case R_LARCH_ADD16: + case R_LARCH_ADD24: + case R_LARCH_ADD32: + case R_LARCH_ADD64: + r = loongarch_check_offset (rel, input_section); + if (r != bfd_reloc_ok) + break; + + opr1 = bfd_get (bits, input_bfd, contents + rel->r_offset); + bfd_put (bits, input_bfd, opr1 + value, contents + rel->r_offset); + break; + + case R_LARCH_SUB8: + case R_LARCH_SUB16: + case R_LARCH_SUB24: + case R_LARCH_SUB32: + case R_LARCH_SUB64: + r = loongarch_check_offset (rel, input_section); + if (r != bfd_reloc_ok) + break; + + opr1 = bfd_get (bits, input_bfd, contents + rel->r_offset); + bfd_put (bits, input_bfd, opr1 - value, contents + rel->r_offset); + break; + + /* For eh_frame and debug info. */ + case R_LARCH_32_PCREL: + value -= sec_addr (input_section) + rel->r_offset; + value += rel->r_addend; + bfd_vma word = bfd_get (howto->bitsize, input_bfd, + contents + rel->r_offset); + word = (word & ~howto->dst_mask) | (value & howto->dst_mask); + bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset); + r = bfd_reloc_ok; + break; + + /* New reloc type. + R_LARCH_B16 ~ R_LARCH_TLS_GD_HI20. */ + case R_LARCH_B16: + case R_LARCH_B21: + case R_LARCH_B26: + case R_LARCH_ABS_HI20: + case R_LARCH_ABS_LO12: + case R_LARCH_ABS64_LO20: + case R_LARCH_ABS64_HI12: + case R_LARCH_PCALA_HI20: + case R_LARCH_PCALA_LO12: + case R_LARCH_PCALA64_LO20: + case R_LARCH_PCALA64_HI12: + case R_LARCH_GOT_PC_HI20: + case R_LARCH_GOT_PC_LO12: + case R_LARCH_GOT64_PC_LO20: + case R_LARCH_GOT64_PC_HI12: + case R_LARCH_GOT_HI20: + case R_LARCH_GOT_LO12: + case R_LARCH_GOT64_LO20: + case R_LARCH_GOT64_HI12: + case R_LARCH_TLS_LE_HI20: + case R_LARCH_TLS_LE_LO12: + case R_LARCH_TLS_LE64_LO20: + case R_LARCH_TLS_LE64_HI12: + case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_PC_LO12: + case R_LARCH_TLS_IE64_PC_LO20: + case R_LARCH_TLS_IE64_PC_HI12: + case R_LARCH_TLS_IE_HI20: + case R_LARCH_TLS_IE_LO12: + case R_LARCH_TLS_IE64_LO20: + case R_LARCH_TLS_IE64_HI12: + case R_LARCH_TLS_LD_PC_HI20: + case R_LARCH_TLS_LD_HI20: + case R_LARCH_TLS_GD_PC_HI20: + case R_LARCH_TLS_GD_HI20: + r = loongarch_check_offset (rel, input_section); + if (r != bfd_reloc_ok) + break; + + r = loongarch_reloc_rewrite_imm_insn (rel, input_section, + howto, input_bfd, + contents, value); + break; + + case R_LARCH_RELAX: + break; + + default: + r = bfd_reloc_notsupported; + } + return r; +} + +#define LARCH_RECENT_RELOC_QUEUE_LENGTH 72 +static struct +{ + bfd *bfd; + asection *section; + bfd_vma r_offset; + int r_type; + bfd_vma relocation; + Elf_Internal_Sym *sym; + struct elf_link_hash_entry *h; + bfd_vma addend; + int64_t top_then; +} larch_reloc_queue[LARCH_RECENT_RELOC_QUEUE_LENGTH]; +static size_t larch_reloc_queue_head = 0; +static size_t larch_reloc_queue_tail = 0; + +static const char * +loongarch_sym_name (bfd *input_bfd, struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + const char *ret = NULL; + if (sym) + ret = bfd_elf_string_from_elf_section (input_bfd, + elf_symtab_hdr (input_bfd).sh_link, + sym->st_name); + else if (h) + ret = h->root.root.string; + + if (ret == NULL || *ret == '\0') + ret = ""; + return ret; +} + +static void +loongarch_record_one_reloc (bfd *abfd, asection *section, int r_type, + bfd_vma r_offset, Elf_Internal_Sym *sym, + struct elf_link_hash_entry *h, bfd_vma addend) +{ + if ((larch_reloc_queue_head == 0 + && larch_reloc_queue_tail == LARCH_RECENT_RELOC_QUEUE_LENGTH - 1) + || larch_reloc_queue_head == larch_reloc_queue_tail + 1) + larch_reloc_queue_head = + (larch_reloc_queue_head + 1) % LARCH_RECENT_RELOC_QUEUE_LENGTH; + larch_reloc_queue[larch_reloc_queue_tail].bfd = abfd; + larch_reloc_queue[larch_reloc_queue_tail].section = section; + larch_reloc_queue[larch_reloc_queue_tail].r_offset = r_offset; + larch_reloc_queue[larch_reloc_queue_tail].r_type = r_type; + larch_reloc_queue[larch_reloc_queue_tail].sym = sym; + larch_reloc_queue[larch_reloc_queue_tail].h = h; + larch_reloc_queue[larch_reloc_queue_tail].addend = addend; + loongarch_top (&larch_reloc_queue[larch_reloc_queue_tail].top_then); + larch_reloc_queue_tail = + (larch_reloc_queue_tail + 1) % LARCH_RECENT_RELOC_QUEUE_LENGTH; +} + +static void +loongarch_dump_reloc_record (void (*p) (const char *fmt, ...)) +{ + size_t i = larch_reloc_queue_head; + bfd *a_bfd = NULL; + asection *section = NULL; + bfd_vma r_offset = 0; + int inited = 0; + p ("Dump relocate record:\n"); + p ("stack top\t\trelocation name\t\tsymbol"); + while (i != larch_reloc_queue_tail) + { + if (a_bfd != larch_reloc_queue[i].bfd + || section != larch_reloc_queue[i].section + || r_offset != larch_reloc_queue[i].r_offset) + { + a_bfd = larch_reloc_queue[i].bfd; + section = larch_reloc_queue[i].section; + r_offset = larch_reloc_queue[i].r_offset; + p ("\nat %pB(%pA+0x%v):\n", larch_reloc_queue[i].bfd, + larch_reloc_queue[i].section, larch_reloc_queue[i].r_offset); + } + + if (!inited) + inited = 1, p ("...\n"); + + reloc_howto_type *howto = + loongarch_elf_rtype_to_howto (larch_reloc_queue[i].bfd, + larch_reloc_queue[i].r_type); + p ("0x%V %s\t`%s'", (bfd_vma) larch_reloc_queue[i].top_then, + howto ? howto->name : "", + loongarch_sym_name (larch_reloc_queue[i].bfd, larch_reloc_queue[i].h, + larch_reloc_queue[i].sym)); + + long addend = larch_reloc_queue[i].addend; + if (addend < 0) + p (" - %ld", -addend); + else if (0 < addend) + p (" + %ld(0x%v)", addend, larch_reloc_queue[i].addend); + + p ("\n"); + i = (i + 1) % LARCH_RECENT_RELOC_QUEUE_LENGTH; + } + p ("\n" + "-- Record dump end --\n\n"); +} + +static bool +loongarch_reloc_is_fatal (struct bfd_link_info *info, + bfd *input_bfd, + asection *input_section, + Elf_Internal_Rela *rel, + reloc_howto_type *howto, + bfd_reloc_status_type rtype, + bool is_undefweak, + const char *name, + const char *msg) +{ + bool fatal = true; + switch (rtype) + { + /* 'dangerous' means we do it but can't promise it's ok + 'unsupport' means out of ability of relocation type + 'undefined' means we can't deal with the undefined symbol. */ + case bfd_reloc_undefined: + info->callbacks->undefined_symbol (info, name, input_bfd, input_section, + rel->r_offset, true); + info->callbacks->info ("%X%pB(%pA+0x%v): error: %s against %s`%s':\n%s\n", + input_bfd, input_section, rel->r_offset, + howto->name, + is_undefweak ? "[undefweak] " : "", name, msg); + break; + case bfd_reloc_dangerous: + info->callbacks->info ("%pB(%pA+0x%v): warning: %s against %s`%s':\n%s\n", + input_bfd, input_section, rel->r_offset, + howto->name, + is_undefweak ? "[undefweak] " : "", name, msg); + fatal = false; + break; + case bfd_reloc_notsupported: + info->callbacks->info ("%X%pB(%pA+0x%v): error: %s against %s`%s':\n%s\n", + input_bfd, input_section, rel->r_offset, + howto->name, + is_undefweak ? "[undefweak] " : "", name, msg); + break; + default: + break; + } + return fatal; +} + +#define RELOCATE_CALC_PC32_HI20(relocation, pc) \ + ({ \ + bfd_vma lo = (relocation) & ((bfd_vma)0xfff); \ + pc = pc & (~(bfd_vma)0xfff); \ + if (lo > 0x7ff) \ + { \ + relocation += 0x1000; \ + } \ + relocation &= ~(bfd_vma)0xfff; \ + relocation -= pc; \ + }) + +#define RELOCATE_CALC_PC64_HI32(relocation, pc) \ + ({ \ + bfd_vma lo = (relocation) & ((bfd_vma)0xfff); \ + if (lo > 0x7ff) \ + { \ + relocation -= 0x100000000; \ + } \ + relocation -= (pc & ~(bfd_vma)0xffffffff); \ + }) + +static int +loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, + bfd *input_bfd, asection *input_section, + bfd_byte *contents, Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, + asection **local_sections) +{ + Elf_Internal_Rela *rel; + Elf_Internal_Rela *relend; + bool fatal = false; + asection *sreloc = elf_section_data (input_section)->sreloc; + struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); + Elf_Internal_Shdr *symtab_hdr = &elf_symtab_hdr (input_bfd); + struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); + bfd_vma *local_got_offsets = elf_local_got_offsets (input_bfd); + bool is_pic = bfd_link_pic (info); + bool is_dyn = elf_hash_table (info)->dynamic_sections_created; + asection *plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt; + asection *got = htab->elf.sgot; + + relend = relocs + input_section->reloc_count; + for (rel = relocs; rel < relend; rel++) + { + int r_type = ELFNN_R_TYPE (rel->r_info); + unsigned long r_symndx = ELFNN_R_SYM (rel->r_info); + bfd_vma pc = sec_addr (input_section) + rel->r_offset; + reloc_howto_type *howto = NULL; + asection *sec = NULL; + Elf_Internal_Sym *sym = NULL; + struct elf_link_hash_entry *h = NULL; + const char *name; + bfd_reloc_status_type r = bfd_reloc_ok; + bool is_ie, is_undefweak, unresolved_reloc, defined_local; + bool resolved_local, resolved_dynly, resolved_to_const; + char tls_type; + bfd_vma relocation, off, ie_off; + int i, j; + + howto = loongarch_elf_rtype_to_howto (input_bfd, r_type); + if (howto == NULL || r_type == R_LARCH_GNU_VTINHERIT + || r_type == R_LARCH_GNU_VTENTRY) + continue; + + /* This is a final link. */ + if (r_symndx < symtab_hdr->sh_info) + { + is_undefweak = false; + unresolved_reloc = false; + sym = local_syms + r_symndx; + sec = local_sections[r_symndx]; + relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); + + /* Relocate against local STT_GNU_IFUNC symbol. */ + if (!bfd_link_relocatable (info) + && ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC) + { + h = elfNN_loongarch_get_local_sym_hash (htab, input_bfd, rel, + false); + if (h == NULL) + abort (); + + /* Set STT_GNU_IFUNC symbol value. */ + h->root.u.def.value = sym->st_value; + h->root.u.def.section = sec; + } + defined_local = true; + resolved_local = true; + resolved_dynly = false; + resolved_to_const = false; + + /* Calc in funtion elf_link_input_bfd, + * if #define elf_backend_rela_normal to 1. */ + if (bfd_link_relocatable (info) + && ELF_ST_TYPE (sym->st_info) == STT_SECTION) + continue; + } + else + { + bool warned, ignored; + + RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, + r_symndx, symtab_hdr, sym_hashes, + h, sec, relocation, + unresolved_reloc, warned, ignored); + /* Here means symbol isn't local symbol only and 'h != NULL'. */ + + /* The 'unresolved_syms_in_objects' specify how to deal with undefined + symbol. And 'dynamic_undefined_weak' specify what to do when + meeting undefweak. */ + + if ((is_undefweak = h->root.type == bfd_link_hash_undefweak)) + { + defined_local = false; + resolved_local = false; + resolved_to_const = (!is_dyn || h->dynindx == -1 + || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)); + resolved_dynly = !resolved_local && !resolved_to_const; + } + else if (warned) + { + /* Symbol undefined offen means failed already. I don't know why + 'warned' here but I guess it want to continue relocating as if + no error occures to find other errors as more as possible. */ + + /* To avoid generating warning messages about truncated + relocations, set the relocation's address to be the same as + the start of this section. */ + relocation = (input_section->output_section + ? input_section->output_section->vma + : 0); + + defined_local = relocation != 0; + resolved_local = defined_local; + resolved_to_const = !resolved_local; + resolved_dynly = false; + } + else + { + defined_local = !unresolved_reloc && !ignored; + resolved_local = + defined_local && SYMBOL_REFERENCES_LOCAL (info, h); + resolved_dynly = !resolved_local; + resolved_to_const = !resolved_local && !resolved_dynly; + } + } + + name = loongarch_sym_name (input_bfd, h, sym); + + if (sec != NULL && discarded_section (sec)) + RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, rel, + 1, relend, howto, 0, contents); + + if (bfd_link_relocatable (info)) + continue; + + /* The r_symndx will be STN_UNDEF (zero) only for relocs against symbols + from removed linkonce sections, or sections discarded by a linker + script. Also for R_*_SOP_PUSH_ABSOLUTE and PCREL to specify const. */ + if (r_symndx == STN_UNDEF || bfd_is_abs_section (sec)) + { + defined_local = false; + resolved_local = false; + resolved_dynly = false; + resolved_to_const = true; + } + + /* The ifunc reference generate plt. */ + if (h && h->type == STT_GNU_IFUNC && h->plt.offset != MINUS_ONE) + { + defined_local = true; + resolved_local = true; + resolved_dynly = false; + resolved_to_const = false; + relocation = sec_addr (plt) + h->plt.offset; + } + + unresolved_reloc = resolved_dynly; + + BFD_ASSERT (resolved_local + resolved_dynly + resolved_to_const == 1); + + /* BFD_ASSERT (!resolved_dynly || (h && h->dynindx != -1));. */ + + BFD_ASSERT (!resolved_local || defined_local); + + is_ie = false; + switch (r_type) + { + case R_LARCH_MARK_PCREL: + case R_LARCH_MARK_LA: + case R_LARCH_NONE: + r = bfd_reloc_continue; + unresolved_reloc = false; + break; + + case R_LARCH_32: + case R_LARCH_64: + if (resolved_dynly || (is_pic && resolved_local)) + { + Elf_Internal_Rela outrel; + + /* When generating a shared object, these relocations are copied + into the output file to be resolved at run time. */ + + outrel.r_offset = _bfd_elf_section_offset (output_bfd, info, + input_section, + rel->r_offset); + + unresolved_reloc = (!((bfd_vma) -2 <= outrel.r_offset) + && (input_section->flags & SEC_ALLOC)); + + outrel.r_offset += sec_addr (input_section); + + /* A pointer point to a ifunc symbol. */ + if (h && h->type == STT_GNU_IFUNC) + { + if (h->dynindx == -1) + { + outrel.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); + outrel.r_addend = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + } + else + { + outrel.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); + outrel.r_addend = 0; + } + + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + + if (htab->elf.splt != NULL) + sreloc = htab->elf.srelgot; + else + sreloc = htab->elf.irelplt; + } + else + { + + if (bfd_link_pic (info)) + sreloc = htab->elf.irelifunc; + else if (htab->elf.splt != NULL) + sreloc = htab->elf.srelgot; + else + sreloc = htab->elf.irelplt; + } + } + else if (resolved_dynly) + { + if (h->dynindx == -1) + { + if (h->root.type == bfd_link_hash_undefined) + (*info->callbacks->undefined_symbol) + (info, name, input_bfd, input_section, + rel->r_offset, true); + + outrel.r_info = ELFNN_R_INFO (0, r_type); + } + else + outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type); + + outrel.r_addend = rel->r_addend; + } + else + { + outrel.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); + outrel.r_addend = relocation + rel->r_addend; + } + + /* No alloc space of func allocate_dynrelocs. */ + if (unresolved_reloc + && !(h && (h->is_weakalias || !h->dyn_relocs))) + loongarch_elf_append_rela (output_bfd, sreloc, &outrel); + } + + relocation += rel->r_addend; + break; + + case R_LARCH_ADD8: + case R_LARCH_ADD16: + case R_LARCH_ADD24: + case R_LARCH_ADD32: + case R_LARCH_ADD64: + case R_LARCH_SUB8: + case R_LARCH_SUB16: + case R_LARCH_SUB24: + case R_LARCH_SUB32: + case R_LARCH_SUB64: + if (resolved_dynly) + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_undefined, is_undefweak, name, + "Can't be resolved dynamically. " + "If this procedure is hand-written assembly,\n" + "there must be something like '.dword sym1 - sym2' " + "to generate these relocs\n" + "and we can't get known link-time address of " + "these symbols.")); + else + relocation += rel->r_addend; + break; + + case R_LARCH_TLS_DTPREL32: + case R_LARCH_TLS_DTPREL64: + if (resolved_dynly) + { + Elf_Internal_Rela outrel; + + outrel.r_offset = _bfd_elf_section_offset (output_bfd, info, + input_section, + rel->r_offset); + unresolved_reloc = (!((bfd_vma) -2 <= outrel.r_offset) + && (input_section->flags & SEC_ALLOC)); + outrel.r_info = ELFNN_R_INFO (h->dynindx, r_type); + outrel.r_offset += sec_addr (input_section); + outrel.r_addend = rel->r_addend; + if (unresolved_reloc) + loongarch_elf_append_rela (output_bfd, sreloc, &outrel); + break; + } + + if (resolved_to_const) + fatal = loongarch_reloc_is_fatal (info, input_bfd, input_section, + rel, howto, + bfd_reloc_notsupported, + is_undefweak, name, + "Internal:"); + if (resolved_local) + { + if (!elf_hash_table (info)->tls_sec) + { + fatal = loongarch_reloc_is_fatal (info, input_bfd, + input_section, rel, howto, bfd_reloc_notsupported, + is_undefweak, name, "TLS section not be created"); + } + else + relocation -= elf_hash_table (info)->tls_sec->vma; + } + else + { + fatal = loongarch_reloc_is_fatal (info, input_bfd, + input_section, rel, howto, bfd_reloc_undefined, + is_undefweak, name, + "TLS LE just can be resolved local only."); + } + + break; + + case R_LARCH_SOP_PUSH_TLS_TPREL: + if (resolved_local) + { + if (!elf_hash_table (info)->tls_sec) + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "TLS section not be created")); + else + relocation -= elf_hash_table (info)->tls_sec->vma; + } + else + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_undefined, is_undefweak, name, + "TLS LE just can be resolved local only.")); + break; + + case R_LARCH_SOP_PUSH_ABSOLUTE: + if (is_undefweak) + { + if (resolved_dynly) + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Someone require us to resolve undefweak " + "symbol dynamically. \n" + "But this reloc can't be done. " + "I think I can't throw error " + "for this\n" + "so I resolved it to 0. " + "I suggest to re-compile with '-fpic'.")); + + relocation = 0; + unresolved_reloc = false; + break; + } + + if (resolved_to_const) + { + relocation += rel->r_addend; + break; + } + + if (is_pic) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Under PIC we don't know load address. Re-compile " + "with '-fpic'?")); + break; + } + + if (resolved_dynly) + { + if (!(plt && h && h->plt.offset != MINUS_ONE)) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_undefined, is_undefweak, name, + "Can't be resolved dynamically. Try to re-compile " + "with '-fpic'?")); + break; + } + + if (rel->r_addend != 0) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Shouldn't be with r_addend.")); + break; + } + + relocation = sec_addr (plt) + h->plt.offset; + unresolved_reloc = false; + break; + } + + if (resolved_local) + { + relocation += rel->r_addend; + break; + } + + break; + + case R_LARCH_SOP_PUSH_PCREL: + case R_LARCH_SOP_PUSH_PLT_PCREL: + unresolved_reloc = false; + + if (is_undefweak) + { + i = 0, j = 0; + relocation = 0; + if (resolved_dynly) + { + if (h && h->plt.offset != MINUS_ONE) + i = 1, j = 2; + else + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Undefweak need to be resolved dynamically, " + "but PLT stub doesn't represent.")); + } + } + else + { + if (!(defined_local || (h && h->plt.offset != MINUS_ONE))) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_undefined, is_undefweak, name, + "PLT stub does not represent and " + "symbol not defined.")); + break; + } + + if (resolved_local) + i = 0, j = 2; + else /* if (resolved_dynly) */ + { + if (!(h && h->plt.offset != MINUS_ONE)) + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Internal: PLT stub doesn't represent. " + "Resolve it with pcrel")); + i = 1, j = 3; + } + } + + for (; i < j; i++) + { + if ((i & 1) == 0 && defined_local) + { + relocation -= pc; + relocation += rel->r_addend; + break; + } + + if ((i & 1) && h && h->plt.offset != MINUS_ONE) + { + if (rel->r_addend != 0) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "PLT shouldn't be with r_addend.")); + break; + } + relocation = sec_addr (plt) + h->plt.offset - pc; + break; + } + } + break; + + case R_LARCH_SOP_PUSH_GPREL: + unresolved_reloc = false; + + if (rel->r_addend != 0) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Shouldn't be with r_addend.")); + break; + } + + if (h != NULL) + { + off = h->got.offset & (~1); + + if (h->got.offset == MINUS_ONE && h->type != STT_GNU_IFUNC) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Internal: GOT entry doesn't represent.")); + break; + } + + /* Hidden symbol not has .got entry, only .got.plt entry + so gprel is (plt - got). */ + if (h->got.offset == MINUS_ONE && h->type == STT_GNU_IFUNC) + { + if (h->plt.offset == (bfd_vma) -1) + { + abort(); + } + + bfd_vma plt_index = h->plt.offset / PLT_ENTRY_SIZE; + off = plt_index * GOT_ENTRY_SIZE; + + if (htab->elf.splt != NULL) + { + /* Section .plt header is 2 times of plt entry. */ + off = sec_addr (htab->elf.sgotplt) + off + - sec_addr (htab->elf.sgot); + } + else + { + /* Section iplt not has plt header. */ + off = sec_addr (htab->elf.igotplt) + off + - sec_addr (htab->elf.sgot); + } + } + + if ((h->got.offset & 1) == 0) + { + if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dyn, + bfd_link_pic (info), h) + && ((bfd_link_pic (info) + && SYMBOL_REFERENCES_LOCAL (info, h)))) + { + /* This is actually a static link, or it is a + -Bsymbolic link and the symbol is defined + locally, or the symbol was forced to be local + because of a version file. We must initialize + this entry in the global offset table. Since the + offset must always be a multiple of the word size, + we use the least significant bit to record whether + we have initialized it already. + + When doing a dynamic link, we create a rela.got + relocation entry to initialize the value. This + is done in the finish_dynamic_symbol routine. */ + + if (resolved_dynly) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Internal: here shouldn't dynamic.")); + } + + if (!(defined_local || resolved_to_const)) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_undefined, is_undefweak, name, + "Internal: ")); + break; + } + + asection *s; + Elf_Internal_Rela outrel; + /* We need to generate a R_LARCH_RELATIVE reloc + for the dynamic linker. */ + s = htab->elf.srelgot; + if (!s) + { + fatal = loongarch_reloc_is_fatal + (info, input_bfd, + input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Internal: '.rel.got' not represent"); + break; + } + + outrel.r_offset = sec_addr (got) + off; + outrel.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); + outrel.r_addend = relocation; /* Link-time addr. */ + loongarch_elf_append_rela (output_bfd, s, &outrel); + } + bfd_put_NN (output_bfd, relocation, got->contents + off); + h->got.offset |= 1; + } + } + else + { + if (!local_got_offsets) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Internal: local got offsets not reporesent.")); + break; + } + + off = local_got_offsets[r_symndx] & (~1); + + if (local_got_offsets[r_symndx] == MINUS_ONE) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Internal: GOT entry doesn't represent.")); + break; + } + + /* The offset must always be a multiple of the word size. + So, we can use the least significant bit to record + whether we have already processed this entry. */ + if ((local_got_offsets[r_symndx] & 1) == 0) + { + if (is_pic) + { + asection *s; + Elf_Internal_Rela outrel; + /* We need to generate a R_LARCH_RELATIVE reloc + for the dynamic linker. */ + s = htab->elf.srelgot; + if (!s) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_notsupported, is_undefweak, name, + "Internal: '.rel.got' not represent")); + break; + } + + outrel.r_offset = sec_addr (got) + off; + outrel.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); + outrel.r_addend = relocation; /* Link-time addr. */ + loongarch_elf_append_rela (output_bfd, s, &outrel); + } + + bfd_put_NN (output_bfd, relocation, got->contents + off); + local_got_offsets[r_symndx] |= 1; + } + } + relocation = off; + + break; + + case R_LARCH_SOP_PUSH_TLS_GOT: + case R_LARCH_SOP_PUSH_TLS_GD: + { + unresolved_reloc = false; + if (r_type == R_LARCH_SOP_PUSH_TLS_GOT) + is_ie = true; + + bfd_vma got_off = 0; + if (h != NULL) + { + got_off = h->got.offset; + h->got.offset |= 1; + } + else + { + got_off = local_got_offsets[r_symndx]; + local_got_offsets[r_symndx] |= 1; + } + + BFD_ASSERT (got_off != MINUS_ONE); + + ie_off = 0; + tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); + if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) + ie_off = 2 * GOT_ENTRY_SIZE; + + if ((got_off & 1) == 0) + { + Elf_Internal_Rela rela; + asection *srel = htab->elf.srelgot; + bfd_vma tls_block_off = 0; + + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + BFD_ASSERT (elf_hash_table (info)->tls_sec); + tls_block_off = relocation + - elf_hash_table (info)->tls_sec->vma; + } + + if (tls_type & GOT_TLS_GD) + { + rela.r_offset = sec_addr (got) + got_off; + rela.r_addend = 0; + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + /* Local sym, used in exec, set module id 1. */ + if (bfd_link_executable (info)) + bfd_put_NN (output_bfd, 1, got->contents + got_off); + else + { + rela.r_info = ELFNN_R_INFO (0, + R_LARCH_TLS_DTPMODNN); + loongarch_elf_append_rela (output_bfd, srel, &rela); + } + + bfd_put_NN (output_bfd, tls_block_off, + got->contents + got_off + GOT_ENTRY_SIZE); + } + /* Dynamic resolved. */ + else + { + /* Dynamic relocate module id. */ + rela.r_info = ELFNN_R_INFO (h->dynindx, + R_LARCH_TLS_DTPMODNN); + loongarch_elf_append_rela (output_bfd, srel, &rela); + + /* Dynamic relocate offset of block. */ + rela.r_offset += GOT_ENTRY_SIZE; + rela.r_info = ELFNN_R_INFO (h->dynindx, + R_LARCH_TLS_DTPRELNN); + loongarch_elf_append_rela (output_bfd, srel, &rela); + } + } + if (tls_type & GOT_TLS_IE) + { + rela.r_offset = sec_addr (got) + got_off + ie_off; + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + /* Local sym, used in exec, set module id 1. */ + if (!bfd_link_executable (info)) + { + rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_TPRELNN); + rela.r_addend = tls_block_off; + loongarch_elf_append_rela (output_bfd, srel, &rela); + } + + bfd_put_NN (output_bfd, tls_block_off, + got->contents + got_off + ie_off); + } + /* Dynamic resolved. */ + else + { + /* Dynamic relocate offset of block. */ + rela.r_info = ELFNN_R_INFO (h->dynindx, + R_LARCH_TLS_TPRELNN); + rela.r_addend = 0; + loongarch_elf_append_rela (output_bfd, srel, &rela); + } + } + } + + relocation = (got_off & (~(bfd_vma)1)) + (is_ie ? ie_off : 0); + } + break; + + /* New reloc types. */ + case R_LARCH_B21: + case R_LARCH_B26: + case R_LARCH_B16: + unresolved_reloc = false; + if (is_undefweak) + { + relocation = 0; + } + + if (resolved_local) + { + relocation -= pc; + relocation += rel->r_addend; + } + else if (resolved_dynly) + { + BFD_ASSERT (h + && (h->plt.offset != MINUS_ONE + || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) + && rel->r_addend == 0); + if (h && h->plt.offset == MINUS_ONE + && ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) + { + relocation -= pc; + relocation += rel->r_addend; + } + else + relocation = sec_addr (plt) + h->plt.offset - pc; + } + + break; + + case R_LARCH_ABS_HI20: + case R_LARCH_ABS_LO12: + case R_LARCH_ABS64_LO20: + case R_LARCH_ABS64_HI12: + BFD_ASSERT (!is_pic); + + if (is_undefweak) + { + BFD_ASSERT (resolved_dynly); + relocation = 0; + break; + } + else if (resolved_to_const || resolved_local) + { + relocation += rel->r_addend; + } + else if (resolved_dynly) + { + unresolved_reloc = false; + BFD_ASSERT ((plt && h && h->plt.offset != MINUS_ONE) + && rel->r_addend == 0); + relocation = sec_addr (plt) + h->plt.offset; + } + + break; + + case R_LARCH_PCALA_HI20: + unresolved_reloc = false; + if (h && h->plt.offset != MINUS_ONE) + relocation = sec_addr (plt) + h->plt.offset; + else + relocation += rel->r_addend; + + RELOCATE_CALC_PC32_HI20 (relocation, pc); + + break; + + case R_LARCH_PCALA_LO12: + /* Not support if sym_addr in 2k page edge. + pcalau12i pc_hi20 (sym_addr) + ld.w/d pc_lo12 (sym_addr) + ld.w/d pc_lo12 (sym_addr + x) + ... + can not calc correct address + if sym_addr < 0x800 && sym_addr + x >= 0x800. */ + + if (h && h->plt.offset != MINUS_ONE) + relocation = sec_addr (plt) + h->plt.offset; + else + relocation += rel->r_addend; + + { + relocation &= 0xfff; + /* Signed extend. */ + relocation = (relocation ^ 0x800) - 0x800; + + /* For 2G jump, generate pcalau12i, jirl. */ + /* If use jirl, turns to R_LARCH_B16. */ + uint32_t insn = bfd_get (32, input_bfd, contents + rel->r_offset); + if ((insn & 0x4c000000) == 0x4c000000) + { + rel->r_info = ELFNN_R_INFO (r_symndx, R_LARCH_B16); + howto = loongarch_elf_rtype_to_howto (input_bfd, R_LARCH_B16); + } + } + break; + + case R_LARCH_PCALA64_LO20: + case R_LARCH_PCALA64_HI12: + if (h && h->plt.offset != MINUS_ONE) + relocation = sec_addr (plt) + h->plt.offset; + else + relocation += rel->r_addend; + + RELOCATE_CALC_PC64_HI32 (relocation, pc); + + break; + + case R_LARCH_GOT_PC_HI20: + case R_LARCH_GOT_HI20: + /* Calc got offset. */ + { + unresolved_reloc = false; + BFD_ASSERT (rel->r_addend == 0); +// if (rel->r_addend == 0) +// fprintf(stderr, "----symbol %s got 0 addend\n", name); + + bfd_vma got_off = 0; + if (h != NULL) + { + /* GOT ref or ifunc. */ + BFD_ASSERT (h->got.offset != MINUS_ONE + || h->type == STT_GNU_IFUNC); + + got_off = h->got.offset & (~(bfd_vma)1); + /* Hidden symbol not has got entry, + * only got.plt entry so it is (plt - got). */ + if (h->got.offset == MINUS_ONE && h->type == STT_GNU_IFUNC) + { + bfd_vma idx; + if (htab->elf.splt != NULL) + { + idx = (h->plt.offset - PLT_HEADER_SIZE) + / PLT_ENTRY_SIZE; + got_off = sec_addr (htab->elf.sgotplt) + + GOTPLT_HEADER_SIZE + + (idx * GOT_ENTRY_SIZE) + - sec_addr (htab->elf.sgot); + } + else + { + idx = h->plt.offset / PLT_ENTRY_SIZE; + got_off = sec_addr (htab->elf.sgotplt) + + (idx * GOT_ENTRY_SIZE) + - sec_addr (htab->elf.sgot); + } + } + + if ((h->got.offset & 1) == 0) + { + /* We need to generate a R_LARCH_RELATIVE reloc once + * in loongarch_elf_finish_dynamic_symbol or now, + * call finish_dyn && nopic + * or !call finish_dyn && pic. */ + if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (is_dyn, + bfd_link_pic (info), + h) + && bfd_link_pic (info) + && SYMBOL_REFERENCES_LOCAL (info, h)) + { + Elf_Internal_Rela rela; + rela.r_offset = sec_addr (got) + got_off; + rela.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); + rela.r_addend = relocation; + loongarch_elf_append_rela (output_bfd, + htab->elf.srelgot, &rela); + } + h->got.offset |= 1; + bfd_put_NN (output_bfd, relocation, + got->contents + got_off); + } + } + else + { + BFD_ASSERT (local_got_offsets + && local_got_offsets[r_symndx] != MINUS_ONE); + + got_off = local_got_offsets[r_symndx] & (~(bfd_vma)1); + if ((local_got_offsets[r_symndx] & 1) == 0) + { + if (bfd_link_pic (info)) + { + Elf_Internal_Rela rela; + rela.r_offset = sec_addr (got) + got_off; + rela.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); + rela.r_addend = relocation; + loongarch_elf_append_rela (output_bfd, + htab->elf.srelgot, &rela); + } + local_got_offsets[r_symndx] |= 1; + } + bfd_put_NN (output_bfd, relocation, got->contents + got_off); + } + + relocation = got_off + sec_addr (got); + } + + if (r_type == R_LARCH_GOT_PC_HI20) + RELOCATE_CALC_PC32_HI20 (relocation, pc); + + break; + + case R_LARCH_GOT_PC_LO12: + case R_LARCH_GOT64_PC_LO20: + case R_LARCH_GOT64_PC_HI12: + case R_LARCH_GOT_LO12: + case R_LARCH_GOT64_LO20: + case R_LARCH_GOT64_HI12: + { + unresolved_reloc = false; + bfd_vma got_off; + if (h) + got_off = h->got.offset & (~(bfd_vma)1); + else + got_off = local_got_offsets[r_symndx] & (~(bfd_vma)1); + + if (h && h->got.offset == MINUS_ONE && h->type == STT_GNU_IFUNC) + { + bfd_vma idx; + if (htab->elf.splt != NULL) + idx = (h->plt.offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; + else + idx = h->plt.offset / PLT_ENTRY_SIZE; + + got_off = sec_addr (htab->elf.sgotplt) + + GOTPLT_HEADER_SIZE + + (idx * GOT_ENTRY_SIZE) + - sec_addr (htab->elf.sgot); + } + relocation = got_off + sec_addr (got); + } + + if (r_type == R_LARCH_GOT_PC_LO12) + relocation &= (bfd_vma)0xfff; + else if (r_type == R_LARCH_GOT64_PC_LO20 + || r_type == R_LARCH_GOT64_PC_HI12) + RELOCATE_CALC_PC64_HI32 (relocation, pc); + + break; + + case R_LARCH_TLS_LE_HI20: + case R_LARCH_TLS_LE_LO12: + case R_LARCH_TLS_LE64_LO20: + case R_LARCH_TLS_LE64_HI12: + BFD_ASSERT (resolved_local && elf_hash_table (info)->tls_sec); + + relocation -= elf_hash_table (info)->tls_sec->vma; + break; + + /* TLS IE LD/GD process separately is troublesome. + When a symbol is both ie and LD/GD, h->got.off |= 1 + make only one type be relocated. We must use + h->got.offset |= 1 and h->got.offset |= 2 + diff IE and LD/GD. And all (got_off & (~(bfd_vma)1)) + (IE LD/GD and reusable GOT reloc) must change to + (got_off & (~(bfd_vma)3)), beause we use lowest 2 bits + as a tag. + Now, LD and GD is both GOT_TLS_GD type, LD seems to + can be omitted. */ + case R_LARCH_TLS_IE_PC_HI20: + case R_LARCH_TLS_IE_HI20: + case R_LARCH_TLS_LD_PC_HI20: + case R_LARCH_TLS_LD_HI20: + case R_LARCH_TLS_GD_PC_HI20: + case R_LARCH_TLS_GD_HI20: + BFD_ASSERT (rel->r_addend == 0); + unresolved_reloc = false; + + if (r_type == R_LARCH_TLS_IE_PC_HI20 + || r_type == R_LARCH_TLS_IE_HI20) + is_ie = true; + + bfd_vma got_off = 0; + if (h != NULL) + { + got_off = h->got.offset; + h->got.offset |= 1; + } + else + { + got_off = local_got_offsets[r_symndx]; + local_got_offsets[r_symndx] |= 1; + } + + BFD_ASSERT (got_off != MINUS_ONE); + + ie_off = 0; + tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); + if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) + ie_off = 2 * GOT_ENTRY_SIZE; + + if ((got_off & 1) == 0) + { + Elf_Internal_Rela rela; + asection *relgot = htab->elf.srelgot; + bfd_vma tls_block_off = 0; + + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + BFD_ASSERT (elf_hash_table (info)->tls_sec); + tls_block_off = relocation + - elf_hash_table (info)->tls_sec->vma; + } + + if (tls_type & GOT_TLS_GD) + { + rela.r_offset = sec_addr (got) + got_off; + rela.r_addend = 0; + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + /* Local sym, used in exec, set module id 1. */ + if (bfd_link_executable (info)) + bfd_put_NN (output_bfd, 1, got->contents + got_off); + else + { + rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_DTPMODNN); + loongarch_elf_append_rela (output_bfd, relgot, &rela); + } + + bfd_put_NN (output_bfd, tls_block_off, + got->contents + got_off + GOT_ENTRY_SIZE); + } + /* Dynamic resolved. */ + else + { + /* Dynamic relocate module id. */ + rela.r_info = ELFNN_R_INFO (h->dynindx, + R_LARCH_TLS_DTPMODNN); + loongarch_elf_append_rela (output_bfd, relgot, &rela); + + /* Dynamic relocate offset of block. */ + rela.r_offset += GOT_ENTRY_SIZE; + rela.r_info = ELFNN_R_INFO (h->dynindx, + R_LARCH_TLS_DTPRELNN); + loongarch_elf_append_rela (output_bfd, relgot, &rela); + } + } + if (tls_type & GOT_TLS_IE) + { + rela.r_offset = sec_addr (got) + got_off + ie_off; + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + /* Local sym, used in exec, set module id 1. */ + if (!bfd_link_executable (info)) + { + rela.r_info = ELFNN_R_INFO (0, R_LARCH_TLS_TPRELNN); + rela.r_addend = tls_block_off; + loongarch_elf_append_rela (output_bfd, relgot, &rela); + } + + bfd_put_NN (output_bfd, tls_block_off, + got->contents + got_off + ie_off); + } + /* Dynamic resolved. */ + else + { + /* Dynamic relocate offset of block. */ + rela.r_info = ELFNN_R_INFO (h->dynindx, + R_LARCH_TLS_TPRELNN); + rela.r_addend = 0; + loongarch_elf_append_rela (output_bfd, relgot, &rela); + } + } + } + relocation = (got_off & (~(bfd_vma)1)) + sec_addr (got) + + (is_ie ? ie_off : 0); + + if (r_type == R_LARCH_TLS_LD_PC_HI20 + || r_type == R_LARCH_TLS_GD_PC_HI20 + || r_type == R_LARCH_TLS_IE_PC_HI20) + RELOCATE_CALC_PC32_HI20 (relocation, pc); + + break; + + case R_LARCH_TLS_IE_PC_LO12: + case R_LARCH_TLS_IE64_PC_LO20: + case R_LARCH_TLS_IE64_PC_HI12: + case R_LARCH_TLS_IE_LO12: + case R_LARCH_TLS_IE64_LO20: + case R_LARCH_TLS_IE64_HI12: + unresolved_reloc = false; + + if (h) + relocation = sec_addr (got) + (h->got.offset & (~(bfd_vma)3)); + else + relocation = sec_addr (got) + + (local_got_offsets[r_symndx] & (~(bfd_vma)3)); + + tls_type = _bfd_loongarch_elf_tls_type (input_bfd, h, r_symndx); + /* Use both TLS_GD and TLS_IE. */ + if ((tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_IE)) + relocation += 2 * GOT_ENTRY_SIZE; + + if (r_type == R_LARCH_TLS_IE_PC_LO12) + relocation &= (bfd_vma)0xfff; + else if (r_type == R_LARCH_TLS_IE64_PC_LO20 + || r_type == R_LARCH_TLS_IE64_PC_HI12) + RELOCATE_CALC_PC64_HI32 (relocation, pc); + + break; + + case R_LARCH_RELAX: + break; + + default: + break; + } + + if (fatal) + break; + + do + { + /* 'unresolved_reloc' means we haven't done it yet. + We need help of dynamic linker to fix this memory location up. */ + if (!unresolved_reloc) + break; + + if (_bfd_elf_section_offset (output_bfd, info, input_section, + rel->r_offset) == MINUS_ONE) + /* WHY? May because it's invalid so skip checking. + But why dynamic reloc a invalid section? */ + break; + + if (input_section->output_section->flags & SEC_DEBUGGING) + { + fatal = (loongarch_reloc_is_fatal + (info, input_bfd, input_section, rel, howto, + bfd_reloc_dangerous, is_undefweak, name, + "Seems dynamic linker not process " + "sections 'SEC_DEBUGGING'.")); + } + if (!is_dyn) + break; + + if ((info->flags & DF_TEXTREL) == 0) + if (input_section->output_section->flags & SEC_READONLY) + info->flags |= DF_TEXTREL; + } + while (0); + + if (fatal) + break; + + loongarch_record_one_reloc (input_bfd, input_section, r_type, + rel->r_offset, sym, h, rel->r_addend); + + if (r != bfd_reloc_continue) + r = perform_relocation (rel, input_section, howto, relocation, + input_bfd, contents); + + switch (r) + { + case bfd_reloc_dangerous: + case bfd_reloc_continue: + case bfd_reloc_ok: + continue; + + case bfd_reloc_overflow: + /* Overflow value can't be filled in. */ + loongarch_dump_reloc_record (info->callbacks->info); + info->callbacks->reloc_overflow + (info, h ? &h->root : NULL, name, howto->name, rel->r_addend, + input_bfd, input_section, rel->r_offset); + break; + + case bfd_reloc_outofrange: + /* Stack state incorrect. */ + loongarch_dump_reloc_record (info->callbacks->info); + info->callbacks->info + ("%X%H: Internal stack state is incorrect.\n" + "Want to push to full stack or pop from empty stack?\n", + input_bfd, input_section, rel->r_offset); + break; + + case bfd_reloc_notsupported: + info->callbacks->info ("%X%H: Unknown relocation type.\n", input_bfd, + input_section, rel->r_offset); + break; + + default: + info->callbacks->info ("%X%H: Internal: unknown error.\n", input_bfd, + input_section, rel->r_offset); + break; + } + + fatal = true; + } + + return !fatal; +} + +/* Finish up dynamic symbol handling. We set the contents of various + dynamic sections here. */ + +static bool +loongarch_elf_finish_dynamic_symbol (bfd *output_bfd, + struct bfd_link_info *info, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); + const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); + asection *rela_dyn = bfd_get_section_by_name (output_bfd, ".rela.dyn"); + struct bfd_link_order *lo = NULL; + Elf_Internal_Rela *slot = NULL, *last_slot = NULL; + + if (rela_dyn) + lo = rela_dyn->map_head.link_order; + + if (h->plt.offset != MINUS_ONE) + { + size_t i, plt_idx; + asection *plt, *gotplt, *relplt; + bfd_vma got_address; + uint32_t plt_entry[PLT_ENTRY_INSNS]; + bfd_byte *loc; + Elf_Internal_Rela rela; + asection *rela_sec = NULL; + + if (htab->elf.splt) + { + BFD_ASSERT ((h->type == STT_GNU_IFUNC + && SYMBOL_REFERENCES_LOCAL (info, h)) + || h->dynindx != -1); + + plt = htab->elf.splt; + gotplt = htab->elf.sgotplt; + if (h->type == STT_GNU_IFUNC && SYMBOL_REFERENCES_LOCAL (info, h)) + relplt = htab->elf.srelgot; + else + relplt = htab->elf.srelplt; + plt_idx = (h->plt.offset - PLT_HEADER_SIZE) / PLT_ENTRY_SIZE; + got_address = + sec_addr (gotplt) + GOTPLT_HEADER_SIZE + plt_idx * GOT_ENTRY_SIZE; + } + else /* if (htab->elf.iplt) */ + { + BFD_ASSERT (h->type == STT_GNU_IFUNC + && SYMBOL_REFERENCES_LOCAL (info, h)); + + plt = htab->elf.iplt; + gotplt = htab->elf.igotplt; + relplt = htab->elf.irelplt; + plt_idx = h->plt.offset / PLT_ENTRY_SIZE; + got_address = sec_addr (gotplt) + plt_idx * GOT_ENTRY_SIZE; + } + + /* Find out where the .plt entry should go. */ + loc = plt->contents + h->plt.offset; + + /* Fill in the PLT entry itself. */ + if (!loongarch_make_plt_entry (got_address, + sec_addr (plt) + h->plt.offset, + plt_entry)) + return false; + + for (i = 0; i < PLT_ENTRY_INSNS; i++) + bfd_put_32 (output_bfd, plt_entry[i], loc + 4 * i); + + /* Fill in the initial value of the got.plt entry. */ + loc = gotplt->contents + (got_address - sec_addr (gotplt)); + bfd_put_NN (output_bfd, sec_addr (plt), loc); + + rela.r_offset = got_address; + + /* TRUE if this is a PLT reference to a local IFUNC. */ + if (PLT_LOCAL_IFUNC_P (info, h) + && (relplt == htab->elf.srelgot + || relplt == htab->elf.irelplt)) + { + rela.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); + rela.r_addend = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + + /* Find the space after dyn sort. */ + while (slot == last_slot || slot->r_offset != 0) + { + if (slot != last_slot) + { + slot++; + continue; + } + + BFD_ASSERT (lo != NULL); + rela_sec = lo->u.indirect.section; + lo = lo->next; + + slot = (Elf_Internal_Rela *)rela_sec->contents; + last_slot = (Elf_Internal_Rela *)(rela_sec->contents + + rela_sec->size); + } + + bed->s->swap_reloca_out (output_bfd, &rela, (bfd_byte *)slot); + rela_sec->reloc_count++; + } + else + { + /* Fill in the entry in the rela.plt section. */ + rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_JUMP_SLOT); + rela.r_addend = 0; + loc = relplt->contents + plt_idx * sizeof (ElfNN_External_Rela); + bed->s->swap_reloca_out (output_bfd, &rela, loc); + } + + if (!h->def_regular) + { + /* Mark the symbol as undefined, rather than as defined in + the .plt section. Leave the value alone. */ + sym->st_shndx = SHN_UNDEF; + /* If the symbol is weak, we do need to clear the value. + Otherwise, the PLT entry would provide a definition for + the symbol even if the symbol wasn't defined anywhere, + and so the symbol would never be NULL. */ + if (!h->ref_regular_nonweak) + sym->st_value = 0; + } + } + + if (h->got.offset != MINUS_ONE + /* TLS got entry have been handled in elf_relocate_section. */ + && !(loongarch_elf_hash_entry (h)->tls_type & (GOT_TLS_GD | GOT_TLS_IE)) + /* Have allocated got entry but not allocated rela before. */ + && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) + { + asection *sgot, *srela; + Elf_Internal_Rela rela; + bfd_vma off = h->got.offset & ~(bfd_vma)1; + + /* This symbol has an entry in the GOT. Set it up. */ + sgot = htab->elf.sgot; + srela = htab->elf.srelgot; + BFD_ASSERT (sgot && srela); + + rela.r_offset = sec_addr (sgot) + off; + + if (h->def_regular + && h->type == STT_GNU_IFUNC) + { + if(h->plt.offset == MINUS_ONE) + { + if (htab->elf.splt == NULL) + srela = htab->elf.irelplt; + + if (SYMBOL_REFERENCES_LOCAL (info, h)) + { + asection *sec = h->root.u.def.section; + rela.r_info = ELFNN_R_INFO (0, R_LARCH_IRELATIVE); + rela.r_addend = h->root.u.def.value + sec->output_section->vma + + sec->output_offset; + bfd_put_NN (output_bfd, 0, sgot->contents + off); + } + else + { + BFD_ASSERT (h->dynindx != -1); + rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); + rela.r_addend = 0; + bfd_put_NN (output_bfd, (bfd_vma) 0, sgot->contents + off); + } + } + else if(bfd_link_pic (info)) + { + rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); + rela.r_addend = 0; + bfd_put_NN (output_bfd, rela.r_addend, sgot->contents + off); + } + else + { + asection *plt; + /* For non-shared object, we can't use .got.plt, which + contains the real function address if we need pointer + equality. We load the GOT entry with the PLT entry. */ + plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt; + bfd_put_NN (output_bfd, + (plt->output_section->vma + + plt->output_offset + + h->plt.offset), + sgot->contents + off); + return true; + } + } + else if (bfd_link_pic (info) && SYMBOL_REFERENCES_LOCAL (info, h)) + { + asection *sec = h->root.u.def.section; + rela.r_info = ELFNN_R_INFO (0, R_LARCH_RELATIVE); + rela.r_addend = (h->root.u.def.value + sec->output_section->vma + + sec->output_offset); + } + else + { + BFD_ASSERT (h->dynindx != -1); + rela.r_info = ELFNN_R_INFO (h->dynindx, R_LARCH_NN); + rela.r_addend = 0; + } + + loongarch_elf_append_rela (output_bfd, srela, &rela); + } + + /* Mark some specially defined symbols as absolute. */ + if (h == htab->elf.hdynamic || h == htab->elf.hgot || h == htab->elf.hplt) + sym->st_shndx = SHN_ABS; + + return true; +} + +/* Finish up the dynamic sections. */ + +static bool +loongarch_finish_dyn (bfd *output_bfd, struct bfd_link_info *info, bfd *dynobj, + asection *sdyn) +{ + struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); + const struct elf_backend_data *bed = get_elf_backend_data (output_bfd); + size_t dynsize = bed->s->sizeof_dyn, skipped_size = 0; + bfd_byte *dyncon, *dynconend; + + dynconend = sdyn->contents + sdyn->size; + for (dyncon = sdyn->contents; dyncon < dynconend; dyncon += dynsize) + { + Elf_Internal_Dyn dyn; + asection *s; + int skipped = 0; + + bed->s->swap_dyn_in (dynobj, dyncon, &dyn); + + switch (dyn.d_tag) + { + case DT_PLTGOT: + s = htab->elf.sgotplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_JMPREL: + s = htab->elf.srelplt; + dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; + break; + case DT_PLTRELSZ: + s = htab->elf.srelplt; + dyn.d_un.d_val = s->size; + break; + case DT_TEXTREL: + if ((info->flags & DF_TEXTREL) == 0) + skipped = 1; + break; + case DT_FLAGS: + if ((info->flags & DF_TEXTREL) == 0) + dyn.d_un.d_val &= ~DF_TEXTREL; + break; + } + if (skipped) + skipped_size += dynsize; + else + bed->s->swap_dyn_out (output_bfd, &dyn, dyncon - skipped_size); + } + /* Wipe out any trailing entries if we shifted down a dynamic tag. */ + memset (dyncon - skipped_size, 0, skipped_size); + return true; +} + +/* Finish up local dynamic symbol handling. We set the contents of + various dynamic sections here. */ + +static bool +elfNN_loongarch_finish_local_dynamic_symbol (void **slot, void *inf) +{ + struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot; + struct bfd_link_info *info = (struct bfd_link_info *) inf; + + return loongarch_elf_finish_dynamic_symbol (info->output_bfd, info, h, NULL); +} + +static bool +loongarch_elf_finish_dynamic_sections (bfd *output_bfd, + struct bfd_link_info *info) +{ + bfd *dynobj; + asection *sdyn, *plt, *gotplt = NULL; + struct loongarch_elf_link_hash_table *htab; + + htab = loongarch_elf_hash_table (info); + BFD_ASSERT (htab); + dynobj = htab->elf.dynobj; + sdyn = bfd_get_linker_section (dynobj, ".dynamic"); + + if (elf_hash_table (info)->dynamic_sections_created) + { + BFD_ASSERT (htab->elf.splt && sdyn); + + if (!loongarch_finish_dyn (output_bfd, info, dynobj, sdyn)) + return false; + } + + plt = htab->elf.splt; + gotplt = htab->elf.sgotplt; + + if (plt && 0 < plt->size) + { + size_t i; + uint32_t plt_header[PLT_HEADER_INSNS]; + if (!loongarch_make_plt_header (sec_addr (gotplt), sec_addr (plt), + plt_header)) + return false; + + for (i = 0; i < PLT_HEADER_INSNS; i++) + bfd_put_32 (output_bfd, plt_header[i], plt->contents + 4 * i); + + elf_section_data (plt->output_section)->this_hdr.sh_entsize = + PLT_ENTRY_SIZE; + } + + if (htab->elf.sgotplt) + { + asection *output_section = htab->elf.sgotplt->output_section; + + if (bfd_is_abs_section (output_section)) + { + _bfd_error_handler (_("discarded output section: `%pA'"), + htab->elf.sgotplt); + return false; + } + + if (0 < htab->elf.sgotplt->size) + { + /* Write the first two entries in .got.plt, needed for the dynamic + linker. */ + bfd_put_NN (output_bfd, MINUS_ONE, htab->elf.sgotplt->contents); + + bfd_put_NN (output_bfd, (bfd_vma) 0, + htab->elf.sgotplt->contents + GOT_ENTRY_SIZE); + } + + elf_section_data (output_section)->this_hdr.sh_entsize = GOT_ENTRY_SIZE; + } + + if (htab->elf.sgot) + { + asection *output_section = htab->elf.sgot->output_section; + + if (0 < htab->elf.sgot->size) + { + /* Set the first entry in the global offset table to the address of + the dynamic section. */ + bfd_vma val = sdyn ? sec_addr (sdyn) : 0; + bfd_put_NN (output_bfd, val, htab->elf.sgot->contents); + } + + elf_section_data (output_section)->this_hdr.sh_entsize = GOT_ENTRY_SIZE; + } + + /* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */ + htab_traverse (htab->loc_hash_table, + (void *) elfNN_loongarch_finish_local_dynamic_symbol, info); + + return true; +} + +/* Return address for Ith PLT stub in section PLT, for relocation REL + or (bfd_vma) -1 if it should not be included. */ + +static bfd_vma +loongarch_elf_plt_sym_val (bfd_vma i, const asection *plt, + const arelent *rel ATTRIBUTE_UNUSED) +{ + return plt->vma + PLT_HEADER_SIZE + i * PLT_ENTRY_SIZE; +} + +static enum elf_reloc_type_class +loongarch_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED, + const asection *rel_sec ATTRIBUTE_UNUSED, + const Elf_Internal_Rela *rela) +{ + struct loongarch_elf_link_hash_table *htab; + htab = loongarch_elf_hash_table (info); + + if (htab->elf.dynsym != NULL && htab->elf.dynsym->contents != NULL) + { + /* Check relocation against STT_GNU_IFUNC symbol if there are + dynamic symbols. */ + bfd *abfd = info->output_bfd; + const struct elf_backend_data *bed = get_elf_backend_data (abfd); + unsigned long r_symndx = ELFNN_R_SYM (rela->r_info); + if (r_symndx != STN_UNDEF) + { + Elf_Internal_Sym sym; + if (!bed->s->swap_symbol_in (abfd, + htab->elf.dynsym->contents + + r_symndx * bed->s->sizeof_sym, + 0, &sym)) + { + /* xgettext:c-format */ + _bfd_error_handler (_("%pB symbol number %lu references" + " nonexistent SHT_SYMTAB_SHNDX section"), + abfd, r_symndx); + /* Ideally an error class should be returned here. */ + } + else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) + return reloc_class_ifunc; + } + } + + switch (ELFNN_R_TYPE (rela->r_info)) + { + case R_LARCH_IRELATIVE: + return reloc_class_ifunc; + case R_LARCH_RELATIVE: + return reloc_class_relative; + case R_LARCH_JUMP_SLOT: + return reloc_class_plt; + case R_LARCH_COPY: + return reloc_class_copy; + default: + return reloc_class_normal; + } +} + +/* Copy the extra info we tack onto an elf_link_hash_entry. */ + +static void +loongarch_elf_copy_indirect_symbol (struct bfd_link_info *info, + struct elf_link_hash_entry *dir, + struct elf_link_hash_entry *ind) +{ + struct elf_link_hash_entry *edir, *eind; + + edir = dir; + eind = ind; + + if (eind->dyn_relocs != NULL) + { + if (edir->dyn_relocs != NULL) + { + struct elf_dyn_relocs **pp; + struct elf_dyn_relocs *p; + + /* Add reloc counts against the indirect sym to the direct sym + list. Merge any entries against the same section. */ + for (pp = &eind->dyn_relocs; (p = *pp) != NULL;) + { + struct elf_dyn_relocs *q; + + for (q = edir->dyn_relocs; q != NULL; q = q->next) + if (q->sec == p->sec) + { + q->pc_count += p->pc_count; + q->count += p->count; + *pp = p->next; + break; + } + if (q == NULL) + pp = &p->next; + } + *pp = edir->dyn_relocs; + } + + edir->dyn_relocs = eind->dyn_relocs; + eind->dyn_relocs = NULL; + } + + if (ind->root.type == bfd_link_hash_indirect && dir->got.refcount < 0) + { + loongarch_elf_hash_entry(edir)->tls_type + = loongarch_elf_hash_entry(eind)->tls_type; + loongarch_elf_hash_entry(eind)->tls_type = GOT_UNKNOWN; + } + _bfd_elf_link_hash_copy_indirect (info, dir, ind); +} + +#define PRSTATUS_SIZE 0x1d8 +#define PRSTATUS_OFFSET_PR_CURSIG 0xc +#define PRSTATUS_OFFSET_PR_PID 0x20 +#define ELF_GREGSET_T_SIZE 0x168 +#define PRSTATUS_OFFSET_PR_REG 0x70 + +/* Support for core dump NOTE sections. */ + +static bool +loongarch_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) +{ + switch (note->descsz) + { + default: + return false; + + /* The sizeof (struct elf_prstatus) on Linux/LoongArch. */ + case PRSTATUS_SIZE: + /* pr_cursig */ + elf_tdata (abfd)->core->signal = + bfd_get_16 (abfd, note->descdata + PRSTATUS_OFFSET_PR_CURSIG); + + /* pr_pid */ + elf_tdata (abfd)->core->lwpid = + bfd_get_32 (abfd, note->descdata + PRSTATUS_OFFSET_PR_PID); + break; + } + + /* Make a ".reg/999" section. */ + return _bfd_elfcore_make_pseudosection (abfd, ".reg", ELF_GREGSET_T_SIZE, + note->descpos + + PRSTATUS_OFFSET_PR_REG); +} + +#define PRPSINFO_SIZE 0x88 +#define PRPSINFO_OFFSET_PR_PID 0x18 +#define PRPSINFO_OFFSET_PR_FNAME 0x28 +#define PRPSINFO_SIZEOF_PR_FNAME 0x10 +#define PRPSINFO_OFFSET_PR_PS_ARGS 0x38 +#define PRPSINFO_SIZEOF_PR_PS_ARGS 0x50 + +static bool +loongarch_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) +{ + switch (note->descsz) + { + default: + return false; + + /* The sizeof (prpsinfo_t) on Linux/LoongArch. */ + case PRPSINFO_SIZE: + /* pr_pid */ + elf_tdata (abfd)->core->pid = + bfd_get_32 (abfd, note->descdata + PRPSINFO_OFFSET_PR_PID); + + /* pr_fname */ + elf_tdata (abfd)->core->program = + _bfd_elfcore_strndup (abfd, note->descdata + PRPSINFO_OFFSET_PR_FNAME, + PRPSINFO_SIZEOF_PR_FNAME); + + /* pr_psargs */ + elf_tdata (abfd)->core->command = + _bfd_elfcore_strndup (abfd, note->descdata + PRPSINFO_OFFSET_PR_PS_ARGS, + PRPSINFO_SIZEOF_PR_PS_ARGS); + break; + } + + /* Note that for some reason, a spurious space is tacked + onto the end of the args in some (at least one anyway) + implementations, so strip it off if it exists. */ + + { + char *command = elf_tdata (abfd)->core->command; + int n = strlen (command); + + if (0 < n && command[n - 1] == ' ') + command[n - 1] = '\0'; + } + + return true; +} + +/* Set the right mach type. */ +static bool +loongarch_elf_object_p (bfd *abfd) +{ + /* There are only two mach types in LoongArch currently. */ + if (strcmp (abfd->xvec->name, "elf64-loongarch") == 0) + bfd_default_set_arch_mach (abfd, bfd_arch_loongarch, bfd_mach_loongarch64); + else + bfd_default_set_arch_mach (abfd, bfd_arch_loongarch, bfd_mach_loongarch32); + return true; +} + +static asection * +loongarch_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info, + Elf_Internal_Rela *rel, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) +{ + if (h != NULL) + switch (ELFNN_R_TYPE (rel->r_info)) + { + case R_LARCH_GNU_VTINHERIT: + case R_LARCH_GNU_VTENTRY: + return NULL; + } + + return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); +} + +/* Return TRUE if symbol H should be hashed in the `.gnu.hash' section. For + executable PLT slots where the executable never takes the address of those + functions, the function symbols are not added to the hash table. */ + +static bool +elf_loongarch64_hash_symbol (struct elf_link_hash_entry *h) +{ + if (h->plt.offset != (bfd_vma) -1 + && !h->def_regular + && !h->pointer_equality_needed) + return false; + + return _bfd_elf_hash_symbol (h); +} + +#define TARGET_LITTLE_SYM loongarch_elfNN_vec +#define TARGET_LITTLE_NAME "elfNN-loongarch" +#define ELF_ARCH bfd_arch_loongarch +#define ELF_TARGET_ID LARCH_ELF_DATA +#define ELF_MACHINE_CODE EM_LOONGARCH +#define ELF_MAXPAGESIZE 0x4000 +#define bfd_elfNN_bfd_reloc_type_lookup loongarch_reloc_type_lookup +#define bfd_elfNN_bfd_link_hash_table_create \ + loongarch_elf_link_hash_table_create +#define bfd_elfNN_bfd_reloc_name_lookup loongarch_reloc_name_lookup +#define elf_info_to_howto_rel NULL /* Fall through to elf_info_to_howto. */ +#define elf_info_to_howto loongarch_info_to_howto_rela +#define bfd_elfNN_bfd_merge_private_bfd_data \ + elfNN_loongarch_merge_private_bfd_data + +#define elf_backend_reloc_type_class loongarch_reloc_type_class +#define elf_backend_copy_indirect_symbol loongarch_elf_copy_indirect_symbol +#define elf_backend_create_dynamic_sections \ + loongarch_elf_create_dynamic_sections +#define elf_backend_check_relocs loongarch_elf_check_relocs +#define elf_backend_adjust_dynamic_symbol loongarch_elf_adjust_dynamic_symbol +#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections +#define elf_backend_relocate_section loongarch_elf_relocate_section +#define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol +#define elf_backend_finish_dynamic_sections \ + loongarch_elf_finish_dynamic_sections +#define elf_backend_object_p loongarch_elf_object_p +#define elf_backend_gc_mark_hook loongarch_elf_gc_mark_hook +#define elf_backend_plt_sym_val loongarch_elf_plt_sym_val +#define elf_backend_grok_prstatus loongarch_elf_grok_prstatus +#define elf_backend_grok_psinfo loongarch_elf_grok_psinfo +#define elf_backend_hash_symbol elf_loongarch64_hash_symbol + +#include "elfNN-target.h" diff --git a/bfd/elfxx-loongarch.c b/bfd/elfxx-loongarch.c new file mode 100644 index 00000000..1455b57a --- /dev/null +++ b/bfd/elfxx-loongarch.c @@ -0,0 +1,1618 @@ +/* LoongArch-specific support for ELF. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + Based on LoongArch target. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" +#include "elf-bfd.h" +#include "elf/loongarch.h" +#include "elfxx-loongarch.h" + +#define ALL_ONES (~ (bfd_vma) 0) + +typedef struct loongarch_reloc_howto_type_struct +{ + /* The first must be reloc_howto_type! */ + reloc_howto_type howto; + bfd_reloc_code_real_type bfd_type; + bool (*adjust_reloc_bits)(reloc_howto_type *, bfd_vma *); + const char *larch_reloc_type_name; +} loongarch_reloc_howto_type; + +#define LOONGARCH_DEFAULT_HOWTO(r_name) \ + { HOWTO (R_LARCH_##r_name, 0, 2, 32, false, 0, complain_overflow_signed, \ + bfd_elf_generic_reloc, "R_LARCH_" #r_name, false, 0, ALL_ONES, \ + false), BFD_RELOC_LARCH_##r_name, NULL, NULL } + +#define LOONGARCH_HOWTO(type, right, size, bits, pcrel, left, ovf, func, \ + name, inplace, src_mask, dst_mask, pcrel_off, btype, afunc,lname) \ + { HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \ + inplace, src_mask, dst_mask, pcrel_off), btype, afunc, lname } + +#define LOONGARCH_EMPTY_HOWTO(C) \ + { EMPTY_HOWTO (C), BFD_RELOC_NONE, NULL, NULL } + +static bool +reloc_bits (reloc_howto_type *howto, bfd_vma *val); +static bool +reloc_bits_b16 (reloc_howto_type *howto, bfd_vma *fix_val); +static bool +reloc_bits_b21 (reloc_howto_type *howto, bfd_vma *fix_val); +static bool +reloc_bits_b26 (reloc_howto_type *howto, bfd_vma *val); + +/* This does not include any relocation information, but should be + good enough for GDB or objdump to read the file. */ +static loongarch_reloc_howto_type loongarch_howto_table[] = +{ + /* No relocation. */ + LOONGARCH_HOWTO (R_LARCH_NONE, /* type (0). */ + 0, /* rightshift */ + 3, /* size */ + 0, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_NONE", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + /* 32 bit relocation. */ + LOONGARCH_HOWTO (R_LARCH_32, /* type (1). */ + 0, /* rightshift */ + 2, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_32", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_32, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + /* 64 bit relocation. */ + LOONGARCH_HOWTO (R_LARCH_64, /* type (2). */ + 0, /* rightshift */ + 4, /* size */ + 64, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_64", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_64, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_RELATIVE, /* type (3). */ + 0, /* rightshift */ + 2, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_RELATIVE", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* undefined? */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_COPY, /* type (4). */ + 0, /* rightshift */ + 3, /* this one is variable size */ + 0, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_COPY", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* undefined? */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_JUMP_SLOT, /* type (5). */ + 0, /* rightshift */ + 4, /* size */ + 64, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_bitfield, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_JUMP_SLOT", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* undefined? */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + /* Dynamic TLS relocations. */ + LOONGARCH_HOWTO (R_LARCH_TLS_DTPMOD32, /* type (6). */ + 0, /* rightshift */ + 2, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_TLS_DTPMOD32", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_DTPMOD32, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_DTPMOD64, /* type (7). */ + 0, /* rightshift */ + 4, /* size */ + 64, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_TLS_DTPMOD64", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_DTPMOD64, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_DTPREL32, /* type (8). */ + 0, /* rightshift */ + 2, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_TLS_DTPREL32", /* name */ + true, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_DTPREL32, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_DTPREL64, /* type (9). */ + 0, /* rightshift */ + 4, /* size */ + 64, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_TLS_DTPREL64", /* name */ + true, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_DTPREL64, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_TPREL32, /* type (10). */ + 0, /* rightshift */ + 2, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_TLS_TPREL32", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_TPREL32, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_TPREL64, /* type (11). */ + 0, /* rightshift */ + 4, /* size */ + 64, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_TLS_TPREL64", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_TPREL64, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_IRELATIVE, /* type (12). */ + 0, /* rightshift */ + 2, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_IRELATIVE", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* undefined? */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_EMPTY_HOWTO (13), + LOONGARCH_EMPTY_HOWTO (14), + LOONGARCH_EMPTY_HOWTO (15), + LOONGARCH_EMPTY_HOWTO (16), + LOONGARCH_EMPTY_HOWTO (17), + LOONGARCH_EMPTY_HOWTO (18), + LOONGARCH_EMPTY_HOWTO (19), + + LOONGARCH_HOWTO (R_LARCH_MARK_LA, /* type (20). */ + 0, /* rightshift. */ + 3, /* size. */ + 0, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_MARK_LA", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask. */ + 0, /* dst_mask. */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_MARK_LA, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_MARK_PCREL, /* type (21). */ + 0, /* rightshift. */ + 3, /* size. */ + 0, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_MARK_PCREL", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask. */ + 0, /* dst_mask. */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_MARK_PCREL, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_PUSH_PCREL, /* type (22). */ + 2, /* rightshift. */ + 2, /* size. */ + 32, /* bitsize. */ + true /* FIXME: somewhat use this. */, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_PUSH_PCREL", /* name. */ + false, /* partial_inplace. */ + 0x03ffffff, /* src_mask. */ + 0x03ffffff, /* dst_mask. */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_PUSH_PCREL, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + /* type 23-37. */ + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_ABSOLUTE), + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_DUP), + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_GPREL), + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_TLS_TPREL), + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_TLS_GOT), + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_TLS_GD), + LOONGARCH_DEFAULT_HOWTO (SOP_PUSH_PLT_PCREL), + LOONGARCH_DEFAULT_HOWTO (SOP_ASSERT), + LOONGARCH_DEFAULT_HOWTO (SOP_NOT), + LOONGARCH_DEFAULT_HOWTO (SOP_SUB), + LOONGARCH_DEFAULT_HOWTO (SOP_SL), + LOONGARCH_DEFAULT_HOWTO (SOP_SR), + LOONGARCH_DEFAULT_HOWTO (SOP_ADD), + LOONGARCH_DEFAULT_HOWTO (SOP_AND), + LOONGARCH_DEFAULT_HOWTO (SOP_IF_ELSE), + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_5, /* type (38). */ + 0, /* rightshift. */ + 2, /* size. */ + 5, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_10_5", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x7c00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_10_5, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_U_10_12, /* type (39). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_unsigned, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_U_10_12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_U_10_12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_12, /* type (40). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_10_12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_10_12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_16, /* type (41). */ + 0, /* rightshift. */ + 2, /* size. */ + 16, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_10_16", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3fffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_10_16, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_10_16_S2, /* type (42). */ + 2, /* rightshift. */ + 2, /* size. */ + 16, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_10_16_S2", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3fffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2, /* bfd_reloc_code_real_type */ + reloc_bits_b16, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_5_20, /* type (43). */ + 0, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_5_20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_5_20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_0_5_10_16_S2, + /* type (44). */ + 2, /* rightshift. */ + 2, /* size. */ + 21, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_0_5_10_16_S2", /* name. */ + false, /* partial_inplace. */ + 0xfc0003e0, /* src_mask */ + 0xfc0003e0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2, + /* bfd_reloc_code_real_type */ + reloc_bits_b21, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_S_0_10_10_16_S2, /* type (45). */ + 2, /* rightshift. */ + 2, /* size. */ + 26, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_0_10_10_16_S2", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x03ffffff, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2, + /* bfd_reloc_code_real_type */ + reloc_bits_b26, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SOP_POP_32_U, /* type (46). */ + 0, /* rightshift. */ + 2, /* size. */ + 32, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_unsigned, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SOP_POP_32_S_U", /* name. */ + false, /* partial_inplace. */ + 0xffffffff00000000, /* src_mask */ + 0x00000000ffffffff, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SOP_POP_32_U, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ADD8, /* type (47). */ + 0, /* rightshift. */ + 2, /* size. */ + 8, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ADD8", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ADD8, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ADD16, /* type (48). */ + 0, /* rightshift. */ + 2, /* size. */ + 16, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ADD16", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ADD16, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ADD24, /* type (49). */ + 0, /* rightshift. */ + 2, /* size. */ + 24, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ADD24", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ADD24, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ADD32, /* type (50). */ + 0, /* rightshift. */ + 2, /* size. */ + 32, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ADD32", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ADD32, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ADD64, /* type (51). */ + 0, /* rightshift. */ + 4, /* size. */ + 64, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ADD64", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ADD64, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SUB8, /* type (52). */ + 0, /* rightshift. */ + 2, /* size. */ + 8, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SUB8", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SUB8, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SUB16, /* type (53). */ + 0, /* rightshift. */ + 2, /* size. */ + 16, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SUB16", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SUB16, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SUB24, /* type (54). */ + 0, /* rightshift. */ + 2, /* size. */ + 24, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SUB24", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SUB24, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SUB32, /* type (55). */ + 0, /* rightshift. */ + 2, /* size. */ + 32, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SUB32", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SUB32, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_SUB64, /* type (56). */ + 0, /* rightshift. */ + 4, /* size. */ + 64, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_SUB64", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + ALL_ONES, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_SUB64, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GNU_VTINHERIT, /* type (57). */ + 0, /* rightshift. */ + 3, /* size. */ + 0, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GNU_VTINHERIT", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GNU_VTENTRY, /* type (58). */ + 0, /* rightshift. */ + 3, /* size. */ + 0, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + NULL, /* special_function. */ + "R_LARCH_GNU_VTENTRY", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_NONE, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_EMPTY_HOWTO (59), + LOONGARCH_EMPTY_HOWTO (60), + LOONGARCH_EMPTY_HOWTO (61), + LOONGARCH_EMPTY_HOWTO (62), + LOONGARCH_EMPTY_HOWTO (63), + + /* New reloc types. */ + LOONGARCH_HOWTO (R_LARCH_B16, /* type (64). */ + 2, /* rightshift. */ + 2, /* size. */ + 16, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_B16", /* name. */ + false, /* partial_inplace. */ + 0x3fffc00, /* src_mask */ + 0x3fffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_B16, /* bfd_reloc_code_real_type */ + reloc_bits_b16, /* adjust_reloc_bits */ + "b16"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_B21, /* type (65). */ + 2, /* rightshift. */ + 2, /* size. */ + 21, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_B21", /* name. */ + false, /* partial_inplace. */ + 0xfc0003e0, /* src_mask */ + 0xfc0003e0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_B21, /* bfd_reloc_code_real_type */ + reloc_bits_b21, /* adjust_reloc_bits */ + "b21"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_B26, /* type (66). */ + 2, /* rightshift. */ + 2, /* size. */ + 26, /* bitsize. */ + false, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_B26", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x03ffffff, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_B26, /* bfd_reloc_code_real_type */ + reloc_bits_b26, /* adjust_reloc_bits */ + "b26"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ABS_HI20, /* type (67). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ABS_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ABS_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "abs_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ABS_LO12, /* type (68). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_unsigned, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ABS_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ABS_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "abs_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ABS64_LO20, /* type (69). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ABS64_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ABS64_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "abs64_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_ABS64_HI12, /* type (70). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_ABS64_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_ABS64_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "abs64_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_PCALA_HI20, /* type (71). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_PCALA_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_PCALA_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "pc_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_PCALA_LO12, /* type (72). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_PCALA_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_PCALA_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "pc_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_PCALA64_LO20, /* type (73). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_PCALA64_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_PCALA64_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "pc64_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_PCALA64_HI12, /* type (74). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_PCALA64_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_PCALA64_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "pc64_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT_PC_HI20, /* type (75). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT_PC_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT_PC_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got_pc_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT_PC_LO12, /* type (76). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT_PC_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT_PC_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got_pc_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT64_PC_LO20, /* type (77). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT64_PC_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT64_PC_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got64_pc_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT64_PC_HI12, /* type (78). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT64_PC_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT64_PC_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got64_pc_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT_HI20, /* type (79). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT_LO12, /* type (80). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT64_LO20, /* type (81). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT64_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT64_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got64_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_GOT64_HI12, /* type (82). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_GOT64_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_GOT64_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "got64_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LE_HI20, /* type (83). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LE_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LE_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "le_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LE_LO12, /* type (84). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LE_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LE_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "le_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LE64_LO20, /* type (85). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LE64_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LE64_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "le64_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LE64_HI12, /* type (86). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LE64_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LE64_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "le64_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE_PC_HI20, /* type (87). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE_PC_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE_PC_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie_pc_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE_PC_LO12, /* type (88). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_unsigned, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE_PC_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE_PC_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie_pc_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE64_PC_LO20, /* type (89). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE64_PC_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE64_PC_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie64_pc_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE64_PC_HI12, /* type (90). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE64_PC_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE64_PC_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie64_pc_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE_HI20, /* type (91). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE_LO12, /* type (92). */ + 0, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE_LO12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE_LO12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie_lo12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE64_LO20, /* type (93). */ + 32, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE64_LO20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE64_LO20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie64_lo20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_IE64_HI12, /* type (94). */ + 52, /* rightshift. */ + 2, /* size. */ + 12, /* bitsize. */ + false, /* pc_relative. */ + 10, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_IE64_HI12", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x3ffc00, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_IE64_HI12, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ie64_hi12"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LD_PC_HI20, /* type (95). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LD_PC_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LD_PC_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ld_pc_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_LD_HI20, /* type (96). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_LD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_LD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "ld_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_GD_PC_HI20, /* type (97). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_GD_PC_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_GD_PC_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "gd_pc_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_TLS_GD_HI20, /* type (98). */ + 12, /* rightshift. */ + 2, /* size. */ + 20, /* bitsize. */ + false, /* pc_relative. */ + 5, /* bitpos. */ + complain_overflow_signed, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_TLS_GD_HI20", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0x1ffffe0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_TLS_GD_HI20, /* bfd_reloc_code_real_type */ + reloc_bits, /* adjust_reloc_bits */ + "gd_hi20"), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_32_PCREL, /* type (99). */ + 0, /* rightshift. */ + 2, /* size. */ + 32, /* bitsize. */ + true, /* pc_relative. */ + 0, /* bitpos. */ + complain_overflow_dont, /* complain_on_overflow. */ + bfd_elf_generic_reloc, /* special_function. */ + "R_LARCH_32_PCREL", /* name. */ + false, /* partial_inplace. */ + 0, /* src_mask */ + 0xffffffff, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_32_PCREL, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + + LOONGARCH_HOWTO (R_LARCH_RELAX, /* type (100). */ + 0, /* rightshift */ + 0, /* size */ + 0, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_LARCH_RELAX", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + 0, /* dst_mask */ + false, /* pcrel_offset */ + BFD_RELOC_LARCH_RELAX, /* bfd_reloc_code_real_type */ + NULL, /* adjust_reloc_bits */ + NULL), /* larch_reloc_type_name */ + +}; + +reloc_howto_type * +loongarch_elf_rtype_to_howto (bfd *abfd, unsigned int r_type) +{ + if(r_type < R_LARCH_count) + { + /* For search table fast. */ + BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count); + + if (loongarch_howto_table[r_type].howto.type == r_type) + return (reloc_howto_type *)&loongarch_howto_table[r_type]; + + for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) + if (loongarch_howto_table[i].howto.type == r_type) + return (reloc_howto_type *)&loongarch_howto_table[i]; + } + + (*_bfd_error_handler) (_("%pB: unsupported relocation type %#x"), + abfd, r_type); + bfd_set_error (bfd_error_bad_value); + return NULL; +} + +reloc_howto_type * +loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name) +{ + BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count); + + for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) + if (loongarch_howto_table[i].howto.name + && strcasecmp (loongarch_howto_table[i].howto.name, r_name) == 0) + return (reloc_howto_type *)&loongarch_howto_table[i]; + + (*_bfd_error_handler) (_("%pB: unsupported relocation type %s"), + abfd, r_name); + bfd_set_error (bfd_error_bad_value); + + return NULL; +} + +/* Cost so much. */ +reloc_howto_type * +loongarch_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) +{ + BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count); + + /* Fast search for new reloc types. */ + if (BFD_RELOC_LARCH_B16 <= code && code < BFD_RELOC_LARCH_RELAX) + { + BFD_ASSERT (BFD_RELOC_LARCH_RELAX - BFD_RELOC_LARCH_B16 + == R_LARCH_RELAX - R_LARCH_B16); + loongarch_reloc_howto_type *ht = NULL; + ht = &loongarch_howto_table[code - BFD_RELOC_LARCH_B16 + R_LARCH_B16]; + BFD_ASSERT (ht->bfd_type == code); + return (reloc_howto_type *)ht; + } + + for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) + if (loongarch_howto_table[i].bfd_type == code) + return (reloc_howto_type *)&loongarch_howto_table[i]; + + (*_bfd_error_handler) (_("%pB: unsupported bfd relocation type %#x"), + abfd, code); + bfd_set_error (bfd_error_bad_value); + + return NULL; +} + +bfd_reloc_code_real_type +loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *l_r_name) +{ + for (size_t i = 0; i < ARRAY_SIZE (loongarch_howto_table); i++) + { + loongarch_reloc_howto_type *lht = &loongarch_howto_table[i]; + if ((NULL != lht->larch_reloc_type_name) + && (0 == strcmp (lht->larch_reloc_type_name, l_r_name))) + return lht->bfd_type; + } + + (*_bfd_error_handler) (_("%pB: unsupported relocation type name %s"), + abfd, l_r_name); + bfd_set_error (bfd_error_bad_value); + return BFD_RELOC_NONE; +} + + +/* Functions for reloc bits field. + 1. Signed extend *fix_val. + 2. Return false if overflow. */ + +#define LARCH_RELOC_BFD_VMA_BIT_MASK(bitsize) \ + (~((((bfd_vma)0x1) << (bitsize)) - 1)) + +/* Adjust val to perform insn + BFD_RELOC_LARCH_SOP_POP_32_S_10_5 + BFD_RELOC_LARCH_SOP_POP_32_S_10_12 + BFD_RELOC_LARCH_SOP_POP_32_U_10_12 + BFD_RELOC_LARCH_SOP_POP_32_S_10_16 + BFD_RELOC_LARCH_SOP_POP_32_S_5_20 + BFD_RELOC_LARCH_SOP_POP_32_U. */ +static bool +reloc_bits (reloc_howto_type *howto, bfd_vma *fix_val) +{ + bfd_signed_vma val = ((bfd_signed_vma)(*fix_val)) >> howto->rightshift; + + /* Perform insn bits field. */ + val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); + val <<= howto->bitpos; + + *fix_val = (bfd_vma)val; + + return true; +} + +/* Adjust val to perform insn + R_LARCH_SOP_POP_32_S_10_16_S2 + R_LARCH_B16. */ +static bool +reloc_bits_b16 (reloc_howto_type *howto, bfd_vma *fix_val) +{ + if (howto->complain_on_overflow != complain_overflow_signed) + return false; + + bfd_signed_vma val = *fix_val; + + /* Judge whether 4 bytes align. */ + if (val & ((0x1UL << howto->rightshift) - 1)) + return false; + + int bitsize = howto->bitsize + howto->rightshift; + bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; + + /* If val < 0, sign bit is 1. */ + if (sig_bit) + { + /* Signed bits is 1. */ + if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) + != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) + return false; + } + else + { + /* Signed bits is 0. */ + if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) + return false; + } + + /* Perform insn bits field. */ + val >>= howto->rightshift; + val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); + val <<= howto->bitpos; + + *fix_val = val; + + return true; +} + +/* Reloc type : + R_LARCH_SOP_POP_32_S_0_5_10_16_S2 + R_LARCH_B21. */ +static bool +reloc_bits_b21 (reloc_howto_type *howto, + bfd_vma *fix_val) +{ + if (howto->complain_on_overflow != complain_overflow_signed) + return false; + + bfd_signed_vma val = *fix_val; + + if (val & ((0x1UL << howto->rightshift) - 1)) + return false; + + int bitsize = howto->bitsize + howto->rightshift; + bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; + + /* If val < 0. */ + if (sig_bit) + { + if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) + != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) + return false; + } + else + { + if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) + return false; + } + + /* Perform insn bits field. */ + val >>= howto->rightshift; + val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); + + /* Perform insn bits field. 15:0<<10, 20:16>>16. */ + val = ((val & 0xffff) << 10) | ((val >> 16) & 0x1f); + + *fix_val = val; + + return true; +} + +/* Reloc type: + R_LARCH_SOP_POP_32_S_0_10_10_16_S2 + R_LARCH_B26. */ +static bool +reloc_bits_b26 (reloc_howto_type *howto, + bfd_vma *fix_val) +{ + /* Return false if overflow. */ + if (howto->complain_on_overflow != complain_overflow_signed) + return false; + + bfd_signed_vma val = *fix_val; + + if (val & ((0x1UL << howto->rightshift) - 1)) + return false; + + int bitsize = howto->bitsize + howto->rightshift; + bfd_signed_vma sig_bit = (val >> (bitsize - 1)) & 0x1; + + /* If val < 0. */ + if (sig_bit) + { + if ((LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1) & val) + != LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize - 1)) + return false; + } + else + { + if (LARCH_RELOC_BFD_VMA_BIT_MASK (bitsize) & val) + return false; + } + + /* Perform insn bits field. */ + val >>= howto->rightshift; + val = val & (((bfd_vma)0x1 << howto->bitsize) - 1); + + /* Perform insn bits field. 25:16>>16, 15:0<<10. */ + val = ((val & 0xffff) << 10) | ((val >> 16) & 0x3ff); + + *fix_val = val; + + return true; +} + +bool +loongarch_adjust_reloc_bitsfield (reloc_howto_type *howto, + bfd_vma *fix_val) +{ + BFD_ASSERT (((loongarch_reloc_howto_type *)howto)->adjust_reloc_bits); + return ((loongarch_reloc_howto_type *) + howto)->adjust_reloc_bits(howto, fix_val); +} diff --git a/bfd/elfxx-loongarch.h b/bfd/elfxx-loongarch.h new file mode 100644 index 00000000..7b8a7213 --- /dev/null +++ b/bfd/elfxx-loongarch.h @@ -0,0 +1,45 @@ +/* LoongArch-specific backend routines. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "elf/common.h" +#include "elf/internal.h" + +extern reloc_howto_type * +loongarch_elf_rtype_to_howto (bfd *abfd, unsigned int r_type); + +extern reloc_howto_type * +loongarch_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code); + +extern reloc_howto_type * +loongarch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name); + +extern bfd_reloc_code_real_type +loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *l_r_name); + +bool loongarch_adjust_reloc_bitsfield (reloc_howto_type *howto, bfd_vma *fix_val); + +/* TRUE if this is a PLT reference to a local IFUNC. */ +#define PLT_LOCAL_IFUNC_P(INFO, H) \ + ((H)->dynindx == -1 \ + || ((bfd_link_executable (INFO) \ + || ELF_ST_VISIBILITY ((H)->other) != STV_DEFAULT) \ + && (H)->def_regular \ + && (H)->type == STT_GNU_IFUNC)) diff --git a/bfd/libbfd.h b/bfd/libbfd.h index c37ddc03..1b689f2d 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -3413,6 +3413,86 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4", "BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4", "BFD_RELOC_S12Z_OPR", + "BFD_RELOC_LARCH_TLS_DTPMOD32", + "BFD_RELOC_LARCH_TLS_DTPREL32", + "BFD_RELOC_LARCH_TLS_DTPMOD64", + "BFD_RELOC_LARCH_TLS_DTPREL64", + "BFD_RELOC_LARCH_TLS_TPREL32", + "BFD_RELOC_LARCH_TLS_TPREL64", + "BFD_RELOC_LARCH_MARK_LA", + "BFD_RELOC_LARCH_MARK_PCREL", + "BFD_RELOC_LARCH_SOP_PUSH_PCREL", + "BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE", + "BFD_RELOC_LARCH_SOP_PUSH_DUP", + "BFD_RELOC_LARCH_SOP_PUSH_GPREL", + "BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL", + "BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT", + "BFD_RELOC_LARCH_SOP_PUSH_TLS_GD", + "BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL", + "BFD_RELOC_LARCH_SOP_ASSERT", + "BFD_RELOC_LARCH_SOP_NOT", + "BFD_RELOC_LARCH_SOP_SUB", + "BFD_RELOC_LARCH_SOP_SL", + "BFD_RELOC_LARCH_SOP_SR", + "BFD_RELOC_LARCH_SOP_ADD", + "BFD_RELOC_LARCH_SOP_AND", + "BFD_RELOC_LARCH_SOP_IF_ELSE", + "BFD_RELOC_LARCH_SOP_POP_32_S_10_5", + "BFD_RELOC_LARCH_SOP_POP_32_U_10_12", + "BFD_RELOC_LARCH_SOP_POP_32_S_10_12", + "BFD_RELOC_LARCH_SOP_POP_32_S_10_16", + "BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2", + "BFD_RELOC_LARCH_SOP_POP_32_S_5_20", + "BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2", + "BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2", + "BFD_RELOC_LARCH_SOP_POP_32_U", + "BFD_RELOC_LARCH_ADD8", + "BFD_RELOC_LARCH_ADD16", + "BFD_RELOC_LARCH_ADD24", + "BFD_RELOC_LARCH_ADD32", + "BFD_RELOC_LARCH_ADD64", + "BFD_RELOC_LARCH_SUB8", + "BFD_RELOC_LARCH_SUB16", + "BFD_RELOC_LARCH_SUB24", + "BFD_RELOC_LARCH_SUB32", + "BFD_RELOC_LARCH_SUB64", + "BFD_RELOC_LARCH_B16", + "BFD_RELOC_LARCH_B21", + "BFD_RELOC_LARCH_B26", + "BFD_RELOC_LARCH_ABS_HI20", + "BFD_RELOC_LARCH_ABS_LO12", + "BFD_RELOC_LARCH_ABS64_LO20", + "BFD_RELOC_LARCH_ABS64_HI12", + "BFD_RELOC_LARCH_PCALA_HI20", + "BFD_RELOC_LARCH_PCALA_LO12", + "BFD_RELOC_LARCH_PCALA64_LO20", + "BFD_RELOC_LARCH_PCALA64_HI12", + "BFD_RELOC_LARCH_GOT_PC_HI20", + "BFD_RELOC_LARCH_GOT_PC_LO12", + "BFD_RELOC_LARCH_GOT64_PC_LO20", + "BFD_RELOC_LARCH_GOT64_PC_HI12", + "BFD_RELOC_LARCH_GOT_HI20", + "BFD_RELOC_LARCH_GOT_LO12", + "BFD_RELOC_LARCH_GOT64_LO20", + "BFD_RELOC_LARCH_GOT64_HI12", + "BFD_RELOC_LARCH_TLS_LE_HI20", + "BFD_RELOC_LARCH_TLS_LE_LO12", + "BFD_RELOC_LARCH_TLS_LE64_LO20", + "BFD_RELOC_LARCH_TLS_LE64_HI12", + "BFD_RELOC_LARCH_TLS_IE_PC_HI20", + "BFD_RELOC_LARCH_TLS_IE_PC_LO12", + "BFD_RELOC_LARCH_TLS_IE64_PC_LO20", + "BFD_RELOC_LARCH_TLS_IE64_PC_HI12", + "BFD_RELOC_LARCH_TLS_IE_HI20", + "BFD_RELOC_LARCH_TLS_IE_LO12", + "BFD_RELOC_LARCH_TLS_IE64_LO20", + "BFD_RELOC_LARCH_TLS_IE64_HI12", + "BFD_RELOC_LARCH_TLS_LD_PC_HI20", + "BFD_RELOC_LARCH_TLS_LD_HI20", + "BFD_RELOC_LARCH_TLS_GD_PC_HI20", + "BFD_RELOC_LARCH_TLS_GD_HI20", + "BFD_RELOC_LARCH_32_PCREL", + "BFD_RELOC_LARCH_RELAX", "@@overflow: BFD_RELOC_UNUSED@@", }; #endif diff --git a/bfd/po/BLD-POTFILES.in b/bfd/po/BLD-POTFILES.in index f0a870df..4ce76916 100644 --- a/bfd/po/BLD-POTFILES.in +++ b/bfd/po/BLD-POTFILES.in @@ -1,10 +1,12 @@ bfdver.h elf32-aarch64.c elf32-ia64.c +elf32-loongarch.c elf32-riscv.c elf32-target.h elf64-aarch64.c elf64-ia64.c +elf64-loongarch.c elf64-riscv.c elf64-target.h pe-aarch64igen.c diff --git a/bfd/po/SRC-POTFILES.in b/bfd/po/SRC-POTFILES.in index 10de7bc0..bf742bb4 100644 --- a/bfd/po/SRC-POTFILES.in +++ b/bfd/po/SRC-POTFILES.in @@ -72,6 +72,7 @@ cpu-iq2000.c cpu-k1om.c cpu-l1om.c cpu-lm32.c +cpu-loongarch.c cpu-m10200.c cpu-m10300.c cpu-m32c.c diff --git a/bfd/reloc.c b/bfd/reloc.c index 6d920e1d..3c768b64 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -8171,6 +8171,177 @@ ENUM ENUMDOC S12Z relocations. +ENUM + BFD_RELOC_LARCH_TLS_DTPMOD32 +ENUMX + BFD_RELOC_LARCH_TLS_DTPREL32 +ENUMX + BFD_RELOC_LARCH_TLS_DTPMOD64 +ENUMX + BFD_RELOC_LARCH_TLS_DTPREL64 +ENUMX + BFD_RELOC_LARCH_TLS_TPREL32 +ENUMX + BFD_RELOC_LARCH_TLS_TPREL64 +ENUMX + BFD_RELOC_LARCH_MARK_LA +ENUMX + BFD_RELOC_LARCH_MARK_PCREL +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_PCREL +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_DUP +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_GPREL +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_TLS_GD +ENUMX + BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL +ENUMX + BFD_RELOC_LARCH_SOP_ASSERT +ENUMX + BFD_RELOC_LARCH_SOP_NOT +ENUMX + BFD_RELOC_LARCH_SOP_SUB +ENUMX + BFD_RELOC_LARCH_SOP_SL +ENUMX + BFD_RELOC_LARCH_SOP_SR +ENUMX + BFD_RELOC_LARCH_SOP_ADD +ENUMX + BFD_RELOC_LARCH_SOP_AND +ENUMX + BFD_RELOC_LARCH_SOP_IF_ELSE +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_10_5 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_U_10_12 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_10_12 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_10_16 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_5_20 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2 +ENUMX + BFD_RELOC_LARCH_SOP_POP_32_U +ENUMX + BFD_RELOC_LARCH_ADD8 +ENUMX + BFD_RELOC_LARCH_ADD16 +ENUMX + BFD_RELOC_LARCH_ADD24 +ENUMX + BFD_RELOC_LARCH_ADD32 +ENUMX + BFD_RELOC_LARCH_ADD64 +ENUMX + BFD_RELOC_LARCH_SUB8 +ENUMX + BFD_RELOC_LARCH_SUB16 +ENUMX + BFD_RELOC_LARCH_SUB24 +ENUMX + BFD_RELOC_LARCH_SUB32 +ENUMX + BFD_RELOC_LARCH_SUB64 + +ENUMX + BFD_RELOC_LARCH_B16 +ENUMX + BFD_RELOC_LARCH_B21 +ENUMX + BFD_RELOC_LARCH_B26 + +ENUMX + BFD_RELOC_LARCH_ABS_HI20 +ENUMX + BFD_RELOC_LARCH_ABS_LO12 +ENUMX + BFD_RELOC_LARCH_ABS64_LO20 +ENUMX + BFD_RELOC_LARCH_ABS64_HI12 + +ENUMX + BFD_RELOC_LARCH_PCALA_HI20 +ENUMX + BFD_RELOC_LARCH_PCALA_LO12 +ENUMX + BFD_RELOC_LARCH_PCALA64_LO20 +ENUMX + BFD_RELOC_LARCH_PCALA64_HI12 + +ENUMX + BFD_RELOC_LARCH_GOT_PC_HI20 +ENUMX + BFD_RELOC_LARCH_GOT_PC_LO12 +ENUMX + BFD_RELOC_LARCH_GOT64_PC_LO20 +ENUMX + BFD_RELOC_LARCH_GOT64_PC_HI12 +ENUMX + BFD_RELOC_LARCH_GOT_HI20 +ENUMX + BFD_RELOC_LARCH_GOT_LO12 +ENUMX + BFD_RELOC_LARCH_GOT64_LO20 +ENUMX + BFD_RELOC_LARCH_GOT64_HI12 + +ENUMX + BFD_RELOC_LARCH_TLS_LE_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_LE_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_LE64_LO20 +ENUMX + BFD_RELOC_LARCH_TLS_LE64_HI12 +ENUMX + BFD_RELOC_LARCH_TLS_IE_PC_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_IE_PC_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_IE64_PC_LO20 +ENUMX + BFD_RELOC_LARCH_TLS_IE64_PC_HI12 +ENUMX + BFD_RELOC_LARCH_TLS_IE_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_IE_LO12 +ENUMX + BFD_RELOC_LARCH_TLS_IE64_LO20 +ENUMX + BFD_RELOC_LARCH_TLS_IE64_HI12 +ENUMX + BFD_RELOC_LARCH_TLS_LD_PC_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_LD_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_GD_PC_HI20 +ENUMX + BFD_RELOC_LARCH_TLS_GD_HI20 + +ENUMX + BFD_RELOC_LARCH_32_PCREL + +ENUMX + BFD_RELOC_LARCH_RELAX + +ENUMDOC + LARCH relocations. + ENDSENUM BFD_RELOC_UNUSED CODE_FRAGMENT diff --git a/bfd/targets.c b/bfd/targets.c index ae6075b3..672dc2bb 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -769,6 +769,8 @@ extern const bfd_target l1om_elf64_vec; extern const bfd_target l1om_elf64_fbsd_vec; extern const bfd_target lm32_elf32_vec; extern const bfd_target lm32_elf32_fdpic_vec; +extern const bfd_target loongarch_elf64_vec; +extern const bfd_target loongarch_elf32_vec; extern const bfd_target m32c_elf32_vec; extern const bfd_target m32r_elf32_vec; extern const bfd_target m32r_elf32_le_vec; @@ -1361,6 +1363,12 @@ static const bfd_target * const _bfd_target_vector[] = &z80_elf32_vec, &z8k_coff_vec, + +#ifdef BFD64 + &loongarch_elf32_vec, + &loongarch_elf64_vec, +#endif + #endif /* not SELECT_VECS */ /* Always support S-records, for convenience. */ diff --git a/binutils/readelf.c b/binutils/readelf.c index cc9023aa..90eeb115 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -162,6 +162,7 @@ #include "elf/xstormy16.h" #include "elf/xtensa.h" #include "elf/z80.h" +#include "elf/loongarch.h" #include "getopt.h" #include "libiberty.h" @@ -1799,6 +1800,11 @@ dump_relocations (Filedata * filedata, case EM_Z80: rtype = elf_z80_reloc_type (type); break; + + case EM_LOONGARCH: + rtype = elf_loongarch_reloc_type (type); + break; + } if (rtype == NULL) @@ -4091,6 +4097,20 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine) strcat (buf, _(", unknown")); break; } break; + case EM_LOONGARCH: + if (EF_LOONGARCH_IS_SOFT_FLOAT (e_flags)) + strcat (buf, ", SOFT-FLOAT"); + else if (EF_LOONGARCH_IS_SINGLE_FLOAT (e_flags)) + strcat (buf, ", SINGLE-FLOAT"); + else if (EF_LOONGARCH_IS_DOUBLE_FLOAT (e_flags)) + strcat (buf, ", DOUBLE-FLOAT"); + + if (EF_LOONGARCH_IS_OBJ_V0 (e_flags)) + strcat (buf, ", OBJ-v0"); + else if (EF_LOONGARCH_IS_OBJ_V1 (e_flags)) + strcat (buf, ", OBJ-v1"); + + break; } } @@ -13841,6 +13861,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) return reloc_type == 2; /* R_IQ2000_32. */ case EM_LATTICEMICO32: return reloc_type == 3; /* R_LM32_32. */ + case EM_LOONGARCH: + return reloc_type == 1; /* R_LARCH_32. */ case EM_M32C_OLD: case EM_M32C: return reloc_type == 3; /* R_M32C_32. */ @@ -13995,6 +14017,8 @@ is_32bit_pcrel_reloc (Filedata * filedata, unsigned int reloc_type) case EM_AVR_OLD: case EM_AVR: return reloc_type == 36; /* R_AVR_32_PCREL. */ + case EM_LOONGARCH: + return reloc_type == 99; /* R_LARCH_32_PCREL. */ case EM_MICROBLAZE: return reloc_type == 2; /* R_MICROBLAZE_32_PCREL. */ case EM_OR1K: @@ -14058,6 +14082,8 @@ is_64bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) case EM_IA_64: return (reloc_type == 0x26 /* R_IA64_DIR64MSB. */ || reloc_type == 0x27 /* R_IA64_DIR64LSB. */); + case EM_LOONGARCH: + return reloc_type == 2; /* R_LARCH_64 */ case EM_PARISC: return reloc_type == 80; /* R_PARISC_DIR64. */ case EM_PPC64: diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp index c9a7eec7..5b59ae30 100644 --- a/binutils/testsuite/binutils-all/objdump.exp +++ b/binutils/testsuite/binutils-all/objdump.exp @@ -40,7 +40,7 @@ lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k MCore mep c5 h1 MicroB lappend cpus_expected mips mn10200 mn10300 ms1 msp MSP430 nds32 n1h_v3 ns32k lappend cpus_expected or1k or1knd pj powerpc pyramid riscv romp rs6000 s390 sh sparc lappend cpus_expected tic54x tilegx tms320c30 tms320c4x tms320c54x -lappend cpus_expected v850 vax x86-64 xscale xtensa z8k z8001 z8002 +lappend cpus_expected v850 vax x86-64 xscale xtensa z8k z8001 z8002 Loongarch64 # Make sure the target CPU shows up in the list. lappend cpus_expected ${target_cpu} diff --git a/gas/Makefile.am b/gas/Makefile.am index 34190e78..7678ee61 100644 --- a/gas/Makefile.am +++ b/gas/Makefile.am @@ -154,6 +154,7 @@ TARGET_CPU_CFILES = \ config/tc-ip2k.c \ config/tc-iq2000.c \ config/tc-lm32.c \ + config/tc-loongarch.c \ config/tc-m32c.c \ config/tc-m32r.c \ config/tc-m68hc11.c \ @@ -374,7 +375,8 @@ EXTRA_SCRIPTS = .gdbinit EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \ config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \ config/rl78-parse.c config/rl78-parse.h \ - config/rx-parse.c config/rx-parse.h + config/rx-parse.c config/rx-parse.h \ + config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c diststuff: $(EXTRA_DIST) info @@ -471,6 +473,19 @@ config/rx-parse.c: $(srcdir)/config/rx-parse.y config/rx-parse.h: config/rx-parse.c @true +# The LoongArch lexical analyzer and parser. +EXTRA_as_new_SOURCES += config/loongarch-parse.y +config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y + $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ; +config/loongarch-parse.h: config/loongarch-parse.c + @true + +EXTRA_as_new_SOURCES += config/loongarch-lex.l +config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l + $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE) + +config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h + # The mips instruction table specification lexical analyzer and parser. itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h diff --git a/gas/Makefile.in b/gas/Makefile.in index f3d66b8e..ce26e420 100644 --- a/gas/Makefile.in +++ b/gas/Makefile.in @@ -544,6 +544,7 @@ TARGET_CPU_CFILES = \ config/tc-ip2k.c \ config/tc-iq2000.c \ config/tc-lm32.c \ + config/tc-loongarch.c \ config/tc-m32c.c \ config/tc-m32r.c \ config/tc-m68hc11.c \ @@ -757,7 +758,8 @@ EXTRA_SCRIPTS = .gdbinit EXTRA_DIST = config/m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c \ config/bfin-parse.c config/bfin-parse.h config/bfin-lex.c \ config/rl78-parse.c config/rl78-parse.h \ - config/rx-parse.c config/rx-parse.h + config/rx-parse.c config/rx-parse.h \ + config/loongarch-parse.c config/loongarch-parse.h config/loongarch-lex.c DISTCLEANFILES = targ-cpu.h obj-format.h targ-env.h itbl-cpu.h cgen-desc.h @@ -789,12 +791,14 @@ as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ $(extra_objects) $(GASLIBS) $(LIBINTL_DEP) + +# The LoongArch lexical analyzer and parser. EXTRA_as_new_SOURCES = $(CFILES) $(HFILES) $(TARGET_CPU_CFILES) \ $(TARGET_CPU_HFILES) $(TARGET_EXTRA_FILES) $(TARG_ENV_CFILES) \ $(OBJ_FORMAT_CFILES) $(OBJ_FORMAT_HFILES) \ $(CONFIG_ATOF_CFILES) $(MULTI_CFILES) config/m68k-parse.y \ config/bfin-parse.y config/bfin-lex.l config/rl78-parse.y \ - config/rx-parse.y + config/rx-parse.y config/loongarch-parse.y EXPECT = expect RUNTEST = runtest RUNTESTFLAGS = @@ -939,6 +943,8 @@ config/tc-iq2000.$(OBJEXT): config/$(am__dirstamp) \ config/$(DEPDIR)/$(am__dirstamp) config/tc-lm32.$(OBJEXT): config/$(am__dirstamp) \ config/$(DEPDIR)/$(am__dirstamp) +config/tc-loongarch.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) config/tc-m32c.$(OBJEXT): config/$(am__dirstamp) \ config/$(DEPDIR)/$(am__dirstamp) config/tc-m32r.$(OBJEXT): config/$(am__dirstamp) \ @@ -1085,6 +1091,8 @@ config/rl78-parse.$(OBJEXT): config/$(am__dirstamp) \ config/$(DEPDIR)/$(am__dirstamp) config/rx-parse.$(OBJEXT): config/$(am__dirstamp) \ config/$(DEPDIR)/$(am__dirstamp) +config/loongarch-parse.$(OBJEXT): config/$(am__dirstamp) \ + config/$(DEPDIR)/$(am__dirstamp) as-new$(EXEEXT): $(as_new_OBJECTS) $(as_new_DEPENDENCIES) $(EXTRA_as_new_DEPENDENCIES) @rm -f as-new$(EXEEXT) @@ -1146,6 +1154,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386coff.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-i386elf.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/e-mipself.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/loongarch-parse.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/m68k-parse.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-aout.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/obj-coff.Po@am__quote@ @@ -1183,6 +1192,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-ip2k.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-iq2000.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-lm32.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-loongarch.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32c.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m32r.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-m68hc11.Po@am__quote@ @@ -1452,6 +1462,7 @@ maintainer-clean-generic: @echo "it deletes files that may require special tools to rebuild." -rm -f config/bfin-lex.c -rm -f config/bfin-parse.c + -rm -f config/loongarch-parse.c -rm -f config/m68k-parse.c -rm -f config/rl78-parse.c -rm -f config/rx-parse.c @@ -1602,6 +1613,15 @@ config/rx-parse.c: $(srcdir)/config/rx-parse.y config/rx-parse.h: config/rx-parse.c @true +config/loongarch-parse.c: $(srcdir)/config/loongarch-parse.y + $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-parse.y y.tab.c $@ y.tab.h config/loongarch-parse.h -- $(YACCCOMPILE) -d ; +config/loongarch-parse.h: config/loongarch-parse.c + @true +config/loongarch-lex.c: $(srcdir)/config/loongarch-lex.l + $(SHELL) $(YLWRAP) $(srcdir)/config/loongarch-lex.l lex.yy.c $@ -- $(LEXCOMPILE) + +config/loongarch-lex-wrapper.@OBJEXT@: config/loongarch-lex.c config/loongarch-parse.h + # The mips instruction table specification lexical analyzer and parser. itbl-lex-wrapper.@OBJEXT@: itbl-lex.c itbl-parse.h diff --git a/gas/config/loongarch-lex-wrapper.c b/gas/config/loongarch-lex-wrapper.c new file mode 100644 index 00000000..3bb0b14c --- /dev/null +++ b/gas/config/loongarch-lex-wrapper.c @@ -0,0 +1,20 @@ +/* Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "sysdep.h" +#include "config/loongarch-lex.c" diff --git a/gas/config/loongarch-lex.h b/gas/config/loongarch-lex.h new file mode 100644 index 00000000..35d22dbd --- /dev/null +++ b/gas/config/loongarch-lex.h @@ -0,0 +1,37 @@ +/* + Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + + +struct yy_buffer_state; + + +struct yy_buffer_state *yy_scan_string (const char *); +void yy_delete_buffer (struct yy_buffer_state *b); +void get_internal_label (expressionS *label_expr, + unsigned long label, + int augend); +int +loongarch_parse_expr (const char *expr, + struct reloc_info *reloc_stack_top, + size_t max_reloc_num, + size_t *reloc_num, + offsetT *imm); +bfd_reloc_code_real_type +loongarch_larch_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, + const char *l_r_name); diff --git a/gas/config/loongarch-lex.l b/gas/config/loongarch-lex.l new file mode 100644 index 00000000..d96f77ea --- /dev/null +++ b/gas/config/loongarch-lex.l @@ -0,0 +1,61 @@ +%option noyywrap +/* + Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ +%{ +#include "as.h" +#include "loongarch-parse.h" + +/* Flex generates static functions "input" & "unput" which are not used. */ +#define YY_NO_INPUT +#define YY_NO_UNPUT +%} + +D [0-9] +/* We consider anything greater than \x7f to be a "letter" for UTF-8 + support. See the lex_type array in ../read.c. */ +L [a-zA-Z_\.\$\x80-\xff] +H [0-9A-Fa-f] + +hex 0[xX]{H}+ +oct 0[0-7]+ +bin 0[bB][01]+ +dec ([1-9]{D}*)|0 +id ({D}+[fb])|({L}({D}|{L})*)|(:{dec}[bf]) +ws [ \t\v\f]+ + +%% + +{dec} { yylval.imm = strtoull (yytext, 0, 0); return INTEGER; } +{hex} { yylval.imm = strtoull (yytext + 2, 0, 16); return INTEGER; } +{bin} { yylval.imm = strtoull (yytext + 2, 0, 2); return INTEGER; } +{oct} { yylval.imm = strtoull (yytext + 1, 0, 8); return INTEGER; } +{id} { yylval.c_str = strdup (yytext);return IDENTIFIER; } +{ws} { } + +">>" { return RIGHT_OP; } +"<<" { return LEFT_OP; } +"&&" { return AND_OP; } +"||" { return OR_OP; } +"<=" { return LE_OP; } +">=" { return GE_OP; } +"==" { return EQ_OP; } +"!=" { return NE_OP; } +. { return yytext[0];} + +%% diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y new file mode 100644 index 00000000..902d7204 --- /dev/null +++ b/gas/config/loongarch-parse.y @@ -0,0 +1,407 @@ +/* + Copyright (C) 2021-2022 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ +%{ +#include "as.h" +#include "loongarch-lex.h" +#include "loongarch-parse.h" +static void yyerror (const char *s ATTRIBUTE_UNUSED) +{ +}; +int yylex (void); + + +static struct reloc_info *top, *end; + +static expressionS const_0 = +{ + .X_op = O_constant, + .X_add_number = 0 +}; + +static int +is_const (struct reloc_info *info) +{ + return (info->type == BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE + && info->value.X_op == O_constant); +} + +int +loongarch_parse_expr (const char *expr, + struct reloc_info *reloc_stack_top, + size_t max_reloc_num, + size_t *reloc_num, + offsetT *imm) +{ + int ret; + struct yy_buffer_state *buffstate; + top = reloc_stack_top; + end = top + max_reloc_num; + buffstate = yy_scan_string (expr); + ret = yyparse (); + + if (ret == 0) + { + if (is_const (top - 1)) + *imm = (--top)->value.X_add_number; + else + *imm = 0; + *reloc_num = top - reloc_stack_top; + } + yy_delete_buffer (buffstate); + + return ret; +} + +static void +emit_const (offsetT imm) +{ + if (end <= top) + as_fatal (_("expr too huge")); + top->type = BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE; + top->value.X_op = O_constant; + top->value.X_add_number = imm; + top++; +} + +static const char * +my_getExpression (expressionS *ep, const char *str) +{ + char *save_in, *ret; + + if (*str == ':') + { + unsigned long j; + char *str_1 = (char *) str; + j = strtol (str_1, &str_1, 10); + get_internal_label (ep, j, *str_1 == 'f'); + return NULL; + } + save_in = input_line_pointer; + input_line_pointer = (char *)str; + expression (ep); + ret = input_line_pointer; + input_line_pointer = save_in; + return ret; +} + +static void +reloc (const char *op_c_str, const char *id_c_str, offsetT addend) +{ + expressionS id_sym_expr; + bfd_reloc_code_real_type btype; + + if (end <= top) + as_fatal (_("expr too huge")); + + /* For compatible old asm code. */ + if (0 == strcmp (op_c_str, "plt")) + btype = BFD_RELOC_LARCH_B26; + else + btype = loongarch_larch_reloc_name_lookup (NULL, op_c_str); + + if (id_c_str) + { + my_getExpression (&id_sym_expr, id_c_str); + id_sym_expr.X_add_number += addend; + } + else + { + id_sym_expr.X_op = O_constant; + id_sym_expr.X_add_number = addend; + } + + top->value = id_sym_expr; + top->type = btype; + top++; +} + +static void +emit_unary (char op) +{ + struct reloc_info *s_top = top - 1; + if (is_const (s_top)) + { + offsetT opr = s_top->value.X_add_number; + switch (op) + { + case '+': + break; + case '-': + opr = -opr; + break; + case '~': + opr = ~opr; + break; + case '!': + opr = !opr; + break; + default: + abort (); + } + s_top->value.X_add_number = opr; + } + else + { + if (end <= top) + as_fatal (_("expr too huge")); + switch (op) + { + case '!': + top->type = BFD_RELOC_LARCH_SOP_NOT; + break; + default: + abort (); + } + top->value = const_0; + top++; + } +} + +static void +emit_bin (int op) +{ + struct reloc_info *last_1st = top - 1, *last_2nd = top - 2; + if (is_const (last_1st) && is_const (last_2nd)) + { + offsetT opr1 = last_2nd->value.X_add_number; + offsetT opr2 = last_1st->value.X_add_number; + switch (op) + { + case '*': + opr1 = opr1 * opr2; + break; + case '/': + opr1 = opr1 / opr2; + break; + case '%': + opr1 = opr1 % opr2; + break; + case '+': + opr1 = opr1 + opr2; + break; + case '-': + opr1 = opr1 - opr2; + break; + case LEFT_OP: + opr1 = opr1 << opr2; + break; + case RIGHT_OP: + /* Algorithm right shift. */ + opr1 = (offsetT)opr1 >> (offsetT)opr2; + break; + case '<': + opr1 = opr1 < opr2; + break; + case '>': + opr1 = opr1 > opr2; + break; + case LE_OP: + opr1 = opr1 <= opr2; + break; + case GE_OP: + opr1 = opr1 >= opr2; + break; + case EQ_OP: + opr1 = opr1 == opr2; + break; + case NE_OP: + opr1 = opr1 != opr2; + break; + case '&': + opr1 = opr1 & opr2; + break; + case '^': + opr1 = opr1 ^ opr2; + break; + case '|': + opr1 = opr1 | opr2; + break; + case AND_OP: + opr1 = opr1 && opr2; + break; + case OR_OP: + opr1 = opr1 || opr2; + break; + default: + abort (); + } + last_2nd->value.X_add_number = opr1; + last_1st->type = 0; + top--; + } + else + { + if (end <= top) + as_fatal (_("expr too huge")); + switch (op) + { + case '+': + top->type = BFD_RELOC_LARCH_SOP_ADD; + break; + case '-': + top->type = BFD_RELOC_LARCH_SOP_SUB; + break; + case LEFT_OP: + top->type = BFD_RELOC_LARCH_SOP_SL; + break; + case RIGHT_OP: + top->type = BFD_RELOC_LARCH_SOP_SR; + break; + case '&': + top->type = BFD_RELOC_LARCH_SOP_AND; + break; + default: + abort (); + } + top->value = const_0; + top++; + } +} + +static void +emit_if_else (void) +{ + struct reloc_info *last_1st = top - 1; + struct reloc_info *last_2nd = top - 2; + struct reloc_info *last_3rd = top - 3; + if (is_const (last_1st) && is_const (last_2nd) && is_const (last_3rd)) + { + offsetT opr1 = last_3rd->value.X_add_number; + offsetT opr2 = last_2nd->value.X_add_number; + offsetT opr3 = last_1st->value.X_add_number; + opr1 = opr1 ? opr2 : opr3; + last_3rd->value.X_add_number = opr1; + last_2nd->type = 0; + last_1st->type = 0; + top -= 2; + } + else + { + if (end <= top) + as_fatal (_("expr too huge")); + top->type = BFD_RELOC_LARCH_SOP_IF_ELSE; + top->value = const_0; + top++; + } +} + +%} + +%union { +char *c_str; +offsetT imm; +} + +%token INTEGER +%token IDENTIFIER +%type addend + +%token LEFT_OP RIGHT_OP LE_OP GE_OP EQ_OP NE_OP AND_OP OR_OP +%start expression +%% + +primary_expression + : INTEGER {emit_const ($1);} + | '(' expression ')' + | '%' IDENTIFIER '(' IDENTIFIER addend ')' {reloc ($2, $4, $5); free ($2); free ($4);} + | '%' IDENTIFIER '(' INTEGER addend ')' {reloc ($2, NULL, $4 + $5); free ($2);} + ; + +addend + : addend '-' INTEGER {$$ -= $3;} + | addend '+' INTEGER {$$ += $3;} + | {$$ = 0;} + ; + +unary_expression + : primary_expression + | '+' unary_expression {emit_unary ('+');} + | '-' unary_expression {emit_unary ('-');} + | '~' unary_expression {emit_unary ('~');} + | '!' unary_expression {emit_unary ('!');} + ; + +multiplicative_expression + : unary_expression + | multiplicative_expression '*' unary_expression {emit_bin ('*');} + | multiplicative_expression '/' unary_expression {emit_bin ('/');} + | multiplicative_expression '%' unary_expression {emit_bin ('%');} + ; + +additive_expression + : multiplicative_expression + | additive_expression '+' multiplicative_expression {emit_bin ('+');} + | additive_expression '-' multiplicative_expression {emit_bin ('-');} + ; + +shift_expression + : additive_expression + | shift_expression LEFT_OP additive_expression {emit_bin (LEFT_OP);} + | shift_expression RIGHT_OP additive_expression {emit_bin (RIGHT_OP);} + ; + +relational_expression + : shift_expression + | relational_expression '<' shift_expression {emit_bin ('<');} + | relational_expression '>' shift_expression {emit_bin ('>');} + | relational_expression LE_OP shift_expression {emit_bin (LE_OP);} + | relational_expression GE_OP shift_expression {emit_bin (GE_OP);} + ; + +equality_expression + : relational_expression + | equality_expression EQ_OP relational_expression {emit_bin (EQ_OP);} + | equality_expression NE_OP relational_expression {emit_bin (NE_OP);} + ; + +and_expression + : equality_expression + | and_expression '&' equality_expression {emit_bin ('&');} + ; + +exclusive_or_expression + : and_expression + | exclusive_or_expression '^' and_expression {emit_bin ('^');} + ; + +inclusive_or_expression + : exclusive_or_expression + | inclusive_or_expression '|' exclusive_or_expression {emit_bin ('|');} + ; + +logical_and_expression + : inclusive_or_expression + | logical_and_expression AND_OP inclusive_or_expression {emit_bin (AND_OP);} + ; + +logical_or_expression + : logical_and_expression + | logical_or_expression OR_OP logical_and_expression {emit_bin (OR_OP);} + ; + +conditional_expression + : logical_or_expression + | logical_or_expression '?' expression ':' conditional_expression {emit_if_else ();} + ; + +expression + : conditional_expression + ; +%% + diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c new file mode 100644 index 00000000..93412b69 --- /dev/null +++ b/gas/config/tc-loongarch.c @@ -0,0 +1,1385 @@ +/* tc-loongarch.c -- Assemble for the LoongArch ISA + + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GAS. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the license, or + (at your option) any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "as.h" +#include "dw2gencfi.h" +#include "loongarch-lex.h" +#include "elf/loongarch.h" +#include "opcode/loongarch.h" +#include "obj-elf.h" +#include "bfd/elfxx-loongarch.h" +#include +#include +#include +#include + +/* All information about an instruction during assemble. */ +struct loongarch_cl_insn +{ + /* First split string. */ + const char *name; + const char *arg_strs[MAX_ARG_NUM_PLUS_2]; + size_t arg_num; + + /* Second analyze name_str and each actual args string to match the insn + in 'loongarch-opc.c'. And actual args may need be relocated. + We get length of insn. If 'insn_length == 0 && insn_mo->macro != NULL', + it's a macro insntruction and we call 'md_assemble' recursively + after expanding it. */ + int match_now; + int all_match; + + const struct loongarch_opcode *insn; + size_t insn_length; + + offsetT args[MAX_ARG_NUM_PLUS_2]; + struct reloc_info reloc_info[MAX_RELOC_NUMBER_A_INSN]; + size_t reloc_num; + + /* For relax reserved. We not support relax now. + 'insn_length < relax_max_length' means need to relax. + And 'insn_length == relax_max_length' means no need to relax. */ + size_t relax_max_length; + relax_substateT subtype; + + /* Then we get the binary representation of insn + and write it in to section. */ + insn_t insn_bin; + + /* The frag that contains the instruction. */ + struct frag *frag; + /* The offset into FRAG of the first instruction byte. */ + long where; + /* The relocs associated with the instruction, if any. */ + fixS *fixp[MAX_RELOC_NUMBER_A_INSN]; +}; + +#ifndef DEFAULT_ARCH +#define DEFAULT_ARCH "loongarch64" +#endif + +/* This array holds the chars that always start a comment. If the + pre-processor is disabled, these aren't very useful. */ +const char comment_chars[] = "#"; + +/* This array holds the chars that only start a comment at the beginning of + a line. If the line seems to have the form '# 123 filename' + .line and .file directives will appear in the pre-processed output. */ +/* Note that input_file.c hand checks for '#' at the beginning of the + first line of the input file. This is because the compiler outputs + #NO_APP at the beginning of its output. */ +/* Also note that C style comments are always supported. */ +const char line_comment_chars[] = "#"; + +/* This array holds machine specific line separator characters. */ +const char line_separator_chars[] = ";"; + +/* Chars that can be used to separate mant from exp in floating point nums. */ +const char EXP_CHARS[] = "eE"; + +/* Chars that mean this number is a floating point constant. */ +/* As in 0f12.456. */ +/* or 0d1.2345e12. */ +const char FLT_CHARS[] = "rRsSfFdDxXpP"; + +const char *md_shortopts = "O::g::G:"; + +static const char default_arch[] = DEFAULT_ARCH; + +enum options +{ + OPTION_IGNORE = OPTION_MD_BASE, + + OPTION_ABI, + OPTION_FLOAT_ABI, + + OPTION_FLOAT_ISA, + + OPTION_LA_LOCAL_WITH_ABS, + OPTION_LA_GLOBAL_WITH_PCREL, + OPTION_LA_GLOBAL_WITH_ABS, + + OPTION_END_OF_ENUM, +}; + +struct option md_longopts[] = +{ + { "mabi", required_argument, NULL, OPTION_ABI }, + + { "mfpu", required_argument, NULL, OPTION_FLOAT_ISA }, + + { "mla-local-with-abs", no_argument, NULL, OPTION_LA_LOCAL_WITH_ABS }, + { "mla-global-with-pcrel", no_argument, NULL, OPTION_LA_GLOBAL_WITH_PCREL }, + { "mla-global-with-abs", no_argument, NULL, OPTION_LA_GLOBAL_WITH_ABS }, + + { NULL, no_argument, NULL, 0 } +}; + +size_t md_longopts_size = sizeof (md_longopts); + +int +md_parse_option (int c, const char *arg) +{ + int ret = 1; + char lp64[256] = ""; + char ilp32[256] = ""; + unsigned char *suf = (unsigned char *)arg; + + lp64['s'] = lp64['S'] = EF_LOONGARCH_ABI_SOFT_FLOAT; + lp64['f'] = lp64['F'] = EF_LOONGARCH_ABI_SINGLE_FLOAT; + lp64['d'] = lp64['D'] = EF_LOONGARCH_ABI_DOUBLE_FLOAT; + + ilp32['s'] = ilp32['S'] = EF_LOONGARCH_ABI_SOFT_FLOAT; + ilp32['f'] = ilp32['F'] = EF_LOONGARCH_ABI_SINGLE_FLOAT; + ilp32['d'] = ilp32['D'] = EF_LOONGARCH_ABI_DOUBLE_FLOAT; + + switch (c) + { + case OPTION_ABI: + if (strncasecmp (arg, "lp64", 4) == 0 && lp64[suf[4]] != 0) + { + LARCH_opts.ase_ilp32 = 1; + LARCH_opts.ase_lp64 = 1; + LARCH_opts.ase_abi = lp64[suf[4]]; + } + else if (strncasecmp (arg, "ilp32", 5) == 0 && ilp32[suf[5]] != 0) + { + LARCH_opts.ase_abi = ilp32[suf[5]]; + LARCH_opts.ase_ilp32 = 1; + } + else + ret = 0; + break; + + case OPTION_FLOAT_ISA: + if (strcasecmp (arg, "soft") == 0) + LARCH_opts.ase_nf = 1; + else if (strcasecmp (arg, "single") == 0) + LARCH_opts.ase_sf = 1; + else if (strcasecmp (arg, "double") == 0) + { + LARCH_opts.ase_sf = 1; + LARCH_opts.ase_df = 1; + } + else + ret = 0; + break; + + case OPTION_LA_LOCAL_WITH_ABS: + LARCH_opts.ase_labs = 1; + break; + + case OPTION_LA_GLOBAL_WITH_PCREL: + LARCH_opts.ase_gpcr = 1; + break; + + case OPTION_LA_GLOBAL_WITH_ABS: + LARCH_opts.ase_gabs = 1; + break; + + case OPTION_IGNORE: + break; + + default: + ret = 0; + break; + } + return ret; +} + +static struct htab *r_htab = NULL; +static struct htab *f_htab = NULL; +static struct htab *c_htab = NULL; +static struct htab *cr_htab = NULL; +static struct htab *v_htab = NULL; +static struct htab *x_htab = NULL; + +void +loongarch_after_parse_args () +{ + /* Set default ABI/ISA LP64D. */ + if (!LARCH_opts.ase_ilp32) + { + if (strcmp (default_arch, "loongarch64") == 0) + { + LARCH_opts.ase_abi = EF_LOONGARCH_ABI_DOUBLE_FLOAT; + LARCH_opts.ase_ilp32 = 1; + LARCH_opts.ase_lp64 = 1; + } + else if (strcmp (default_arch, "loongarch32") == 0) + { + LARCH_opts.ase_abi = EF_LOONGARCH_ABI_DOUBLE_FLOAT; + LARCH_opts.ase_ilp32 = 1; + } + else + as_bad ("unknown default architecture `%s'", default_arch); + } + + LARCH_opts.ase_abi |= EF_LOONGARCH_OBJABI_V1; + /* Set default ISA double-float. */ + if (!LARCH_opts.ase_nf + && !LARCH_opts.ase_sf + && !LARCH_opts.ase_df) + { + LARCH_opts.ase_sf = 1; + LARCH_opts.ase_df = 1; + } + + size_t i; + + assert(LARCH_opts.ase_ilp32); + + /* Init ilp32/lp64 registers names. */ + if (!r_htab) + r_htab = str_htab_create (), str_hash_insert (r_htab, "", 0, 0); + + for (i = 0; i < ARRAY_SIZE (loongarch_r_normal_name); i++) + str_hash_insert (r_htab, loongarch_r_normal_name[i], (void *) (i + 1), 0); + + if (!cr_htab) + cr_htab = str_htab_create (), str_hash_insert (cr_htab, "", 0, 0); + + for (i = 0; i < ARRAY_SIZE (loongarch_cr_normal_name); i++) + str_hash_insert (cr_htab, loongarch_cr_normal_name[i], (void *) (i + 1), 0); + + /* Init single/double float registers names. */ + if (LARCH_opts.ase_sf || LARCH_opts.ase_df) + { + if (!f_htab) + f_htab = str_htab_create (), str_hash_insert (f_htab, "", 0, 0); + + for (i = 0; i < ARRAY_SIZE (loongarch_f_normal_name); i++) + str_hash_insert (f_htab, loongarch_f_normal_name[i], (void *) (i + 1), + 0); + + if (!c_htab) + c_htab = str_htab_create (), str_hash_insert (c_htab, "", 0, 0); + + for (i = 0; i < ARRAY_SIZE (loongarch_c_normal_name); i++) + str_hash_insert (c_htab, loongarch_c_normal_name[i], (void *) (i + 1), + 0); + + } + + /* Init lsx registers names. */ + if (LARCH_opts.ase_lsx) + { + if (!v_htab) + v_htab = str_htab_create (), str_hash_insert (v_htab, "", 0, 0); + for (i = 0; i < ARRAY_SIZE (loongarch_v_normal_name); i++) + str_hash_insert (v_htab, loongarch_v_normal_name[i], (void *) (i + 1), + 0); + } + + /* Init lasx registers names. */ + if (LARCH_opts.ase_lasx) + { + if (!x_htab) + x_htab = str_htab_create (), str_hash_insert (x_htab, "", 0, 0); + for (i = 0; i < ARRAY_SIZE (loongarch_x_normal_name); i++) + str_hash_insert (x_htab, loongarch_x_normal_name[i], (void *) (i + 1), + 0); + } + + /* Init lp64 registers alias. */ + if (LARCH_opts.ase_lp64) + { + for (i = 0; i < ARRAY_SIZE (loongarch_r_lp64_name); i++) + str_hash_insert (r_htab, loongarch_r_lp64_name[i], (void *) (i + 1), + 0); + for (i = 0; i < ARRAY_SIZE (loongarch_r_lp64_name1); i++) + str_hash_insert (r_htab, loongarch_r_lp64_name1[i], (void *) (i + 1), + 0); + } + + /* Init float-lp64 registers alias */ + if ((LARCH_opts.ase_sf || LARCH_opts.ase_df) && LARCH_opts.ase_lp64) + { + for (i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name); i++) + str_hash_insert (f_htab, loongarch_f_lp64_name[i], + (void *) (i + 1), 0); + for (i = 0; i < ARRAY_SIZE (loongarch_f_lp64_name1); i++) + str_hash_insert (f_htab, loongarch_f_lp64_name1[i], + (void *) (i + 1), 0); + } +} + +const char * +loongarch_target_format () +{ + return LARCH_opts.ase_lp64 ? "elf64-loongarch" : "elf32-loongarch"; +} + +void +md_begin () +{ + const struct loongarch_opcode *it; + struct loongarch_ase *ase; + for (ase = loongarch_ASEs; ase->enabled; ase++) + for (it = ase->opcodes; it->name; it++) + { + if (loongarch_check_format (it->format) != 0) + as_fatal (_("insn name: %s\tformat: %s\tsyntax error"), + it->name, it->format); + if (it->mask == 0 && it->macro == 0) + as_fatal (_("insn name: %s\nformat: %s\nwe want macro but " + "macro is NULL"), + it->name, it->format); + if (it->macro + && loongarch_check_macro (it->format, it->macro) != 0) + as_fatal (_("insn name: %s\nformat: %s\nmacro: %s\tsyntax error"), + it->name, it->format, it->macro); + } + + /* FIXME: expressionS use 'offsetT' as constant, + * we want this is 64-bit type. */ + assert (8 <= sizeof (offsetT)); +} + +unsigned long +loongarch_mach (void) +{ + return LARCH_opts.ase_lp64 ? bfd_mach_loongarch64 : bfd_mach_loongarch32; +} + +static const expressionS const_0 = { .X_op = O_constant, .X_add_number = 0 }; + +static void +s_loongarch_align (int arg) +{ + const char *t = input_line_pointer; + while (!is_end_of_line[(unsigned char) *t] && *t != ',') + ++t; + if (*t == ',') + s_align_ptwo (arg); + else + s_align_ptwo (0); +} + +/* Handle the .dtprelword and .dtpreldword pseudo-ops. They generate + a 32-bit or 64-bit DTP-relative relocation (BYTES says which) for + use in DWARF debug information. */ + +static void +s_dtprel (int bytes) +{ + expressionS ex; + char *p; + + expression (&ex); + + if (ex.X_op != O_symbol) + { + as_bad (_("Unsupported use of %s"), + (bytes == 8 ? ".dtpreldword" : ".dtprelword")); + ignore_rest_of_line (); + } + + p = frag_more (bytes); + md_number_to_chars (p, 0, bytes); + fix_new_exp (frag_now, p - frag_now->fr_literal, bytes, &ex, FALSE, + (bytes == 8 + ? BFD_RELOC_LARCH_TLS_DTPREL64 + : BFD_RELOC_LARCH_TLS_DTPREL32)); + + demand_empty_rest_of_line (); +} + +static const pseudo_typeS loongarch_pseudo_table[] = +{ + { "align", s_loongarch_align, -4 }, + { "dword", cons, 8 }, + { "word", cons, 4 }, + { "half", cons, 2 }, + { "dtprelword", s_dtprel, 4 }, + { "dtpreldword", s_dtprel, 8 }, + { NULL, NULL, 0 }, +}; + +void +loongarch_pop_insert (void) +{ + pop_insert (loongarch_pseudo_table); +} + +#define INTERNAL_LABEL_SPECIAL 10 +static unsigned long internal_label_count[INTERNAL_LABEL_SPECIAL] = { 0 }; + +static const char * +loongarch_internal_label_name (unsigned long label, int augend) +{ + static char symbol_name_build[24]; + unsigned long want_label; + char *p; + + want_label = internal_label_count[label] + augend; + + p = symbol_name_build; +#ifdef LOCAL_LABEL_PREFIX + *p++ = LOCAL_LABEL_PREFIX; +#endif + *p++ = 'L'; + for (; label; label /= 10) + *p++ = label % 10 + '0'; + /* Make sure internal label never belong to normal label namespace. */ + *p++ = ':'; + for (; want_label; want_label /= 10) + *p++ = want_label % 10 + '0'; + *p++ = '\0'; + return symbol_name_build; +} + +static void +setup_internal_label_here (unsigned long label) +{ + assert (label < INTERNAL_LABEL_SPECIAL); + internal_label_count[label]++; + colon (loongarch_internal_label_name (label, 0)); +} + +void +get_internal_label (expressionS *label_expr, unsigned long label, + int augend /* 0 for previous, 1 for next. */) +{ + assert (label < INTERNAL_LABEL_SPECIAL); + if (augend == 0 && internal_label_count[label] == 0) + as_fatal (_("internal error: we have no internal label yet")); + label_expr->X_op = O_symbol; + label_expr->X_add_symbol = + symbol_find_or_make (loongarch_internal_label_name (label, augend)); + label_expr->X_add_number = 0; +} + +static int +is_internal_label (const char *c_str) +{ + do + { + if (*c_str != ':') + break; + c_str++; + if (!('0' <= *c_str && *c_str <= '9')) + break; + while ('0' <= *c_str && *c_str <= '9') + c_str++; + if (*c_str != 'b' && *c_str != 'f') + break; + c_str++; + return *c_str == '\0'; + } + while (0); + return 0; +} + +static int +is_label (const char *c_str) +{ + if (is_internal_label (c_str)) + return 1; + else if ('0' <= *c_str && *c_str <= '9') + { + /* [0-9]+[bf] */ + while ('0' <= *c_str && *c_str <= '9') + c_str++; + return *c_str == 'b' || *c_str == 'f'; + } + else if (is_name_beginner (*c_str)) + { + /* [a-zA-Z\._\$][0-9a-zA-Z\._\$]* */ + c_str++; + while (is_part_of_name (*c_str)) + c_str++; + return *c_str == '\0'; + } + else + return 0; +} + +static int +is_label_with_addend (const char *c_str) +{ + if (is_internal_label (c_str)) + return 1; + else if ('0' <= *c_str && *c_str <= '9') + { + /* [0-9]+[bf] */ + while ('0' <= *c_str && *c_str <= '9') + c_str++; + if (*c_str == 'b' || *c_str == 'f') + c_str++; + else + return 0; + return *c_str == '\0' + || ((*c_str == '-' || *c_str == '+') + && is_unsigned (c_str + 1)); + } + else if (is_name_beginner (*c_str)) + { + /* [a-zA-Z\._\$][0-9a-zA-Z\._\$]* */ + c_str++; + while (is_part_of_name (*c_str)) + c_str++; + return *c_str == '\0' + || ((*c_str == '-' || *c_str == '+') + && is_unsigned (c_str + 1)); + } + else + return 0; +} + +static int32_t +loongarch_args_parser_can_match_arg_helper (char esc_ch1, char esc_ch2, + const char *bit_field, + const char *arg, void *context) +{ + struct loongarch_cl_insn *ip = context; + offsetT imm, ret = 0; + size_t reloc_num_we_have = MAX_RELOC_NUMBER_A_INSN - ip->reloc_num; + size_t reloc_num = 0; + + if (!ip->match_now) + return 0; + + switch (esc_ch1) + { + case 'l': + switch (esc_ch2) + { + default: + ip->match_now = is_label (arg); + if (!ip->match_now && is_label_with_addend (arg)) + as_fatal (_("This label shouldn't be with addend.")); + break; + case 'a': + ip->match_now = is_label_with_addend (arg); + break; + } + break; + case 's': + case 'u': + ip->match_now = + loongarch_parse_expr (arg, ip->reloc_info + ip->reloc_num, + reloc_num_we_have, &reloc_num, &imm) == 0; + + if (!ip->match_now) + break; + + if (esc_ch1 == 's') + switch (esc_ch2) + { + case 'c': + ip->match_now = reloc_num == 0; + break; + } + else + switch (esc_ch2) + { + case 'c': + ip->match_now = reloc_num == 0 && 0 <= imm; + break; + } + + if (!ip->match_now) + break; + + ret = imm; + if (reloc_num) + { + bfd_reloc_code_real_type reloc_type = BFD_RELOC_NONE; + reloc_num_we_have -= reloc_num; + if (reloc_num_we_have == 0) + as_fatal (_("expr too huge") /* Want one more reloc. */); + if (esc_ch1 == 'u') + { + if (strncmp (bit_field, "10:12", strlen ("10:12")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_U_10_12; + } + else if (esc_ch1 == 's') + { + if (strncmp (bit_field, "10:16<<2", strlen ("10:16<<2")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2; + else if (strncmp (bit_field, "0:5|10:16<<2", + strlen ("0:5|10:16<<2")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2; + else if (strncmp (bit_field, "0:10|10:16<<2", + strlen ("0:10|10:16<<2")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2; + else if (strncmp (bit_field, "10:12", strlen ("10:12")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_10_12; + else if (strncmp (bit_field, "5:20", strlen ("5:20")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_5_20; + else if (strncmp (bit_field, "10:16", strlen ("10:16")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_10_16; + else if (strncmp (bit_field, "10:5", strlen ("10:5")) == 0) + reloc_type = BFD_RELOC_LARCH_SOP_POP_32_S_10_5; + } + if (reloc_type == BFD_RELOC_NONE) + as_fatal ( + _("not support reloc bit-field\nfmt: %c%c %s\nargs: %s"), + esc_ch1, esc_ch2, bit_field, arg); + if (ip->reloc_info[0].type >= BFD_RELOC_LARCH_B16 + && ip->reloc_info[0].type < BFD_RELOC_LARCH_RELAX) + { + /* As we compact stack-relocs, it is no need for pop operation. + But break out until here in order to check the imm field. + May be reloc_num > 1 if implement relax? */ + ip->reloc_num += reloc_num; + break; + } + reloc_num++; + ip->reloc_num += reloc_num; + ip->reloc_info[ip->reloc_num - 1].type = reloc_type; + ip->reloc_info[ip->reloc_num - 1].value = const_0; + } + break; + case 'r': + imm = (intptr_t) str_hash_find (r_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'f': + imm = (intptr_t) str_hash_find (f_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'c': + switch (esc_ch2) + { + case 'r': + imm = (intptr_t) str_hash_find (cr_htab, arg); + break; + default: + imm = (intptr_t) str_hash_find (c_htab, arg); + } + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'v': + imm = (intptr_t) str_hash_find (v_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case 'x': + imm = (intptr_t) str_hash_find (x_htab, arg); + ip->match_now = 0 < imm; + ret = imm - 1; + break; + case '\0': + ip->all_match = ip->match_now; + ip->insn_length = + ip->insn->mask ? loongarch_insn_length (ip->insn->match) : 0; + /* FIXME: now we have no relax insn. */ + ip->relax_max_length = ip->insn_length; + break; + default: + as_fatal (_("unknown escape")); + } + + do + { + /* Check imm overflow. */ + int bit_width, bits_needed_s, bits_needed_u; + char *t; + + if (!ip->match_now) + break; + + if (0 < reloc_num) + break; + + bit_width = loongarch_get_bit_field_width (bit_field, &t); + + if (bit_width == -1) + /* No specify bit width. */ + break; + + imm = ret; + if (t[0] == '<' && t[1] == '<') + { + int i = strtol (t += 2, &t, 10), j; + for (j = i; 0 < j; j--, imm >>= 1) + if (imm & 1) + as_fatal (_("require imm low %d bit is 0."), i); + } + + if (*t == '+') + imm -= strtol (t, &t, 10); + + bits_needed_s = loongarch_bits_imm_needed (imm, 1); + bits_needed_u = loongarch_bits_imm_needed (imm, 0); + + if ((esc_ch1 == 's' && bit_width < bits_needed_s) + || (esc_ch1 != 's' && bit_width < bits_needed_u)) + /* How to do after we detect overflow. */ + as_fatal (_("Immediate overflow.\n" + "format: %c%c%s\n" + "arg: %s"), + esc_ch1, esc_ch2, bit_field, arg); + } + while (0); + + if (esc_ch1 != '\0') + { + ip->args[ip->arg_num] = ret; + ip->arg_num++; + } + return ret; +} + +static void +get_loongarch_opcode (struct loongarch_cl_insn *insn) +{ + const struct loongarch_opcode *it; + struct loongarch_ase *ase; + for (ase = loongarch_ASEs; ase->enabled; ase++) + { + if (!*ase->enabled || (ase->include && !*ase->include) + || (ase->exclude && *ase->exclude)) + continue; + + if (!ase->name_hash_entry) + { + ase->name_hash_entry = str_htab_create (); + for (it = ase->opcodes; it->name; it++) + { + if ((!it->include || (it->include && *it->include)) + && (!it->exclude || (it->exclude && !(*it->exclude)))) + str_hash_insert (ase->name_hash_entry, it->name, + (void *) it, 0); + } + } + + if ((it = str_hash_find (ase->name_hash_entry, insn->name)) == NULL) + continue; + + do + { + insn->insn = it; + insn->match_now = 1; + insn->all_match = 0; + insn->arg_num = 0; + insn->reloc_num = 0; + insn->insn_bin = (loongarch_foreach_args + (it->format, insn->arg_strs, + loongarch_args_parser_can_match_arg_helper, + insn)); + if (insn->all_match && !(it->include && !*it->include) + && !(it->exclude && *it->exclude)) + { + insn->insn_bin |= it->match; + return; + } + it++; + } + while (it->name && strcasecmp (it->name, insn->name) == 0); + } +} + +static int +check_this_insn_before_appending (struct loongarch_cl_insn *ip) +{ + int ret = 0; + + if (strncmp (ip->name, "la.abs", 6) == 0) + { + ip->reloc_info[ip->reloc_num].type = BFD_RELOC_LARCH_MARK_LA; + ip->reloc_info[ip->reloc_num].value = const_0; + ip->reloc_num++; + } + else if (ip->insn->mask == 0xffff8000 + /* amswap.w rd, rk, rj */ + && ((ip->insn_bin & 0xfff00000) == 0x38600000 + /* ammax_db.wu rd, rk, rj */ + || (ip->insn_bin & 0xffff0000) == 0x38700000 + /* ammin_db.wu rd, rk, rj */ + || (ip->insn_bin & 0xffff0000) == 0x38710000)) + { + /* For AMO insn amswap.[wd], amadd.[wd], etc. */ + if (ip->args[0] != 0 + && (ip->args[0] == ip->args[1] || ip->args[0] == ip->args[2])) + as_fatal (_("AMO insns require rd != base && rd != rt" + " when rd isn't $r0")); + } + else if ((ip->insn->mask == 0xffe08000 + /* bstrins.w rd, rj, msbw, lsbw */ + && (ip->insn_bin & 0xffe00000) == 0x00600000) + || (ip->insn->mask == 0xffc00000 + /* bstrins.d rd, rj, msbd, lsbd */ + && (ip->insn_bin & 0xff800000) == 0x00800000)) + { + /* For bstr(ins|pick).[wd]. */ + if (ip->args[2] < ip->args[3]) + as_fatal (_("bstr(ins|pick).[wd] require msbd >= lsbd")); + } + else if (ip->insn->mask != 0 && (ip->insn_bin & 0xfe0003c0) == 0x04000000 + /* csrxchg rd, rj, csr_num */ + && (strcmp ("csrxchg", ip->name) == 0)) + as_fatal (_("csrxchg require rj != $r0 && rj != $r1")); + + return ret; +} + +static void +install_insn (const struct loongarch_cl_insn *insn) +{ + char *f = insn->frag->fr_literal + insn->where; + if (0 < insn->insn_length) + md_number_to_chars (f, insn->insn_bin, insn->insn_length); +} + +static void +move_insn (struct loongarch_cl_insn *insn, fragS *frag, long where) +{ + size_t i; + insn->frag = frag; + insn->where = where; + for (i = 0; i < insn->reloc_num; i++) + { + insn->fixp[i]->fx_frag = frag; + insn->fixp[i]->fx_where = where; + } + install_insn (insn); +} + +/* Add INSN to the end of the output. */ +static void +append_fixed_insn (struct loongarch_cl_insn *insn) +{ + char *f = frag_more (insn->insn_length); + move_insn (insn, frag_now, f - frag_now->fr_literal); +} + +static void +append_fixp_and_insn (struct loongarch_cl_insn *ip) +{ + reloc_howto_type *howto; + bfd_reloc_code_real_type reloc_type; + struct reloc_info *reloc_info = ip->reloc_info; + size_t i; + + dwarf2_emit_insn (0); + + for (i = 0; i < ip->reloc_num; i++) + { + reloc_type = reloc_info[i].type; + howto = bfd_reloc_type_lookup (stdoutput, reloc_type); + if (howto == NULL) + as_fatal (_("no HOWTO loong relocation number %d"), reloc_type); + + ip->fixp[i] = + fix_new_exp (ip->frag, ip->where, bfd_get_reloc_size (howto), + &reloc_info[i].value, FALSE, reloc_type); + } + + if (ip->insn_length < ip->relax_max_length) + as_fatal (_("Internal error: not support relax now")); + else + append_fixed_insn (ip); +} + +/* Ask helper for returning a malloced c_str or NULL. */ +static char * +assember_macro_helper (const char *const args[], void *context_ptr) +{ + struct loongarch_cl_insn *insn = context_ptr; + char *ret = NULL; + if ( strcmp (insn->name, "li.w") == 0 || strcmp (insn->name, "li.d") == 0) + { + char args_buf[50], insns_buf[200]; + const char *arg_strs[6]; + uint32_t hi32, lo32; + + /* We pay attention to sign extend beacause it is chance of reduce insn. + The exception is 12-bit and hi-12-bit unsigned, + we need a 'ori' or a 'lu52i.d' accordingly. */ + char all0_bit_vec, sign_bit_vec, allf_bit_vec, paritial_is_sext_of_prev; + + lo32 = insn->args[1] & 0xffffffff; + hi32 = insn->args[1] >> 32; + + if (strcmp (insn->name, "li.w") == 0) + { + if (hi32 != 0 && hi32 != 0xffffffff) + as_fatal (_("li overflow: hi32:0x%x lo32:0x%x"), hi32, lo32); + hi32 = lo32 & 0x80000000 ? 0xffffffff : 0; + } + + if (strcmp (insn->name, "li.d") == 0 && !LARCH_opts.ase_lp64) + as_fatal (_("we can't li.d on 32bit-arch")); + + snprintf (args_buf, sizeof (args_buf), "0x%x,0x%x,0x%x,0x%x,%s", + (hi32 >> 20) & 0xfff, hi32 & 0xfffff, (lo32 >> 12) & 0xfffff, + lo32 & 0xfff, args[0]); + loongarch_split_args_by_comma (args_buf, arg_strs); + + all0_bit_vec = + ((((hi32 & 0xfff00000) == 0) << 3) | (((hi32 & 0x000fffff) == 0) << 2) + | (((lo32 & 0xfffff000) == 0) << 1) | ((lo32 & 0x00000fff) == 0)); + sign_bit_vec = + ((((hi32 & 0x80000000) != 0) << 3) | (((hi32 & 0x00080000) != 0) << 2) + | (((lo32 & 0x80000000) != 0) << 1) | ((lo32 & 0x00000800) != 0)); + allf_bit_vec = + ((((hi32 & 0xfff00000) == 0xfff00000) << 3) + | (((hi32 & 0x000fffff) == 0x000fffff) << 2) + | (((lo32 & 0xfffff000) == 0xfffff000) << 1) + | ((lo32 & 0x00000fff) == 0x00000fff)); + paritial_is_sext_of_prev = + (all0_bit_vec ^ allf_bit_vec) & (all0_bit_vec ^ (sign_bit_vec << 1)); + + static const char *const li_32bit[] = + { + "lu12i.w %5,%3&0x80000?%3-0x100000:%3;ori %5,%5,%4;", + "lu12i.w %5,%3&0x80000?%3-0x100000:%3;", + "addi.w %5,$r0,%4&0x800?%4-0x1000:%4;", + "or %5,$r0,$r0;", + }; + static const char *const li_hi_32bit[] = + { + "lu32i.d %5,%2&0x80000?%2-0x100000:%2;" + "lu52i.d %5,%5,%1&0x800?%1-0x1000:%1;", + "lu52i.d %5,%5,%1&0x800?%1-0x1000:%1;", + "lu32i.d %5,%2&0x80000?%2-0x100000:%2;", + "", + }; + do + { + insns_buf[0] = '\0'; + if (paritial_is_sext_of_prev == 0x7) + { + strcat (insns_buf, "lu52i.d %5,$r0,%1&0x800?%1-0x1000:%1;"); + break; + } + if ((all0_bit_vec & 0x3) == 0x2) + strcat (insns_buf, "ori %5,$r0,%4;"); + else + strcat (insns_buf, li_32bit[paritial_is_sext_of_prev & 0x3]); + strcat (insns_buf, li_hi_32bit[paritial_is_sext_of_prev >> 2]); + } + while (0); + + ret = loongarch_expand_macro (insns_buf, arg_strs, NULL, NULL, + sizeof (args_buf)); + } + + return ret; +} + +/* Accept instructions separated by ';' + * assuming 'not starting with space and not ending with space' or pass in + * empty c_str. */ +static void +loongarch_assemble_INSNs (char *str) +{ + char *rest; + size_t len_str = strlen(str); + + for (rest = str; *rest != ';' && *rest != '\0'; rest++); + if (*rest == ';') + *rest++ = '\0'; + + if (*str == ':') + { + str++; + setup_internal_label_here (strtol (str, &str, 10)); + str++; + } + + do + { + if (*str == '\0') + break; + + struct loongarch_cl_insn the_one = { 0 }; + the_one.name = str; + + for (; *str && *str != ' '; str++) + ; + if (*str == ' ') + *str++ = '\0'; + + loongarch_split_args_by_comma (str, the_one.arg_strs); + get_loongarch_opcode (&the_one); + + if (!the_one.all_match) + { + char *ss = loongarch_cat_splited_strs (the_one.arg_strs); + as_bad (_("no match insn: %s\t%s"), the_one.name, ss ? ss : ""); + free(ss); + return; + } + + if (check_this_insn_before_appending (&the_one) != 0) + break; + + append_fixp_and_insn (&the_one); + if (the_one.insn_length == 0 && the_one.insn->macro) + { + char *c_str = loongarch_expand_macro (the_one.insn->macro, + the_one.arg_strs, + assember_macro_helper, + &the_one, len_str); + loongarch_assemble_INSNs (c_str); + free (c_str); + } + } + while (0); + + if (*rest != '\0') + loongarch_assemble_INSNs (rest); +} + +void +md_assemble (char *str) +{ + loongarch_assemble_INSNs (str); +} + +const char * +md_atof (int type, char *litP, int *sizeP) +{ + return ieee_md_atof (type, litP, sizeP, FALSE); +} + +void +md_number_to_chars (char *buf, valueT val, int n) +{ + number_to_chars_littleendian (buf, val, n); +} + +/* The location from which a PC relative jump should be calculated, + given a PC relative reloc. */ +long +md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED) +{ + return 0; +} + +static void fix_reloc_insn (fixS *fixP, bfd_vma reloc_val, char *buf) +{ + reloc_howto_type *howto; + insn_t insn; + howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); + + insn = bfd_getl32 (buf); + + if (!loongarch_adjust_reloc_bitsfield(howto, &reloc_val)) + as_warn_where (fixP->fx_file, fixP->fx_line, "Reloc overflow"); + + insn = (insn & (insn_t)howto->src_mask) + | ((insn & (~(insn_t)howto->dst_mask)) | reloc_val); + + bfd_putl32 (insn, buf); +} + +void +md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) +{ + static int64_t stack_top; + static int last_reloc_is_sop_push_pcrel_1 = 0; + int last_reloc_is_sop_push_pcrel = last_reloc_is_sop_push_pcrel_1; + segT sub_segment; + last_reloc_is_sop_push_pcrel_1 = 0; + + char *buf = fixP->fx_frag->fr_literal + fixP->fx_where; + switch (fixP->fx_r_type) + { + case BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL: + case BFD_RELOC_LARCH_SOP_PUSH_TLS_GD: + case BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT: + case BFD_RELOC_LARCH_TLS_LE_HI20: + case BFD_RELOC_LARCH_TLS_LE_LO12: + case BFD_RELOC_LARCH_TLS_LE64_LO20: + case BFD_RELOC_LARCH_TLS_LE64_HI12: + case BFD_RELOC_LARCH_TLS_IE_PC_HI20: + case BFD_RELOC_LARCH_TLS_IE_PC_LO12: + case BFD_RELOC_LARCH_TLS_IE64_PC_LO20: + case BFD_RELOC_LARCH_TLS_IE64_PC_HI12: + case BFD_RELOC_LARCH_TLS_IE_HI20: + case BFD_RELOC_LARCH_TLS_IE_LO12: + case BFD_RELOC_LARCH_TLS_IE64_LO20: + case BFD_RELOC_LARCH_TLS_IE64_HI12: + case BFD_RELOC_LARCH_TLS_LD_PC_HI20: + case BFD_RELOC_LARCH_TLS_LD_HI20: + case BFD_RELOC_LARCH_TLS_GD_PC_HI20: + case BFD_RELOC_LARCH_TLS_GD_HI20: + /* Add tls lo (got_lo reloc type). */ + if (fixP->fx_addsy == NULL) + as_bad_where (fixP->fx_file, fixP->fx_line, + _("Relocation against a constant")); + S_SET_THREAD_LOCAL (fixP->fx_addsy); + break; + + case BFD_RELOC_LARCH_SOP_PUSH_PCREL: + if (fixP->fx_addsy == NULL) + as_bad_where (fixP->fx_file, fixP->fx_line, + _("Relocation against a constant")); + + last_reloc_is_sop_push_pcrel_1 = 1; + if (S_GET_SEGMENT (fixP->fx_addsy) == seg) + stack_top = (S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset + - (fixP->fx_where + fixP->fx_frag->fr_address)); + else + stack_top = 0; + break; + + case BFD_RELOC_LARCH_SOP_POP_32_S_10_5: + case BFD_RELOC_LARCH_SOP_POP_32_S_10_12: + case BFD_RELOC_LARCH_SOP_POP_32_U_10_12: + case BFD_RELOC_LARCH_SOP_POP_32_S_10_16: + case BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2: + case BFD_RELOC_LARCH_SOP_POP_32_S_5_20: + case BFD_RELOC_LARCH_SOP_POP_32_U: + case BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2: + case BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2: + if (!last_reloc_is_sop_push_pcrel) + break; + + fix_reloc_insn (fixP, (bfd_vma)stack_top, buf); + break; + + case BFD_RELOC_64: + case BFD_RELOC_32: + + if (fixP->fx_r_type == BFD_RELOC_32 + && fixP->fx_addsy && fixP->fx_subsy + && (sub_segment = S_GET_SEGMENT (fixP->fx_subsy)) + && strcmp (sub_segment->name, ".eh_frame") == 0 + && S_GET_VALUE (fixP->fx_subsy) + == fixP->fx_frag->fr_address + fixP->fx_where) + { + fixP->fx_r_type = BFD_RELOC_LARCH_32_PCREL; + fixP->fx_subsy = NULL; + break; + } + + if (fixP->fx_subsy) + { + fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); + fixP->fx_next->fx_addsy = fixP->fx_subsy; + fixP->fx_next->fx_subsy = NULL; + fixP->fx_next->fx_offset = 0; + fixP->fx_subsy = NULL; + + switch (fixP->fx_r_type) + { + case BFD_RELOC_64: + fixP->fx_r_type = BFD_RELOC_LARCH_ADD64; + fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB64; + break; + case BFD_RELOC_32: + fixP->fx_r_type = BFD_RELOC_LARCH_ADD32; + fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB32; + break; + default: + break; + } + md_number_to_chars (buf, 0, fixP->fx_size); + } + + if (fixP->fx_addsy == NULL) + { + fixP->fx_done = 1; + md_number_to_chars (buf, *valP, fixP->fx_size); + } + break; + + case BFD_RELOC_24: + case BFD_RELOC_16: + case BFD_RELOC_8: + fixP->fx_next = xmemdup (fixP, sizeof (*fixP), sizeof (*fixP)); + fixP->fx_next->fx_addsy = fixP->fx_subsy; + fixP->fx_next->fx_subsy = NULL; + fixP->fx_next->fx_offset = 0; + fixP->fx_subsy = NULL; + + switch (fixP->fx_r_type) + { + case BFD_RELOC_24: + fixP->fx_r_type = BFD_RELOC_LARCH_ADD24; + fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB24; + break; + case BFD_RELOC_16: + fixP->fx_r_type = BFD_RELOC_LARCH_ADD16; + fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB16; + break; + case BFD_RELOC_8: + fixP->fx_r_type = BFD_RELOC_LARCH_ADD8; + fixP->fx_next->fx_r_type = BFD_RELOC_LARCH_SUB8; + break; + default: + break; + } + + md_number_to_chars (buf, 0, fixP->fx_size); + + if (fixP->fx_next->fx_addsy == NULL) + fixP->fx_next->fx_done = 1; + + if (fixP->fx_addsy == NULL) + { + fixP->fx_done = 1; + md_number_to_chars (buf, *valP, fixP->fx_size); + } + break; + + case BFD_RELOC_LARCH_B16: + case BFD_RELOC_LARCH_B21: + case BFD_RELOC_LARCH_B26: + if (fixP->fx_addsy == NULL) + { + as_bad_where (fixP->fx_file, fixP->fx_line, + _ ("Relocation against a constant.")); + } + if (S_GET_SEGMENT (fixP->fx_addsy) == seg + && !S_FORCE_RELOC (fixP->fx_addsy, 1)) + { + int64_t sym_addend = S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset; + int64_t pc = fixP->fx_where + fixP->fx_frag->fr_address; + fix_reloc_insn (fixP, sym_addend - pc, buf); + fixP->fx_done = 1; + } + + break; + + default: + break; + } +} + +int +loongarch_relax_frag (asection *sec ATTRIBUTE_UNUSED, + fragS *fragp ATTRIBUTE_UNUSED, + long stretch ATTRIBUTE_UNUSED) +{ + return 0; +} + +int +md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, + asection *segtype ATTRIBUTE_UNUSED) +{ + return 0; +} + +int +loongarch_fix_adjustable (fixS *fix) +{ + /* Prevent all adjustments to global symbols. */ + if (S_IS_EXTERNAL (fix->fx_addsy) + || S_IS_WEAK (fix->fx_addsy) + || S_FORCE_RELOC (fix->fx_addsy, true)) + return 0; + + return 1; +} + +/* Translate internal representation of relocation info to BFD target + format. */ +arelent * +tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) +{ + arelent *reloc = (arelent *) xmalloc (sizeof (arelent)); + + reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; + reloc->addend = fixp->fx_offset; + + reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); + if (reloc->howto == NULL) + { + as_bad_where (fixp->fx_file, fixp->fx_line, + _("cannot represent %s relocation in object file"), + bfd_get_reloc_code_name (fixp->fx_r_type)); + return NULL; + } + + return reloc; +} + +/* Convert a machine dependent frag. */ +void +md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED, + fragS *fragp ATTRIBUTE_UNUSED) +{ + /* fragp->fr_fix += 8; */ +} + +/* Standard calling conventions leave the CFA at SP on entry. */ +void +loongarch_cfi_frame_initial_instructions (void) +{ + cfi_add_CFA_def_cfa_register (3 /* $sp */); +} + +void +tc_loongarch_parse_to_dw2regnum (expressionS *exp) +{ + expression_and_evaluate (exp); +} + +void +md_show_usage (FILE *stream) +{ + fprintf (stream, _("LARCH options:\n")); + /* FIXME */ +} + +/* Fill in an rs_align_code fragment. We want to fill 'andi $r0,$r0,0'. */ +void +loongarch_handle_align (fragS *fragp) +{ + /* char nop_opcode; */ + char *p; + int bytes, size, excess; + valueT opcode; + + if (fragp->fr_type != rs_align_code) + return; + + struct loongarch_cl_insn nop = + { .name = "andi", .arg_strs = { "$r0", "$r0", "0", NULL } }; + + get_loongarch_opcode (&nop); + gas_assert (nop.all_match); + + p = fragp->fr_literal + fragp->fr_fix; + opcode = nop.insn_bin; + size = 4; + + bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; + excess = bytes % size; + + gas_assert (excess < 4); + fragp->fr_fix += excess; + + while (excess-- != 0) + *p++ = 0; + + md_number_to_chars (p, opcode, size); + fragp->fr_var = size; +} + +void +loongarch_elf_final_processing (void) +{ + elf_elfheader (stdoutput)->e_flags = LARCH_opts.ase_abi; +} diff --git a/gas/config/tc-loongarch.h b/gas/config/tc-loongarch.h new file mode 100644 index 00000000..7d416b0c --- /dev/null +++ b/gas/config/tc-loongarch.h @@ -0,0 +1,93 @@ +/* tc-loongarch.h -- Header file for tc-loongarch.c. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GAS. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the license, or + (at your option) any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#ifndef TC_LOONGARCH +#define TC_LOONGARCH + +#define TARGET_BYTES_BIG_ENDIAN 0 +#define TARGET_ARCH bfd_arch_loongarch + +#define TARGET_MACH (loongarch_mach ()) +extern unsigned long loongarch_mach (void); + +#define WORKING_DOT_WORD 1 +#define REPEAT_CONS_EXPRESSIONS + +/* Early than md_begin. */ +#define md_after_parse_args loongarch_after_parse_args +extern void loongarch_after_parse_args (void); + +extern void loongarch_pop_insert (void); +#define md_pop_insert() loongarch_pop_insert () + +#define TARGET_FORMAT loongarch_target_format () +extern const char *loongarch_target_format (void); + +#define md_relax_frag(segment, fragp, stretch) \ + loongarch_relax_frag (segment, fragp, stretch) +extern int loongarch_relax_frag (asection *, struct frag *, long); +#define md_section_align(seg, size) (size) +#define md_undefined_symbol(name) (0) +#define md_operand(x) + +/* This is called to see whether a reloc against a defined symbol + should be converted into a reloc against a section. */ +extern int loongarch_fix_adjustable (struct fix *fix); +#define tc_fix_adjustable(fixp) loongarch_fix_adjustable(fixp) + +/* Values passed to md_apply_fix don't include symbol values. */ +#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1 +#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1 +#define DIFF_EXPR_OK 1 + +#define TARGET_USE_CFIPOP 1 +#define DWARF2_DEFAULT_RETURN_COLUMN 1 /* $ra. */ +#define DWARF2_CIE_DATA_ALIGNMENT -4 + +#define tc_cfi_frame_initial_instructions \ + loongarch_cfi_frame_initial_instructions +extern void loongarch_cfi_frame_initial_instructions (void); + +#define tc_parse_to_dw2regnum tc_loongarch_parse_to_dw2regnum +extern void tc_loongarch_parse_to_dw2regnum (expressionS *); + +/* A enumerated values to specific how to deal with align in '.text'. + Now we want to fill 'andi $r0,$r0,0x0'. + Here is the type 0, will fill andi insn later. */ +#define NOP_OPCODE (0x00) + +#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0 + +#define HANDLE_ALIGN(fragp) loongarch_handle_align (fragp) +extern void loongarch_handle_align (struct frag *); +#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4) + +#define elf_tc_final_processing loongarch_elf_final_processing +extern void loongarch_elf_final_processing (void); + +#define MAX_RELOC_NUMBER_A_INSN 20 + +struct reloc_info +{ + bfd_reloc_code_real_type type; + expressionS value; +}; + +#endif diff --git a/gas/configure b/gas/configure index 73750257..3c97a465 100755 --- a/gas/configure +++ b/gas/configure @@ -12230,6 +12230,15 @@ _ACEOF using_cgen=yes ;; + loongarch) + for f in config/loongarch-parse.o config/loongarch-lex-wrapper.o; do + case " $extra_objects " in + *" $f "*) ;; + *) extra_objects="$extra_objects $f" ;; + esac + done + ;; + m32c) using_cgen=yes ;; diff --git a/gas/configure.ac b/gas/configure.ac index 78efba88..d1a4667b 100644 --- a/gas/configure.ac +++ b/gas/configure.ac @@ -446,6 +446,15 @@ changequote([,])dnl using_cgen=yes ;; + loongarch) + for f in config/loongarch-parse.o config/loongarch-lex-wrapper.o; do + case " $extra_objects " in + *" $f "*) ;; + *) extra_objects="$extra_objects $f" ;; + esac + done + ;; + m32c) using_cgen=yes ;; diff --git a/gas/configure.tgt b/gas/configure.tgt index 338892ad..4a399c7c 100644 --- a/gas/configure.tgt +++ b/gas/configure.tgt @@ -67,6 +67,7 @@ case ${cpu} in ip2k) cpu_type=ip2k endian=big ;; iq2000) cpu_type=iq2000 endian=big ;; lm32) cpu_type=lm32 ;; + loongarch*) cpu_type=loongarch ;; m32c) cpu_type=m32c endian=little ;; m32r) cpu_type=m32r endian=big ;; m32rle) cpu_type=m32r endian=little ;; @@ -275,6 +276,8 @@ case ${generic_target} in lm32-*-*) fmt=elf ;; + loongarch*) fmt=elf ;; + m32c-*-elf) fmt=elf ;; m32r-*-elf*) fmt=elf ;; @@ -435,7 +438,7 @@ esac case ${cpu_type} in aarch64 | alpha | arm | csky | i386 | ia64 | microblaze | mips | ns32k | \ - or1k | or1knd | pdp11 | ppc | riscv | sh | sparc | z80 | z8k) + or1k | or1knd | pdp11 | ppc | riscv | sh | sparc | z80 | z8k | loongarch) bfd_gas=yes ;; esac diff --git a/gas/doc/as.texi b/gas/doc/as.texi index 292c4af2..9445cda4 100644 --- a/gas/doc/as.texi +++ b/gas/doc/as.texi @@ -379,6 +379,11 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @emph{Target IP2K options:} [@b{-mip2022}|@b{-mip2022ext}] @end ifset +@ifset LOONGARCH + +@emph{Target LOONGARCH options:} + [@b{-fpic}|@b{-fPIC}|@b{-fno-pic}] +@end ifset @ifset M32C @emph{Target M32C options:} @@ -1756,6 +1761,25 @@ Assemble for a little endian target. @end ifset @c man end +@ifset LOONGARCH + +@ifclear man +@xref{LoongArch-Options}, for the options available when @value{AS} is configured +for a LoongArch processor. +@end ifclear + +@ifset man +@c man begin OPTIONS +The following options are available when @value{AS} is configured for a +LoongArch processor. +@c man end +@c man begin INCLUDE +@include c-loongarch.texi +@c ended inside the included file +@end ifset + +@end ifset + @ifset METAG @ifclear man @@ -7837,6 +7861,9 @@ subject, see the hardware manufacturer's manual. @ifset IP2K * IP2K-Dependent:: IP2K Dependent Features @end ifset +@ifset LOONGARCH +* LoongArch-Dependent:: LoongArch Dependent Features +@end ifset @ifset LM32 * LM32-Dependent:: LM32 Dependent Features @end ifset @@ -8061,6 +8088,10 @@ family. @include c-lm32.texi @end ifset +@ifset LOONGARCH +@include c-loongarch.texi +@end ifset + @ifset M32C @include c-m32c.texi @end ifset diff --git a/gas/doc/c-loongarch.texi b/gas/doc/c-loongarch.texi new file mode 100644 index 00000000..2a139484 --- /dev/null +++ b/gas/doc/c-loongarch.texi @@ -0,0 +1,39 @@ +@c Copyright (C) 2021 Free Software Foundation, Inc. +@c This is part of the GAS anual. +@c For copying conditions, see the file as.texinfo +@c man end + +@ifset GENERIC +@page +@node LoongArch-Dependent +@chapter LoongArch Dependent Features +@end ifset +@ifclear GENERIC +@node Machine Dependencies +@chapter LoongArch Dependent Features +@end ifclear + +@cindex LoongArch support +@menu +* LoongArch-Options:: LoongArch Options +@end menu + +@node LoongArch-Options +@section LoongArch Options + +The following table lists all available LoongArch specific options. + +@c man begin OPTIONS +@table @gcctabopt + +@cindex @samp{-fpic} option, LoongArch +@item -fpic +@itemx -fPIC +Generate position-independent code + +@cindex @samp{-fno-pic} option, LoongArch +@item -fno-pic +Don't generate position-independent code (default) + +@end table +@c man end diff --git a/gas/po/POTFILES.in b/gas/po/POTFILES.in index 35b4a794..c25d4f50 100644 --- a/gas/po/POTFILES.in +++ b/gas/po/POTFILES.in @@ -87,6 +87,7 @@ config/tc-iq2000.c config/tc-iq2000.h config/tc-lm32.c config/tc-lm32.h +config/tc-loongarch.c config/tc-m32c.c config/tc-m32c.h config/tc-m32r.c diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp index 389634f6..b39acfa0 100644 --- a/gas/testsuite/gas/all/gas.exp +++ b/gas/testsuite/gas/all/gas.exp @@ -68,7 +68,8 @@ if { ![istarget alpha*-*-*vms*] && ![istarget riscv*-*-*] && ![istarget rl78-*-*] && ![istarget rs6000*-*-aix*] - && ![istarget rx-*-*] } then { + && ![istarget rx-*-*] + && ![istarget loongarch*-*-*] } then { gas_test_error "diff1.s" "" "difference of two undefined symbols" } diff --git a/gas/testsuite/gas/elf/bad-bss.d b/gas/testsuite/gas/elf/bad-bss.d index 972a6ceb..a221167d 100644 --- a/gas/testsuite/gas/elf/bad-bss.d +++ b/gas/testsuite/gas/elf/bad-bss.d @@ -1,4 +1,4 @@ #name: bad .bss / .struct data allocation directives #source: bss.s #error_output: bad-bss.err -#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-* +#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-* loongarch*-*-* diff --git a/gas/testsuite/gas/elf/bss.d b/gas/testsuite/gas/elf/bss.d index 711e74a9..29a2cd7c 100644 --- a/gas/testsuite/gas/elf/bss.d +++ b/gas/testsuite/gas/elf/bss.d @@ -2,7 +2,7 @@ #as: --defsym okay=1 #warning: Warning: zero assumed #readelf: -sSW -#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-* +#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-* loongarch*-*-* There are [1-9][0-9]* section headers, starting at offset 0x[0-9a-f]*: diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp index 23804758..20a4ada4 100644 --- a/gas/testsuite/gas/elf/elf.exp +++ b/gas/testsuite/gas/elf/elf.exp @@ -178,6 +178,7 @@ if { [is_elf_format] } then { rl78-*-* { } riscv*-*-* { } rx-*-* { } + loongarch*-*-* { } default { # The next test can fail if the target does not convert fixups # against ordinary symbols into relocations against section symbols. diff --git a/gas/testsuite/gas/loongarch/4opt_op.d b/gas/testsuite/gas/loongarch/4opt_op.d new file mode 100644 index 00000000..4e8e2cf0 --- /dev/null +++ b/gas/testsuite/gas/loongarch/4opt_op.d @@ -0,0 +1,70 @@ +#as-new: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+08118820 [ ]+fmadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+4:[ ]+08218820 [ ]+fmadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+8:[ ]+08518820 [ ]+fmsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+c:[ ]+08618820 [ ]+fmsub.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+10:[ ]+08918820 [ ]+fnmadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+14:[ ]+08a18820 [ ]+fnmadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+18:[ ]+08d18820 [ ]+fnmsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+1c:[ ]+08e18820 [ ]+fnmsub.d[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fa3 +[ ]+20:[ ]+0c100820 [ ]+fcmp.caf.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+24:[ ]+0c108820 [ ]+fcmp.saf.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+28:[ ]+0c110820 [ ]+fcmp.clt.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+2c:[ ]+0c118820 [ ]+fcmp.slt.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+30:[ ]+0c118820 [ ]+fcmp.slt.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+34:[ ]+0c120820 [ ]+fcmp.ceq.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+38:[ ]+0c128820 [ ]+fcmp.seq.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+3c:[ ]+0c130820 [ ]+fcmp.cle.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+40:[ ]+0c138820 [ ]+fcmp.sle.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+44:[ ]+0c138820 [ ]+fcmp.sle.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+48:[ ]+0c140820 [ ]+fcmp.cun.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+4c:[ ]+0c148820 [ ]+fcmp.sun.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+50:[ ]+0c150820 [ ]+fcmp.cult.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+54:[ ]+0c150820 [ ]+fcmp.cult.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+58:[ ]+0c158820 [ ]+fcmp.sult.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+5c:[ ]+0c160820 [ ]+fcmp.cueq.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+60:[ ]+0c168820 [ ]+fcmp.sueq.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+64:[ ]+0c170820 [ ]+fcmp.cule.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+68:[ ]+0c170820 [ ]+fcmp.cule.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+6c:[ ]+0c178820 [ ]+fcmp.sule.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+70:[ ]+0c180820 [ ]+fcmp.cne.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+74:[ ]+0c188820 [ ]+fcmp.sne.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+78:[ ]+0c1a0820 [ ]+fcmp.cor.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+7c:[ ]+0c1a8820 [ ]+fcmp.sor.s[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+80:[ ]+0c1c0820 [ ]+fcmp.cune.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+84:[ ]+0c1c8820 [ ]+fcmp.sune.s [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+88:[ ]+0c200820 [ ]+fcmp.caf.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+8c:[ ]+0c208820 [ ]+fcmp.saf.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+90:[ ]+0c210820 [ ]+fcmp.clt.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+94:[ ]+0c218820 [ ]+fcmp.slt.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+98:[ ]+0c218820 [ ]+fcmp.slt.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+9c:[ ]+0c220820 [ ]+fcmp.ceq.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+a0:[ ]+0c228820 [ ]+fcmp.seq.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+a4:[ ]+0c230820 [ ]+fcmp.cle.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+a8:[ ]+0c238820 [ ]+fcmp.sle.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+ac:[ ]+0c238820 [ ]+fcmp.sle.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+b0:[ ]+0c240820 [ ]+fcmp.cun.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+b4:[ ]+0c248820 [ ]+fcmp.sun.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+b8:[ ]+0c250820 [ ]+fcmp.cult.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+bc:[ ]+0c250820 [ ]+fcmp.cult.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+c0:[ ]+0c258820 [ ]+fcmp.sult.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+c4:[ ]+0c260820 [ ]+fcmp.cueq.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+c8:[ ]+0c268820 [ ]+fcmp.sueq.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+cc:[ ]+0c270820 [ ]+fcmp.cule.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+d0:[ ]+0c270820 [ ]+fcmp.cule.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+d4:[ ]+0c278820 [ ]+fcmp.sule.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+d8:[ ]+0c280820 [ ]+fcmp.cne.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+dc:[ ]+0c288820 [ ]+fcmp.sne.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+e0:[ ]+0c2a0820 [ ]+fcmp.cor.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+e4:[ ]+0c2a8820 [ ]+fcmp.sor.d[ ]+[ ]+\$fcc0, \$fa1, \$fa2 +[ ]+e8:[ ]+0c2c0820 [ ]+fcmp.cune.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+ec:[ ]+0c2c8820 [ ]+fcmp.sune.d [ ]+\$fcc0, \$fa1, \$fa2 +[ ]+f0:[ ]+0d000820 [ ]+fsel[ ]+[ ]+\$fa0, \$fa1, \$fa2, \$fcc0 diff --git a/gas/testsuite/gas/loongarch/4opt_op.s b/gas/testsuite/gas/loongarch/4opt_op.s new file mode 100644 index 00000000..f14fbd6b --- /dev/null +++ b/gas/testsuite/gas/loongarch/4opt_op.s @@ -0,0 +1,61 @@ +fmadd.s $f0,$f1,$f2,$f3 +fmadd.d $f0,$f1,$f2,$f3 +fmsub.s $f0,$f1,$f2,$f3 +fmsub.d $f0,$f1,$f2,$f3 +fnmadd.s $f0,$f1,$f2,$f3 +fnmadd.d $f0,$f1,$f2,$f3 +fnmsub.s $f0,$f1,$f2,$f3 +fnmsub.d $f0,$f1,$f2,$f3 +fcmp.caf.s $fcc0,$f1,$f2 +fcmp.saf.s $fcc0,$f1,$f2 +fcmp.clt.s $fcc0,$f1,$f2 +fcmp.slt.s $fcc0,$f1,$f2 +fcmp.sgt.s $fcc0,$f2,$f1 +fcmp.ceq.s $fcc0,$f1,$f2 +fcmp.seq.s $fcc0,$f1,$f2 +fcmp.cle.s $fcc0,$f1,$f2 +fcmp.sle.s $fcc0,$f1,$f2 +fcmp.sge.s $fcc0,$f2,$f1 +fcmp.cun.s $fcc0,$f1,$f2 +fcmp.sun.s $fcc0,$f1,$f2 +fcmp.cult.s $fcc0,$f1,$f2 +fcmp.cugt.s $fcc0,$f2,$f1 +fcmp.sult.s $fcc0,$f1,$f2 +fcmp.cueq.s $fcc0,$f1,$f2 +fcmp.sueq.s $fcc0,$f1,$f2 +fcmp.cule.s $fcc0,$f1,$f2 +fcmp.cuge.s $fcc0,$f2,$f1 +fcmp.sule.s $fcc0,$f1,$f2 +fcmp.cne.s $fcc0,$f1,$f2 +fcmp.sne.s $fcc0,$f1,$f2 +fcmp.cor.s $fcc0,$f1,$f2 +fcmp.sor.s $fcc0,$f1,$f2 +fcmp.cune.s $fcc0,$f1,$f2 +fcmp.sune.s $fcc0,$f1,$f2 +fcmp.caf.d $fcc0,$f1,$f2 +fcmp.saf.d $fcc0,$f1,$f2 +fcmp.clt.d $fcc0,$f1,$f2 +fcmp.slt.d $fcc0,$f1,$f2 +fcmp.sgt.d $fcc0,$f2,$f1 +fcmp.ceq.d $fcc0,$f1,$f2 +fcmp.seq.d $fcc0,$f1,$f2 +fcmp.cle.d $fcc0,$f1,$f2 +fcmp.sle.d $fcc0,$f1,$f2 +fcmp.sge.d $fcc0,$f2,$f1 +fcmp.cun.d $fcc0,$f1,$f2 +fcmp.sun.d $fcc0,$f1,$f2 +fcmp.cult.d $fcc0,$f1,$f2 +fcmp.cugt.d $fcc0,$f2,$f1 +fcmp.sult.d $fcc0,$f1,$f2 +fcmp.cueq.d $fcc0,$f1,$f2 +fcmp.sueq.d $fcc0,$f1,$f2 +fcmp.cule.d $fcc0,$f1,$f2 +fcmp.cuge.d $fcc0,$f2,$f1 +fcmp.sule.d $fcc0,$f1,$f2 +fcmp.cne.d $fcc0,$f1,$f2 +fcmp.sne.d $fcc0,$f1,$f2 +fcmp.cor.d $fcc0,$f1,$f2 +fcmp.sor.d $fcc0,$f1,$f2 +fcmp.cune.d $fcc0,$f1,$f2 +fcmp.sune.d $fcc0,$f1,$f2 +fsel $f0,$f1,$f2,$fcc0 diff --git a/gas/testsuite/gas/loongarch/bfd_reloc_8.s b/gas/testsuite/gas/loongarch/bfd_reloc_8.s new file mode 100644 index 00000000..27388a58 --- /dev/null +++ b/gas/testsuite/gas/loongarch/bfd_reloc_8.s @@ -0,0 +1,16 @@ +# from linux kernel entry.s +# test line 10 ".byte \type", BFD_RELOC_8 -> BFD_RELOC_RLARCH_ADD8 -> R_LARCH_ADD8 + +.macro UNWIND_HINT type:req sp_reg=0 sp_offset=0 end=0 +.Lunwind_hint_ip_\@: + .pushsection .discard.unwind_hints + .long .Lunwind_hint_ip_\@ - . + .short \sp_offset + .byte \sp_reg + .byte \type + .byte \end + .balign 4 + .popsection +.endm + +UNWIND_HINT type=ORC_TYPE_CALL sp_reg=2 diff --git a/gas/testsuite/gas/loongarch/fix_op.d b/gas/testsuite/gas/loongarch/fix_op.d new file mode 100644 index 00000000..7125f2e3 --- /dev/null +++ b/gas/testsuite/gas/loongarch/fix_op.d @@ -0,0 +1,134 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+000010a4 [ ]+clo.w[ ]+[ ]+\$a0, \$a1 +[ ]+4:[ ]+000014a4 [ ]+clz.w[ ]+[ ]+\$a0, \$a1 +[ ]+8:[ ]+000018a4 [ ]+cto.w[ ]+[ ]+\$a0, \$a1 +[ ]+c:[ ]+00001ca4 [ ]+ctz.w[ ]+[ ]+\$a0, \$a1 +[ ]+10:[ ]+000020a4 [ ]+clo.d[ ]+[ ]+\$a0, \$a1 +[ ]+14:[ ]+000024a4 [ ]+clz.d[ ]+[ ]+\$a0, \$a1 +[ ]+18:[ ]+000028a4 [ ]+cto.d[ ]+[ ]+\$a0, \$a1 +[ ]+1c:[ ]+00002ca4 [ ]+ctz.d[ ]+[ ]+\$a0, \$a1 +[ ]+20:[ ]+000030a4 [ ]+revb.2h[ ]+[ ]+\$a0, \$a1 +[ ]+24:[ ]+000034a4 [ ]+revb.4h[ ]+[ ]+\$a0, \$a1 +[ ]+28:[ ]+000038a4 [ ]+revb.2w[ ]+[ ]+\$a0, \$a1 +[ ]+2c:[ ]+00003ca4 [ ]+revb.d[ ]+[ ]+\$a0, \$a1 +[ ]+30:[ ]+000040a4 [ ]+revh.2w[ ]+[ ]+\$a0, \$a1 +[ ]+34:[ ]+000044a4 [ ]+revh.d[ ]+[ ]+\$a0, \$a1 +[ ]+38:[ ]+000048a4 [ ]+bitrev.4b[ ]+[ ]+\$a0, \$a1 +[ ]+3c:[ ]+00004ca4 [ ]+bitrev.8b[ ]+[ ]+\$a0, \$a1 +[ ]+40:[ ]+000050a4 [ ]+bitrev.w[ ]+[ ]+\$a0, \$a1 +[ ]+44:[ ]+000054a4 [ ]+bitrev.d[ ]+[ ]+\$a0, \$a1 +[ ]+48:[ ]+000058a4 [ ]+ext.w.h[ ]+[ ]+\$a0, \$a1 +[ ]+4c:[ ]+00005ca4 [ ]+ext.w.b[ ]+[ ]+\$a0, \$a1 +[ ]+50:[ ]+001500a4 [ ]+move[ ]+[ ]+\$a0, \$a1 +[ ]+54:[ ]+000060a4 [ ]+rdtimel.w[ ]+[ ]+\$a0, \$a1 +[ ]+58:[ ]+000064a4 [ ]+rdtimeh.w[ ]+[ ]+\$a0, \$a1 +[ ]+5c:[ ]+000068a4 [ ]+rdtime.d[ ]+[ ]+\$a0, \$a1 +[ ]+60:[ ]+00006ca4 [ ]+cpucfg[ ]+[ ]+\$a0, \$a1 +[ ]+64:[ ]+000118a0 [ ]+asrtle.d[ ]+[ ]+\$a1, \$a2 +[ ]+68:[ ]+000198a0 [ ]+asrtgt.d[ ]+[ ]+\$a1, \$a2 +[ ]+6c:[ ]+000418a4 [ ]+alsl.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x1 +[ ]+70:[ ]+000598a4 [ ]+alsl.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x4 +[ ]+74:[ ]+000618a4 [ ]+alsl.wu[ ]+[ ]+\$a0, \$a1, \$a2, 0x1 +[ ]+78:[ ]+000798a4 [ ]+alsl.wu[ ]+[ ]+\$a0, \$a1, \$a2, 0x4 +[ ]+7c:[ ]+000818a4 [ ]+bytepick.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x0 +[ ]+80:[ ]+000998a4 [ ]+bytepick.w[ ]+[ ]+\$a0, \$a1, \$a2, 0x3 +[ ]+84:[ ]+000c18a4 [ ]+bytepick.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x0 +[ ]+88:[ ]+000f98a4 [ ]+bytepick.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x7 +[ ]+8c:[ ]+001018a4 [ ]+add.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+90:[ ]+001098a4 [ ]+add.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+94:[ ]+001118a4 [ ]+sub.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+98:[ ]+001198a4 [ ]+sub.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+9c:[ ]+001218a4 [ ]+slt[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+a0:[ ]+001298a4 [ ]+sltu[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+a4:[ ]+001318a4 [ ]+maskeqz[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+a8:[ ]+001398a4 [ ]+masknez[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+ac:[ ]+001418a4 [ ]+nor[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+b0:[ ]+001498a4 [ ]+and[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+b4:[ ]+001518a4 [ ]+or[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+b8:[ ]+001598a4 [ ]+xor[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+bc:[ ]+001618a4 [ ]+orn[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+c0:[ ]+001698a4 [ ]+andn[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+c4:[ ]+001718a4 [ ]+sll.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+c8:[ ]+001798a4 [ ]+srl.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+cc:[ ]+001818a4 [ ]+sra.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+d0:[ ]+001898a4 [ ]+sll.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+d4:[ ]+001918a4 [ ]+srl.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+d8:[ ]+001998a4 [ ]+sra.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+dc:[ ]+001b18a4 [ ]+rotr.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+e0:[ ]+001b98a4 [ ]+rotr.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+e4:[ ]+001c18a4 [ ]+mul.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+e8:[ ]+001c98a4 [ ]+mulh.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+ec:[ ]+001d18a4 [ ]+mulh.wu[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+f0:[ ]+001d98a4 [ ]+mul.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+f4:[ ]+001e18a4 [ ]+mulh.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+f8:[ ]+001e98a4 [ ]+mulh.du[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+fc:[ ]+001f18a4 [ ]+mulw.d.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+100:[ ]+001f98a4 [ ]+mulw.d.wu[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+104:[ ]+002018a4 [ ]+div.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+108:[ ]+002098a4 [ ]+mod.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+10c:[ ]+002118a4 [ ]+div.wu[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+110:[ ]+002198a4 [ ]+mod.wu[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+114:[ ]+002218a4 [ ]+div.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+118:[ ]+002298a4 [ ]+mod.d[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+11c:[ ]+002318a4 [ ]+div.du[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+120:[ ]+002398a4 [ ]+mod.du[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+124:[ ]+002418a4 [ ]+crc.w.b.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+128:[ ]+002498a4 [ ]+crc.w.h.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+12c:[ ]+002518a4 [ ]+crc.w.w.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+130:[ ]+002598a4 [ ]+crc.w.d.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+134:[ ]+002618a4 [ ]+crcc.w.b.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+138:[ ]+002698a4 [ ]+crcc.w.h.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+13c:[ ]+002718a4 [ ]+crcc.w.w.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+140:[ ]+002798a4 [ ]+crcc.w.d.w[ ]+[ ]+\$a0, \$a1, \$a2 +[ ]+144:[ ]+002a0000 [ ]+break[ ]+[ ]+0x0 +[ ]+148:[ ]+002a7fff [ ]+break[ ]+[ ]+0x7fff +[ ]+14c:[ ]+002a8000 [ ]+dbcl[ ]+[ ]+0x0 +[ ]+150:[ ]+002affff [ ]+dbcl[ ]+[ ]+0x7fff +[ ]+154:[ ]+002c18a4 [ ]+alsl.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x1 +[ ]+158:[ ]+002d98a4 [ ]+alsl.d[ ]+[ ]+\$a0, \$a1, \$a2, 0x4 +[ ]+15c:[ ]+004080a4 [ ]+slli.w[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+160:[ ]+004084a4 [ ]+slli.w[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+164:[ ]+0040fca4 [ ]+slli.w[ ]+[ ]+\$a0, \$a1, 0x1f +[ ]+168:[ ]+004100a4 [ ]+slli.d[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+16c:[ ]+004104a4 [ ]+slli.d[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+170:[ ]+0041fca4 [ ]+slli.d[ ]+[ ]+\$a0, \$a1, 0x3f +[ ]+174:[ ]+004480a4 [ ]+srli.w[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+178:[ ]+004484a4 [ ]+srli.w[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+17c:[ ]+0044fca4 [ ]+srli.w[ ]+[ ]+\$a0, \$a1, 0x1f +[ ]+180:[ ]+004500a4 [ ]+srli.d[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+184:[ ]+004504a4 [ ]+srli.d[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+188:[ ]+0045fca4 [ ]+srli.d[ ]+[ ]+\$a0, \$a1, 0x3f +[ ]+18c:[ ]+004880a4 [ ]+srai.w[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+190:[ ]+004884a4 [ ]+srai.w[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+194:[ ]+0048fca4 [ ]+srai.w[ ]+[ ]+\$a0, \$a1, 0x1f +[ ]+198:[ ]+004900a4 [ ]+srai.d[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+19c:[ ]+004904a4 [ ]+srai.d[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+1a0:[ ]+0049fca4 [ ]+srai.d[ ]+[ ]+\$a0, \$a1, 0x3f +[ ]+1a4:[ ]+004c80a4 [ ]+rotri.w[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+1a8:[ ]+004c84a4 [ ]+rotri.w[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+1ac:[ ]+004cfca4 [ ]+rotri.w[ ]+[ ]+\$a0, \$a1, 0x1f +[ ]+1b0:[ ]+004d00a4 [ ]+rotri.d[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+1b4:[ ]+004d04a4 [ ]+rotri.d[ ]+[ ]+\$a0, \$a1, 0x1 +[ ]+1b8:[ ]+004dfca4 [ ]+rotri.d[ ]+[ ]+\$a0, \$a1, 0x3f +[ ]+1bc:[ ]+006000a4 [ ]+bstrins.w[ ]+[ ]+\$a0, \$a1, 0x0, 0x0 +[ ]+1c0:[ ]+006204a4 [ ]+bstrins.w[ ]+[ ]+\$a0, \$a1, 0x2, 0x1 +[ ]+1c4:[ ]+007f00a4 [ ]+bstrins.w[ ]+[ ]+\$a0, \$a1, 0x1f, 0x0 +[ ]+1c8:[ ]+006080a4 [ ]+bstrpick.w[ ]+[ ]+\$a0, \$a1, 0x0, 0x0 +[ ]+1cc:[ ]+006284a4 [ ]+bstrpick.w[ ]+[ ]+\$a0, \$a1, 0x2, 0x1 +[ ]+1d0:[ ]+007f80a4 [ ]+bstrpick.w[ ]+[ ]+\$a0, \$a1, 0x1f, 0x0 +[ ]+1d4:[ ]+008000a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x0, 0x0 +[ ]+1d8:[ ]+009f04a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x1f, 0x1 +[ ]+1dc:[ ]+00a000a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x20, 0x0 +[ ]+1e0:[ ]+00bf00a4 [ ]+bstrins.d[ ]+[ ]+\$a0, \$a1, 0x3f, 0x0 +[ ]+1e4:[ ]+00c000a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x0, 0x0 +[ ]+1e8:[ ]+00df04a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x1f, 0x1 +[ ]+1ec:[ ]+00e000a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x20, 0x0 +[ ]+1f0:[ ]+00ff00a4 [ ]+bstrpick.d[ ]+[ ]+\$a0, \$a1, 0x3f, 0x0 diff --git a/gas/testsuite/gas/loongarch/fix_op.s b/gas/testsuite/gas/loongarch/fix_op.s new file mode 100644 index 00000000..d0523f95 --- /dev/null +++ b/gas/testsuite/gas/loongarch/fix_op.s @@ -0,0 +1,125 @@ +clo.w $r4,$r5 +clz.w $r4,$r5 +cto.w $r4,$r5 +ctz.w $r4,$r5 +clo.d $r4,$r5 +clz.d $r4,$r5 +cto.d $r4,$r5 +ctz.d $r4,$r5 +revb.2h $r4,$r5 +revb.4h $r4,$r5 +revb.2w $r4,$r5 +revb.d $r4,$r5 +revh.2w $r4,$r5 +revh.d $r4,$r5 +bitrev.4b $r4,$r5 +bitrev.8b $r4,$r5 +bitrev.w $r4,$r5 +bitrev.d $r4,$r5 +ext.w.h $r4,$r5 +ext.w.b $r4,$r5 +move $r4,$r5 +rdtimel.w $r4,$r5 +rdtimeh.w $r4,$r5 +rdtime.d $r4,$r5 +cpucfg $r4,$r5 +asrtle.d $r5,$r6 +asrtgt.d $r5,$r6 +alsl.w $r4,$r5,$r6,1 +alsl.w $r4,$r5,$r6,4 +alsl.wu $r4,$r5,$r6,1 +alsl.wu $r4,$r5,$r6,4 +bytepick.w $r4,$r5,$r6,0 +bytepick.w $r4,$r5,$r6,3 +bytepick.d $r4,$r5,$r6,0 +bytepick.d $r4,$r5,$r6,7 +add.w $r4,$r5,$r6 +add.d $r4,$r5,$r6 +sub.w $r4,$r5,$r6 +sub.d $r4,$r5,$r6 +slt $r4,$r5,$r6 +sltu $r4,$r5,$r6 +maskeqz $r4,$r5,$r6 +masknez $r4,$r5,$r6 +nor $r4,$r5,$r6 +and $r4,$r5,$r6 +or $r4,$r5,$r6 +xor $r4,$r5,$r6 +orn $r4,$r5,$r6 +andn $r4,$r5,$r6 +sll.w $r4,$r5,$r6 +srl.w $r4,$r5,$r6 +sra.w $r4,$r5,$r6 +sll.d $r4,$r5,$r6 +srl.d $r4,$r5,$r6 +sra.d $r4,$r5,$r6 +rotr.w $r4,$r5,$r6 +rotr.d $r4,$r5,$r6 +mul.w $r4,$r5,$r6 +mulh.w $r4,$r5,$r6 +mulh.wu $r4,$r5,$r6 +mul.d $r4,$r5,$r6 +mulh.d $r4,$r5,$r6 +mulh.du $r4,$r5,$r6 +mulw.d.w $r4,$r5,$r6 +mulw.d.wu $r4,$r5,$r6 +div.w $r4,$r5,$r6 +mod.w $r4,$r5,$r6 +div.wu $r4,$r5,$r6 +mod.wu $r4,$r5,$r6 +div.d $r4,$r5,$r6 +mod.d $r4,$r5,$r6 +div.du $r4,$r5,$r6 +mod.du $r4,$r5,$r6 +crc.w.b.w $r4,$r5,$r6 +crc.w.h.w $r4,$r5,$r6 +crc.w.w.w $r4,$r5,$r6 +crc.w.d.w $r4,$r5,$r6 +crcc.w.b.w $r4,$r5,$r6 +crcc.w.h.w $r4,$r5,$r6 +crcc.w.w.w $r4,$r5,$r6 +crcc.w.d.w $r4,$r5,$r6 +break 0 +break 0x7fff +dbcl 0 +dbcl 0x7fff +alsl.d $r4,$r5,$r6,1 +alsl.d $r4,$r5,$r6,4 +slli.w $r4,$r5,0 +slli.w $r4,$r5,1 +slli.w $r4,$r5,0x1f +slli.d $r4,$r5,0 +slli.d $r4,$r5,1 +slli.d $r4,$r5,0x3f +srli.w $r4,$r5,0 +srli.w $r4,$r5,1 +srli.w $r4,$r5,0x1f +srli.d $r4,$r5,0 +srli.d $r4,$r5,1 +srli.d $r4,$r5,0x3f +srai.w $r4,$r5,0 +srai.w $r4,$r5,1 +srai.w $r4,$r5,0x1f +srai.d $r4,$r5,0 +srai.d $r4,$r5,1 +srai.d $r4,$r5,0x3f +rotri.w $r4,$r5,0 +rotri.w $r4,$r5,1 +rotri.w $r4,$r5,0x1f +rotri.d $r4,$r5,0 +rotri.d $r4,$r5,1 +rotri.d $r4,$r5,0x3f +bstrins.w $r4,$r5,0,0 +bstrins.w $r4,$r5,2,1 +bstrins.w $r4,$r5,31,0 +bstrpick.w $r4,$r5,0,0 +bstrpick.w $r4,$r5,2,1 +bstrpick.w $r4,$r5,31,0 +bstrins.d $r4,$r5,0,0 +bstrins.d $r4,$r5,31,1 +bstrins.d $r4,$r5,32,0 +bstrins.d $r4,$r5,63,0 +bstrpick.d $r4,$r5,0,0 +bstrpick.d $r4,$r5,31,1 +bstrpick.d $r4,$r5,32,0 +bstrpick.d $r4,$r5,63,0 diff --git a/gas/testsuite/gas/loongarch/float_op.d b/gas/testsuite/gas/loongarch/float_op.d new file mode 100644 index 00000000..cdc41d4d --- /dev/null +++ b/gas/testsuite/gas/loongarch/float_op.d @@ -0,0 +1,85 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <.text>: +[ ]+0:[ ]+01008820 [ ]+fadd.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+4:[ ]+01010820 [ ]+fadd.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+8:[ ]+01028820 [ ]+fsub.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+c:[ ]+01030820 [ ]+fsub.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+10:[ ]+01048820 [ ]+fmul.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+14:[ ]+01050820 [ ]+fmul.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+18:[ ]+01068820 [ ]+fdiv.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+1c:[ ]+01070820 [ ]+fdiv.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+20:[ ]+01088820 [ ]+fmax.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+24:[ ]+01090820 [ ]+fmax.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+28:[ ]+010a8820 [ ]+fmin.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+2c:[ ]+010b0820 [ ]+fmin.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+30:[ ]+010c8820 [ ]+fmaxa.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+34:[ ]+010d0820 [ ]+fmaxa.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+38:[ ]+010e8820 [ ]+fmina.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+3c:[ ]+010f0820 [ ]+fmina.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+40:[ ]+01108820 [ ]+fscaleb.s[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+44:[ ]+01110820 [ ]+fscaleb.d[ ]+[ ]+\$fa0, \$fa1, \$fa2 +[ ]+48:[ ]+01128820 [ ]+fcopysign.s [ ]+\$fa0, \$fa1, \$fa2 +[ ]+4c:[ ]+01130820 [ ]+fcopysign.d [ ]+\$fa0, \$fa1, \$fa2 +[ ]+50:[ ]+01140420 [ ]+fabs.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+54:[ ]+01140820 [ ]+fabs.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+58:[ ]+01141420 [ ]+fneg.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+5c:[ ]+01141820 [ ]+fneg.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+60:[ ]+01142420 [ ]+flogb.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+64:[ ]+01142820 [ ]+flogb.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+68:[ ]+01143420 [ ]+fclass.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+6c:[ ]+01143820 [ ]+fclass.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+70:[ ]+01144420 [ ]+fsqrt.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+74:[ ]+01144820 [ ]+fsqrt.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+78:[ ]+01145420 [ ]+frecip.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+7c:[ ]+01145820 [ ]+frecip.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+80:[ ]+01146420 [ ]+frsqrt.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+84:[ ]+01146820 [ ]+frsqrt.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+88:[ ]+01149420 [ ]+fmov.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+8c:[ ]+01149820 [ ]+fmov.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+90:[ ]+0114a4a0 [ ]+movgr2fr.w[ ]+[ ]+\$fa0, \$a1 +[ ]+94:[ ]+0114a8a0 [ ]+movgr2fr.d[ ]+[ ]+\$fa0, \$a1 +[ ]+98:[ ]+0114aca0 [ ]+movgr2frh.w [ ]+\$fa0, \$a1 +[ ]+9c:[ ]+0114b424 [ ]+movfr2gr.s[ ]+[ ]+\$a0, \$fa1 +[ ]+a0:[ ]+0114b824 [ ]+movfr2gr.d[ ]+[ ]+\$a0, \$fa1 +[ ]+a4:[ ]+0114bc24 [ ]+movfrh2gr.s [ ]+\$a0, \$fa1 +[ ]+a8:[ ]+0114c0a4 [ ]+movgr2fcsr[ ]+[ ]+\$a0, \$a1 +[ ]+ac:[ ]+0114c8a4 [ ]+movfcsr2gr[ ]+[ ]+\$a0, \$a1 +[ ]+b0:[ ]+0114d020 [ ]+movfr2cf[ ]+[ ]+\$fcc0, \$fa1 +[ ]+b4:[ ]+0114d4a0 [ ]+movcf2fr[ ]+[ ]+\$fa0, \$fcc5 +[ ]+b8:[ ]+0114d8a0 [ ]+movgr2cf[ ]+[ ]+\$fcc0, \$a1 +[ ]+bc:[ ]+0114dca4 [ ]+movcf2gr[ ]+[ ]+\$a0, \$fcc5 +[ ]+c0:[ ]+01191820 [ ]+fcvt.s.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+c4:[ ]+01192420 [ ]+fcvt.d.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+c8:[ ]+011a0420 [ ]+ftintrm.w.s [ ]+\$fa0, \$fa1 +[ ]+cc:[ ]+011a0820 [ ]+ftintrm.w.d [ ]+\$fa0, \$fa1 +[ ]+d0:[ ]+011a2420 [ ]+ftintrm.l.s [ ]+\$fa0, \$fa1 +[ ]+d4:[ ]+011a2820 [ ]+ftintrm.l.d [ ]+\$fa0, \$fa1 +[ ]+d8:[ ]+011a4420 [ ]+ftintrp.w.s [ ]+\$fa0, \$fa1 +[ ]+dc:[ ]+011a4820 [ ]+ftintrp.w.d [ ]+\$fa0, \$fa1 +[ ]+e0:[ ]+011a6420 [ ]+ftintrp.l.s [ ]+\$fa0, \$fa1 +[ ]+e4:[ ]+011a6820 [ ]+ftintrp.l.d [ ]+\$fa0, \$fa1 +[ ]+e8:[ ]+011a8420 [ ]+ftintrz.w.s [ ]+\$fa0, \$fa1 +[ ]+ec:[ ]+011a8820 [ ]+ftintrz.w.d [ ]+\$fa0, \$fa1 +[ ]+f0:[ ]+011aa420 [ ]+ftintrz.l.s [ ]+\$fa0, \$fa1 +[ ]+f4:[ ]+011aa820 [ ]+ftintrz.l.d [ ]+\$fa0, \$fa1 +[ ]+f8:[ ]+011ac420 [ ]+ftintrne.w.s[ ]+\$fa0, \$fa1 +[ ]+fc:[ ]+011ac820 [ ]+ftintrne.w.d[ ]+\$fa0, \$fa1 +[ ]+100:[ ]+011ae420 [ ]+ftintrne.l.s[ ]+\$fa0, \$fa1 +[ ]+104:[ ]+011ae820 [ ]+ftintrne.l.d[ ]+\$fa0, \$fa1 +[ ]+108:[ ]+011b0420 [ ]+ftint.w.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+10c:[ ]+011b0820 [ ]+ftint.w.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+110:[ ]+011b2420 [ ]+ftint.l.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+114:[ ]+011b2820 [ ]+ftint.l.d[ ]+[ ]+\$fa0, \$fa1 +[ ]+118:[ ]+011d1020 [ ]+ffint.s.w[ ]+[ ]+\$fa0, \$fa1 +[ ]+11c:[ ]+011d1820 [ ]+ffint.s.l[ ]+[ ]+\$fa0, \$fa1 +[ ]+120:[ ]+011d2020 [ ]+ffint.d.w[ ]+[ ]+\$fa0, \$fa1 +[ ]+124:[ ]+011d2820 [ ]+ffint.d.l[ ]+[ ]+\$fa0, \$fa1 +[ ]+128:[ ]+011e4420 [ ]+frint.s[ ]+[ ]+\$fa0, \$fa1 +[ ]+12c:[ ]+011e4820 [ ]+frint.d[ ]+[ ]+\$fa0, \$fa1 diff --git a/gas/testsuite/gas/loongarch/float_op.s b/gas/testsuite/gas/loongarch/float_op.s new file mode 100644 index 00000000..da1a198e --- /dev/null +++ b/gas/testsuite/gas/loongarch/float_op.s @@ -0,0 +1,76 @@ +fadd.s $f0,$f1,$f2 +fadd.d $f0,$f1,$f2 +fsub.s $f0,$f1,$f2 +fsub.d $f0,$f1,$f2 +fmul.s $f0,$f1,$f2 +fmul.d $f0,$f1,$f2 +fdiv.s $f0,$f1,$f2 +fdiv.d $f0,$f1,$f2 +fmax.s $f0,$f1,$f2 +fmax.d $f0,$f1,$f2 +fmin.s $f0,$f1,$f2 +fmin.d $f0,$f1,$f2 +fmaxa.s $f0,$f1,$f2 +fmaxa.d $f0,$f1,$f2 +fmina.s $f0,$f1,$f2 +fmina.d $f0,$f1,$f2 +fscaleb.s $f0,$f1,$f2 +fscaleb.d $f0,$f1,$f2 +fcopysign.s $f0,$f1,$f2 +fcopysign.d $f0,$f1,$f2 +fabs.s $f0,$f1 +fabs.d $f0,$f1 +fneg.s $f0,$f1 +fneg.d $f0,$f1 +flogb.s $f0,$f1 +flogb.d $f0,$f1 +fclass.s $f0,$f1 +fclass.d $f0,$f1 +fsqrt.s $f0,$f1 +fsqrt.d $f0,$f1 +frecip.s $f0,$f1 +frecip.d $f0,$f1 +frsqrt.s $f0,$f1 +frsqrt.d $f0,$f1 +fmov.s $f0,$f1 +fmov.d $f0,$f1 +movgr2fr.w $f0,$r5 +movgr2fr.d $f0,$r5 +movgr2frh.w $f0,$r5 +movfr2gr.s $r4,$f1 +movfr2gr.d $r4,$f1 +movfrh2gr.s $r4,$f1 +movgr2fcsr $r4,$r5 +movfcsr2gr $r4,$r5 +movfr2cf $fcc0,$f1 +movcf2fr $f0,$fcc5 +movgr2cf $fcc0,$r5 +movcf2gr $r4,$fcc5 +fcvt.s.d $f0,$f1 +fcvt.d.s $f0,$f1 +ftintrm.w.s $f0,$f1 +ftintrm.w.d $f0,$f1 +ftintrm.l.s $f0,$f1 +ftintrm.l.d $f0,$f1 +ftintrp.w.s $f0,$f1 +ftintrp.w.d $f0,$f1 +ftintrp.l.s $f0,$f1 +ftintrp.l.d $f0,$f1 +ftintrz.w.s $f0,$f1 +ftintrz.w.d $f0,$f1 +ftintrz.l.s $f0,$f1 +ftintrz.l.d $f0,$f1 +ftintrne.w.s $f0,$f1 +ftintrne.w.d $f0,$f1 +ftintrne.l.s $f0,$f1 +ftintrne.l.d $f0,$f1 +ftint.w.s $f0,$f1 +ftint.w.d $f0,$f1 +ftint.l.s $f0,$f1 +ftint.l.d $f0,$f1 +ffint.s.w $f0,$f1 +ffint.s.l $f0,$f1 +ffint.d.w $f0,$f1 +ffint.d.l $f0,$f1 +frint.s $f0,$f1 +frint.d $f0,$f1 diff --git a/gas/testsuite/gas/loongarch/imm_op.d b/gas/testsuite/gas/loongarch/imm_op.d new file mode 100644 index 00000000..a017aaf5 --- /dev/null +++ b/gas/testsuite/gas/loongarch/imm_op.d @@ -0,0 +1,48 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+020000a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 0 +[ ]+4:[ ]+021ffca4 [ ]+slti[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+8:[ ]+022004a4 [ ]+slti[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+c:[ ]+024000a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 0 +[ ]+10:[ ]+025ffca4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+14:[ ]+026004a4 [ ]+sltui[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+18:[ ]+028000a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+1c:[ ]+029ffca4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+20:[ ]+02a004a4 [ ]+addi.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+24:[ ]+02c000a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+28:[ ]+02dffca4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+2c:[ ]+02e004a4 [ ]+addi.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+30:[ ]+030000a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+34:[ ]+031ffca4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+38:[ ]+032004a4 [ ]+lu52i.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+3c:[ ]+034000a4 [ ]+andi[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+40:[ ]+035ffca4 [ ]+andi[ ]+[ ]+\$a0, \$a1, 0x7ff +[ ]+44:[ ]+038000a4 [ ]+ori[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+48:[ ]+039ffca4 [ ]+ori[ ]+[ ]+\$a0, \$a1, 0x7ff +[ ]+4c:[ ]+03c000a4 [ ]+xori[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+50:[ ]+03dffca4 [ ]+xori[ ]+[ ]+\$a0, \$a1, 0x7ff +[ ]+54:[ ]+100000a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+58:[ ]+11fffca4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, 32767\(0x7fff\) +[ ]+5c:[ ]+120004a4 [ ]+addu16i.d[ ]+[ ]+\$a0, \$a1, -32767\(0x8001\) +[ ]+60:[ ]+14000004 [ ]+lu12i.w[ ]+[ ]+\$a0, 0 +[ ]+64:[ ]+14ffffe4 [ ]+lu12i.w[ ]+[ ]+\$a0, 524287\(0x7ffff\) +[ ]+68:[ ]+17000024 [ ]+lu32i.d[ ]+[ ]+\$a0, -524287\(0x80001\) +[ ]+6c:[ ]+18000004 [ ]+pcaddi[ ]+[ ]+\$a0, 0 +[ ]+70:[ ]+18ffffe4 [ ]+pcaddi[ ]+[ ]+\$a0, 524287\(0x7ffff\) +[ ]+74:[ ]+19000024 [ ]+pcaddi[ ]+[ ]+\$a0, -524287\(0x80001\) +[ ]+78:[ ]+1a000004 [ ]+pcalau12i[ ]+[ ]+\$a0, 0 +[ ]+7c:[ ]+1affffe4 [ ]+pcalau12i[ ]+[ ]+\$a0, 524287\(0x7ffff\) +[ ]+80:[ ]+1b000024 [ ]+pcalau12i[ ]+[ ]+\$a0, -524287\(0x80001\) +[ ]+84:[ ]+1c000004 [ ]+pcaddu12i[ ]+[ ]+\$a0, 0 +[ ]+88:[ ]+1cffffe4 [ ]+pcaddu12i[ ]+[ ]+\$a0, 524287\(0x7ffff\) +[ ]+8c:[ ]+1d000024 [ ]+pcaddu12i[ ]+[ ]+\$a0, -524287\(0x80001\) +[ ]+90:[ ]+1e000004 [ ]+pcaddu18i[ ]+[ ]+\$a0, 0 +[ ]+94:[ ]+1effffe4 [ ]+pcaddu18i[ ]+[ ]+\$a0, 524287\(0x7ffff\) +[ ]+98:[ ]+1f000024 [ ]+pcaddu18i[ ]+[ ]+\$a0, -524287\(0x80001\) diff --git a/gas/testsuite/gas/loongarch/imm_op.s b/gas/testsuite/gas/loongarch/imm_op.s new file mode 100644 index 00000000..7e1c5518 --- /dev/null +++ b/gas/testsuite/gas/loongarch/imm_op.s @@ -0,0 +1,39 @@ +slti $r4,$r5,0 +slti $r4,$r5,0x7ff +slti $r4,$r5,-0x7ff +sltui $r4,$r5,0 +sltui $r4,$r5,0x7ff +sltui $r4,$r5,-0x7ff +addi.w $r4,$r5,0 +addi.w $r4,$r5,0x7ff +addi.w $r4,$r5,-0x7ff +addi.d $r4,$r5,0 +addi.d $r4,$r5,0x7ff +addi.d $r4,$r5,-0x7ff +lu52i.d $r4,$r5,0 +lu52i.d $r4,$r5,0x7ff +lu52i.d $r4,$r5,-0x7ff +andi $r4,$r5,0 +andi $r4,$r5,0x7ff +ori $r4,$r5,0 +ori $r4,$r5,0x7ff +xori $r4,$r5,0 +xori $r4,$r5,0x7ff +addu16i.d $r4,$r5,0 +addu16i.d $r4,$r5,0x7fff +addu16i.d $r4,$r5,-0x7fff +lu12i.w $r4,0 +lu12i.w $r4,0x7ffff +lu32i.d $r4,-0x7ffff +pcaddi $r4,0 +pcaddi $r4,0x7ffff +pcaddi $r4,-0x7ffff +pcalau12i $r4,0 +pcalau12i $r4,0x7ffff +pcalau12i $r4,-0x7ffff +pcaddu12i $r4,0 +pcaddu12i $r4,0x7ffff +pcaddu12i $r4,-0x7ffff +pcaddu18i $r4,0 +pcaddu18i $r4,0x7ffff +pcaddu18i $r4,-0x7ffff diff --git a/gas/testsuite/gas/loongarch/jmp_op.d b/gas/testsuite/gas/loongarch/jmp_op.d new file mode 100644 index 00000000..fa939c78 --- /dev/null +++ b/gas/testsuite/gas/loongarch/jmp_op.d @@ -0,0 +1,30 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+03400000[ ]+[ ]+andi[ ]+\$zero, \$zero, 0x0 +[ ]+4:[ ]+63fffc04[ ]+[ ]+bgtz[ ]+\$a0, -4\(0x3fffc\)[ ]+# 0x0 +[ ]+8:[ ]+67fff880[ ]+[ ]+bgez[ ]+\$a0, -8\(0x3fff8\)[ ]+# 0x0 +[ ]+c:[ ]+67fff404[ ]+[ ]+blez[ ]+\$a0, -12\(0x3fff4\)[ ]+# 0x0 +[ ]+10:[ ]+43fff09f[ ]+[ ]+beqz[ ]+\$a0, -16\(0x7ffff0\)[ ]+# 0x0 +[ ]+14:[ ]+47ffec9f[ ]+[ ]+bnez[ ]+\$a0, -20\(0x7fffec\)[ ]+# 0x0 +[ ]+18:[ ]+4bffe81f[ ]+[ ]+bceqz[ ]+\$fcc0, -24\(0x7fffe8\)[ ]+# 0x0 +[ ]+1c:[ ]+4bffe51f[ ]+[ ]+bcnez[ ]+\$fcc0, -28\(0x7fffe4\)[ ]+# 0x0 +[ ]+20:[ ]+4c000080[ ]+[ ]+jirl[ ]+\$zero, \$a0, 0 +[ ]+24:[ ]+53ffdfff[ ]+[ ]+b[ ]+-36\(0xfffffdc\)[ ]+# 0x0 +[ ]+28:[ ]+57ffdbff[ ]+[ ]+bl[ ]+-40\(0xfffffd8\)[ ]+# 0x0 +[ ]+2c:[ ]+5bffd485[ ]+[ ]+beq[ ]+\$a0, \$a1, -44\(0x3ffd4\)[ ]+# 0x0 +[ ]+30:[ ]+5fffd085[ ]+[ ]+bne[ ]+\$a0, \$a1, -48\(0x3ffd0\)[ ]+# 0x0 +[ ]+34:[ ]+63ffcc85[ ]+[ ]+blt[ ]+\$a0, \$a1, -52\(0x3ffcc\)[ ]+# 0x0 +[ ]+38:[ ]+63ffc8a4[ ]+[ ]+blt[ ]+\$a1, \$a0, -56\(0x3ffc8\)[ ]+# 0x0 +[ ]+3c:[ ]+67ffc485[ ]+[ ]+bge[ ]+\$a0, \$a1, -60\(0x3ffc4\)[ ]+# 0x0 +[ ]+40:[ ]+67ffc0a4[ ]+[ ]+bge[ ]+\$a1, \$a0, -64\(0x3ffc0\)[ ]+# 0x0 +[ ]+44:[ ]+6bffbc85[ ]+[ ]+bltu[ ]+\$a0, \$a1, -68\(0x3ffbc\)[ ]+# 0x0 +[ ]+48:[ ]+6bffb8a4[ ]+[ ]+bltu[ ]+\$a1, \$a0, -72\(0x3ffb8\)[ ]+# 0x0 +[ ]+4c:[ ]+6fffb485[ ]+[ ]+bgeu[ ]+\$a0, \$a1, -76\(0x3ffb4\)[ ]+# 0x0 +[ ]+50:[ ]+6fffb0a4[ ]+[ ]+bgeu[ ]+\$a1, \$a0, -80\(0x3ffb0\)[ ]+# 0x0 diff --git a/gas/testsuite/gas/loongarch/jmp_op.s b/gas/testsuite/gas/loongarch/jmp_op.s new file mode 100644 index 00000000..1deb165a --- /dev/null +++ b/gas/testsuite/gas/loongarch/jmp_op.s @@ -0,0 +1,22 @@ +.L1: +nop +bgtz $r4,.L1 +bgez $r4,.L1 +blez $r4,.L1 +beqz $r4,.L1 +bnez $r4,.L1 +bceqz $fcc0,.L1 +bcnez $fcc0,.L1 +jr $r4 +b .L1 +bl .L1 +beq $r4,$r5,.L1 +bne $r4,$r5,.L1 +blt $r4,$r5,.L1 +bgt $r4,$r5,.L1 +bge $r4,$r5,.L1 +ble $r4,$r5,.L1 +bltu $r4,$r5,.L1 +bgtu $r4,$r5,.L1 +bgeu $r4,$r5,.L1 +bleu $r4,$r5,.L1 diff --git a/gas/testsuite/gas/loongarch/load_store_op.d b/gas/testsuite/gas/loongarch/load_store_op.d new file mode 100644 index 00000000..fc15773c --- /dev/null +++ b/gas/testsuite/gas/loongarch/load_store_op.d @@ -0,0 +1,178 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+200000a4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+4:[ ]+203ffca4 [ ]+ll.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+8:[ ]+210000a4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+c:[ ]+213ffca4 [ ]+sc.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+10:[ ]+220000a4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+14:[ ]+223ffca4 [ ]+ll.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+18:[ ]+230000a4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+1c:[ ]+233ffca4 [ ]+sc.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+20:[ ]+240000a4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+24:[ ]+243ffca4 [ ]+ldptr.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+28:[ ]+250000a4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+2c:[ ]+253ffca4 [ ]+stptr.w[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+30:[ ]+260000a4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+34:[ ]+263ffca4 [ ]+ldptr.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+38:[ ]+270000a4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+3c:[ ]+273ffca4 [ ]+stptr.d[ ]+[ ]+\$a0, \$a1, 16380\(0x3ffc\) +[ ]+40:[ ]+280000a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 0 +[ ]+44:[ ]+281ffca4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+48:[ ]+282004a4 [ ]+ld.b[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+4c:[ ]+284000a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 0 +[ ]+50:[ ]+285ffca4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+54:[ ]+286004a4 [ ]+ld.h[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+58:[ ]+288000a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+5c:[ ]+289ffca4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+60:[ ]+28a004a4 [ ]+ld.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+64:[ ]+28c000a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+68:[ ]+28dffca4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+6c:[ ]+28e004a4 [ ]+ld.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+70:[ ]+290000a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 0 +[ ]+74:[ ]+291ffca4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+78:[ ]+292004a4 [ ]+st.b[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+7c:[ ]+294000a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 0 +[ ]+80:[ ]+295ffca4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+84:[ ]+296004a4 [ ]+st.h[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+88:[ ]+298000a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 0 +[ ]+8c:[ ]+299ffca4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+90:[ ]+29a004a4 [ ]+st.w[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+94:[ ]+29c000a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 0 +[ ]+98:[ ]+29dffca4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+9c:[ ]+29e004a4 [ ]+st.d[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+a0:[ ]+2a0000a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 0 +[ ]+a4:[ ]+2a1ffca4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+a8:[ ]+2a2004a4 [ ]+ld.bu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+ac:[ ]+2a4000a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 0 +[ ]+b0:[ ]+2a5ffca4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+b4:[ ]+2a6004a4 [ ]+ld.hu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+b8:[ ]+2a8000a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 0 +[ ]+bc:[ ]+2a9ffca4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, 2047\(0x7ff\) +[ ]+c0:[ ]+2aa004a4 [ ]+ld.wu[ ]+[ ]+\$a0, \$a1, -2047\(0x801\) +[ ]+c4:[ ]+2ac000a0 [ ]+preld[ ]+[ ]+0x0, \$a1, 0 +[ ]+c8:[ ]+2adffcbf [ ]+preld[ ]+[ ]+0x1f, \$a1, 2047\(0x7ff\) +[ ]+cc:[ ]+2ae004bf [ ]+preld[ ]+[ ]+0x1f, \$a1, -2047\(0x801\) +[ ]+d0:[ ]+2b0000a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 0 +[ ]+d4:[ ]+2b1ffca0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) +[ ]+d8:[ ]+2b2004a0 [ ]+fld.s[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) +[ ]+dc:[ ]+2b4000a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 0 +[ ]+e0:[ ]+2b5ffca0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) +[ ]+e4:[ ]+2b6004a0 [ ]+fst.s[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) +[ ]+e8:[ ]+2b8000a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 0 +[ ]+ec:[ ]+2b9ffca0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) +[ ]+f0:[ ]+2ba004a0 [ ]+fld.d[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) +[ ]+f4:[ ]+2bc000a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 0 +[ ]+f8:[ ]+2bdffca0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, 2047\(0x7ff\) +[ ]+fc:[ ]+2be004a0 [ ]+fst.d[ ]+[ ]+\$fa0, \$a1, -2047\(0x801\) + 100:[ ]+380018a4 [ ]+ldx.b[ ]+[ ]+\$a0, \$a1, \$a2 + 104:[ ]+380418a4 [ ]+ldx.h[ ]+[ ]+\$a0, \$a1, \$a2 + 108:[ ]+380818a4 [ ]+ldx.w[ ]+[ ]+\$a0, \$a1, \$a2 + 10c:[ ]+380c18a4 [ ]+ldx.d[ ]+[ ]+\$a0, \$a1, \$a2 + 110:[ ]+381018a4 [ ]+stx.b[ ]+[ ]+\$a0, \$a1, \$a2 + 114:[ ]+381418a4 [ ]+stx.h[ ]+[ ]+\$a0, \$a1, \$a2 + 118:[ ]+381818a4 [ ]+stx.w[ ]+[ ]+\$a0, \$a1, \$a2 + 11c:[ ]+381c18a4 [ ]+stx.d[ ]+[ ]+\$a0, \$a1, \$a2 + 120:[ ]+382018a4 [ ]+ldx.bu[ ]+[ ]+\$a0, \$a1, \$a2 + 124:[ ]+382418a4 [ ]+ldx.hu[ ]+[ ]+\$a0, \$a1, \$a2 + 128:[ ]+382818a4 [ ]+ldx.wu[ ]+[ ]+\$a0, \$a1, \$a2 + 12c:[ ]+382c18a0 [ ]+preldx[ ]+[ ]+0x0, \$a1, \$a2 + 130:[ ]+382c18bf [ ]+preldx[ ]+[ ]+0x1f, \$a1, \$a2 + 134:[ ]+38720000 [ ]+dbar[ ]+[ ]+0x0 + 138:[ ]+38727fff [ ]+dbar[ ]+[ ]+0x7fff + 13c:[ ]+38728000 [ ]+ibar[ ]+[ ]+0x0 + 140:[ ]+3872ffff [ ]+ibar[ ]+[ ]+0x7fff + 144:[ ]+386014c4 [ ]+amswap.w[ ]+[ ]+\$a0, \$a1, \$a2 + 148:[ ]+386018a4 [ ]+amswap.w[ ]+[ ]+\$a0, \$a2, \$a1 + 14c:[ ]+386094c4 [ ]+amswap.d[ ]+[ ]+\$a0, \$a1, \$a2 + 150:[ ]+386098a4 [ ]+amswap.d[ ]+[ ]+\$a0, \$a2, \$a1 + 154:[ ]+386114c4 [ ]+amadd.w[ ]+[ ]+\$a0, \$a1, \$a2 + 158:[ ]+386118a4 [ ]+amadd.w[ ]+[ ]+\$a0, \$a2, \$a1 + 15c:[ ]+386194c4 [ ]+amadd.d[ ]+[ ]+\$a0, \$a1, \$a2 + 160:[ ]+386198a4 [ ]+amadd.d[ ]+[ ]+\$a0, \$a2, \$a1 + 164:[ ]+386214c4 [ ]+amand.w[ ]+[ ]+\$a0, \$a1, \$a2 + 168:[ ]+386218a4 [ ]+amand.w[ ]+[ ]+\$a0, \$a2, \$a1 + 16c:[ ]+386294c4 [ ]+amand.d[ ]+[ ]+\$a0, \$a1, \$a2 + 170:[ ]+386298a4 [ ]+amand.d[ ]+[ ]+\$a0, \$a2, \$a1 + 174:[ ]+386314c4 [ ]+amor.w[ ]+[ ]+\$a0, \$a1, \$a2 + 178:[ ]+386318a4 [ ]+amor.w[ ]+[ ]+\$a0, \$a2, \$a1 + 17c:[ ]+386394c4 [ ]+amor.d[ ]+[ ]+\$a0, \$a1, \$a2 + 180:[ ]+386398a4 [ ]+amor.d[ ]+[ ]+\$a0, \$a2, \$a1 + 184:[ ]+386414c4 [ ]+amxor.w[ ]+[ ]+\$a0, \$a1, \$a2 + 188:[ ]+386418a4 [ ]+amxor.w[ ]+[ ]+\$a0, \$a2, \$a1 + 18c:[ ]+386494c4 [ ]+amxor.d[ ]+[ ]+\$a0, \$a1, \$a2 + 190:[ ]+386498a4 [ ]+amxor.d[ ]+[ ]+\$a0, \$a2, \$a1 + 194:[ ]+386514c4 [ ]+ammax.w[ ]+[ ]+\$a0, \$a1, \$a2 + 198:[ ]+386518a4 [ ]+ammax.w[ ]+[ ]+\$a0, \$a2, \$a1 + 19c:[ ]+386594c4 [ ]+ammax.d[ ]+[ ]+\$a0, \$a1, \$a2 + 1a0:[ ]+386598a4 [ ]+ammax.d[ ]+[ ]+\$a0, \$a2, \$a1 + 1a4:[ ]+386614c4 [ ]+ammin.w[ ]+[ ]+\$a0, \$a1, \$a2 + 1a8:[ ]+386618a4 [ ]+ammin.w[ ]+[ ]+\$a0, \$a2, \$a1 + 1ac:[ ]+386694c4 [ ]+ammin.d[ ]+[ ]+\$a0, \$a1, \$a2 + 1b0:[ ]+386698a4 [ ]+ammin.d[ ]+[ ]+\$a0, \$a2, \$a1 + 1b4:[ ]+386714c4 [ ]+ammax.wu[ ]+[ ]+\$a0, \$a1, \$a2 + 1b8:[ ]+386718a4 [ ]+ammax.wu[ ]+[ ]+\$a0, \$a2, \$a1 + 1bc:[ ]+386794c4 [ ]+ammax.du[ ]+[ ]+\$a0, \$a1, \$a2 + 1c0:[ ]+386798a4 [ ]+ammax.du[ ]+[ ]+\$a0, \$a2, \$a1 + 1c4:[ ]+386814c4 [ ]+ammin.wu[ ]+[ ]+\$a0, \$a1, \$a2 + 1c8:[ ]+386818a4 [ ]+ammin.wu[ ]+[ ]+\$a0, \$a2, \$a1 + 1cc:[ ]+386894c4 [ ]+ammin.du[ ]+[ ]+\$a0, \$a1, \$a2 + 1d0:[ ]+386898a4 [ ]+ammin.du[ ]+[ ]+\$a0, \$a2, \$a1 + 1d4:[ ]+386914c4 [ ]+amswap_db.w [ ]+\$a0, \$a1, \$a2 + 1d8:[ ]+386918a4 [ ]+amswap_db.w [ ]+\$a0, \$a2, \$a1 + 1dc:[ ]+386994c4 [ ]+amswap_db.d [ ]+\$a0, \$a1, \$a2 + 1e0:[ ]+386998a4 [ ]+amswap_db.d [ ]+\$a0, \$a2, \$a1 + 1e4:[ ]+386a14c4 [ ]+amadd_db.w[ ]+[ ]+\$a0, \$a1, \$a2 + 1e8:[ ]+386a18a4 [ ]+amadd_db.w[ ]+[ ]+\$a0, \$a2, \$a1 + 1ec:[ ]+386a94c4 [ ]+amadd_db.d[ ]+[ ]+\$a0, \$a1, \$a2 + 1f0:[ ]+386a98a4 [ ]+amadd_db.d[ ]+[ ]+\$a0, \$a2, \$a1 + 1f4:[ ]+386b14c4 [ ]+amand_db.w[ ]+[ ]+\$a0, \$a1, \$a2 + 1f8:[ ]+386b18a4 [ ]+amand_db.w[ ]+[ ]+\$a0, \$a2, \$a1 + 1fc:[ ]+386b94c4 [ ]+amand_db.d[ ]+[ ]+\$a0, \$a1, \$a2 + 200:[ ]+386b98a4 [ ]+amand_db.d[ ]+[ ]+\$a0, \$a2, \$a1 + 204:[ ]+386c14c4 [ ]+amor_db.w[ ]+[ ]+\$a0, \$a1, \$a2 + 208:[ ]+386c18a4 [ ]+amor_db.w[ ]+[ ]+\$a0, \$a2, \$a1 + 20c:[ ]+386c94c4 [ ]+amor_db.d[ ]+[ ]+\$a0, \$a1, \$a2 + 210:[ ]+386c98a4 [ ]+amor_db.d[ ]+[ ]+\$a0, \$a2, \$a1 + 214:[ ]+386d14c4 [ ]+amxor_db.w[ ]+[ ]+\$a0, \$a1, \$a2 + 218:[ ]+386d18a4 [ ]+amxor_db.w[ ]+[ ]+\$a0, \$a2, \$a1 + 21c:[ ]+386d94c4 [ ]+amxor_db.d[ ]+[ ]+\$a0, \$a1, \$a2 + 220:[ ]+386d98a4 [ ]+amxor_db.d[ ]+[ ]+\$a0, \$a2, \$a1 + 224:[ ]+386e14c4 [ ]+ammax_db.w[ ]+[ ]+\$a0, \$a1, \$a2 + 228:[ ]+386e18a4 [ ]+ammax_db.w[ ]+[ ]+\$a0, \$a2, \$a1 + 22c:[ ]+386e94c4 [ ]+ammax_db.d[ ]+[ ]+\$a0, \$a1, \$a2 + 230:[ ]+386e98a4 [ ]+ammax_db.d[ ]+[ ]+\$a0, \$a2, \$a1 + 234:[ ]+386f14c4 [ ]+ammin_db.w[ ]+[ ]+\$a0, \$a1, \$a2 + 238:[ ]+386f18a4 [ ]+ammin_db.w[ ]+[ ]+\$a0, \$a2, \$a1 + 23c:[ ]+386f94c4 [ ]+ammin_db.d[ ]+[ ]+\$a0, \$a1, \$a2 + 240:[ ]+386f98a4 [ ]+ammin_db.d[ ]+[ ]+\$a0, \$a2, \$a1 + 244:[ ]+387014c4 [ ]+ammax_db.wu [ ]+\$a0, \$a1, \$a2 + 248:[ ]+387018a4 [ ]+ammax_db.wu [ ]+\$a0, \$a2, \$a1 + 24c:[ ]+387094c4 [ ]+ammax_db.du [ ]+\$a0, \$a1, \$a2 + 250:[ ]+387098a4 [ ]+ammax_db.du [ ]+\$a0, \$a2, \$a1 + 254:[ ]+387114c4 [ ]+ammin_db.wu [ ]+\$a0, \$a1, \$a2 + 258:[ ]+387118a4 [ ]+ammin_db.wu [ ]+\$a0, \$a2, \$a1 + 25c:[ ]+387194c4 [ ]+ammin_db.du [ ]+\$a0, \$a1, \$a2 + 260:[ ]+387198a4 [ ]+ammin_db.du [ ]+\$a0, \$a2, \$a1 + 264:[ ]+387818a4 [ ]+ldgt.b[ ]+[ ]+\$a0, \$a1, \$a2 + 268:[ ]+387898a4 [ ]+ldgt.h[ ]+[ ]+\$a0, \$a1, \$a2 + 26c:[ ]+387918a4 [ ]+ldgt.w[ ]+[ ]+\$a0, \$a1, \$a2 + 270:[ ]+387998a4 [ ]+ldgt.d[ ]+[ ]+\$a0, \$a1, \$a2 + 274:[ ]+387a18a4 [ ]+ldle.b[ ]+[ ]+\$a0, \$a1, \$a2 + 278:[ ]+387a98a4 [ ]+ldle.h[ ]+[ ]+\$a0, \$a1, \$a2 + 27c:[ ]+387b18a4 [ ]+ldle.w[ ]+[ ]+\$a0, \$a1, \$a2 + 280:[ ]+387b98a4 [ ]+ldle.d[ ]+[ ]+\$a0, \$a1, \$a2 + 284:[ ]+387c18a4 [ ]+stgt.b[ ]+[ ]+\$a0, \$a1, \$a2 + 288:[ ]+387c98a4 [ ]+stgt.h[ ]+[ ]+\$a0, \$a1, \$a2 + 28c:[ ]+387d18a4 [ ]+stgt.w[ ]+[ ]+\$a0, \$a1, \$a2 + 290:[ ]+387d98a4 [ ]+stgt.d[ ]+[ ]+\$a0, \$a1, \$a2 + 294:[ ]+387e18a4 [ ]+stle.b[ ]+[ ]+\$a0, \$a1, \$a2 + 298:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2 + 29c:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2 + 2a0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2 diff --git a/gas/testsuite/gas/loongarch/load_store_op.s b/gas/testsuite/gas/loongarch/load_store_op.s new file mode 100644 index 00000000..efbd124a --- /dev/null +++ b/gas/testsuite/gas/loongarch/load_store_op.s @@ -0,0 +1,169 @@ +ll.w $r4,$r5,0 +ll.w $r4,$r5,0x3ffc +sc.w $r4,$r5,0 +sc.w $r4,$r5,0x3ffc +ll.d $r4,$r5,0 +ll.d $r4,$r5,0x3ffc +sc.d $r4,$r5,0 +sc.d $r4,$r5,0x3ffc +ldptr.w $r4,$r5,0 +ldptr.w $r4,$r5,0x3ffc +stptr.w $r4,$r5,0 +stptr.w $r4,$r5,0x3ffc +ldptr.d $r4,$r5,0 +ldptr.d $r4,$r5,0x3ffc +stptr.d $r4,$r5,0 +stptr.d $r4,$r5,0x3ffc +ld.b $r4,$r5,0 +ld.b $r4,$r5,0x7ff +ld.b $r4,$r5,-0x7ff +ld.h $r4,$r5,0 +ld.h $r4,$r5,0x7ff +ld.h $r4,$r5,-0x7ff +ld.w $r4,$r5,0 +ld.w $r4,$r5,0x7ff +ld.w $r4,$r5,-0x7ff +ld.d $r4,$r5,0 +ld.d $r4,$r5,0x7ff +ld.d $r4,$r5,-0x7ff +st.b $r4,$r5,0 +st.b $r4,$r5,0x7ff +st.b $r4,$r5,-0x7ff +st.h $r4,$r5,0 +st.h $r4,$r5,0x7ff +st.h $r4,$r5,-0x7ff +st.w $r4,$r5,0 +st.w $r4,$r5,0x7ff +st.w $r4,$r5,-0x7ff +st.d $r4,$r5,0 +st.d $r4,$r5,0x7ff +st.d $r4,$r5,-0x7ff +ld.bu $r4,$r5,0 +ld.bu $r4,$r5,0x7ff +ld.bu $r4,$r5,-0x7ff +ld.hu $r4,$r5,0 +ld.hu $r4,$r5,0x7ff +ld.hu $r4,$r5,-0x7ff +ld.wu $r4,$r5,0 +ld.wu $r4,$r5,0x7ff +ld.wu $r4,$r5,-0x7ff +preld 0,$r5,0 +preld 31,$r5,0x7ff +preld 31,$r5,-0x7ff +fld.s $f0,$r5,0 +fld.s $f0,$r5,0x7ff +fld.s $f0,$r5,-0x7ff +fst.s $f0,$r5,0 +fst.s $f0,$r5,0x7ff +fst.s $f0,$r5,-0x7ff +fld.d $f0,$r5,0 +fld.d $f0,$r5,0x7ff +fld.d $f0,$r5,-0x7ff +fst.d $f0,$r5,0 +fst.d $f0,$r5,0x7ff +fst.d $f0,$r5,-0x7ff +ldx.b $r4,$r5,$r6 +ldx.h $r4,$r5,$r6 +ldx.w $r4,$r5,$r6 +ldx.d $r4,$r5,$r6 +stx.b $r4,$r5,$r6 +stx.h $r4,$r5,$r6 +stx.w $r4,$r5,$r6 +stx.d $r4,$r5,$r6 +ldx.bu $r4,$r5,$r6 +ldx.hu $r4,$r5,$r6 +ldx.wu $r4,$r5,$r6 +preldx 0,$r5,$r6 +preldx 31,$r5,$r6 +dbar 0 +dbar 0x7fff +ibar 0 +ibar 0x7fff +amswap.w $r4,$r5,$r6,0 +amswap.w $r4,$r6,$r5 +amswap.d $r4,$r5,$r6,0 +amswap.d $r4,$r6,$r5 +amadd.w $r4,$r5,$r6,0 +amadd.w $r4,$r6,$r5 +amadd.d $r4,$r5,$r6,0 +amadd.d $r4,$r6,$r5 +amand.w $r4,$r5,$r6,0 +amand.w $r4,$r6,$r5 +amand.d $r4,$r5,$r6,0 +amand.d $r4,$r6,$r5 +amor.w $r4,$r5,$r6,0 +amor.w $r4,$r6,$r5 +amor.d $r4,$r5,$r6,0 +amor.d $r4,$r6,$r5 +amxor.w $r4,$r5,$r6,0 +amxor.w $r4,$r6,$r5 +amxor.d $r4,$r5,$r6,0 +amxor.d $r4,$r6,$r5 +ammax.w $r4,$r5,$r6,0 +ammax.w $r4,$r6,$r5 +ammax.d $r4,$r5,$r6,0 +ammax.d $r4,$r6,$r5 +ammin.w $r4,$r5,$r6,0 +ammin.w $r4,$r6,$r5 +ammin.d $r4,$r5,$r6,0 +ammin.d $r4,$r6,$r5 +ammax.wu $r4,$r5,$r6,0 +ammax.wu $r4,$r6,$r5 +ammax.du $r4,$r5,$r6,0 +ammax.du $r4,$r6,$r5 +ammin.wu $r4,$r5,$r6,0 +ammin.wu $r4,$r6,$r5 +ammin.du $r4,$r5,$r6,0 +ammin.du $r4,$r6,$r5 +amswap_db.w $r4,$r5,$r6,0 +amswap_db.w $r4,$r6,$r5 +amswap_db.d $r4,$r5,$r6,0 +amswap_db.d $r4,$r6,$r5 +amadd_db.w $r4,$r5,$r6,0 +amadd_db.w $r4,$r6,$r5 +amadd_db.d $r4,$r5,$r6,0 +amadd_db.d $r4,$r6,$r5 +amand_db.w $r4,$r5,$r6,0 +amand_db.w $r4,$r6,$r5 +amand_db.d $r4,$r5,$r6,0 +amand_db.d $r4,$r6,$r5 +amor_db.w $r4,$r5,$r6,0 +amor_db.w $r4,$r6,$r5 +amor_db.d $r4,$r5,$r6,0 +amor_db.d $r4,$r6,$r5 +amxor_db.w $r4,$r5,$r6,0 +amxor_db.w $r4,$r6,$r5 +amxor_db.d $r4,$r5,$r6,0 +amxor_db.d $r4,$r6,$r5 +ammax_db.w $r4,$r5,$r6,0 +ammax_db.w $r4,$r6,$r5 +ammax_db.d $r4,$r5,$r6,0 +ammax_db.d $r4,$r6,$r5 +ammin_db.w $r4,$r5,$r6,0 +ammin_db.w $r4,$r6,$r5 +ammin_db.d $r4,$r5,$r6,0 +ammin_db.d $r4,$r6,$r5 +ammax_db.wu $r4,$r5,$r6,0 +ammax_db.wu $r4,$r6,$r5 +ammax_db.du $r4,$r5,$r6,0 +ammax_db.du $r4,$r6,$r5 +ammin_db.wu $r4,$r5,$r6,0 +ammin_db.wu $r4,$r6,$r5 +ammin_db.du $r4,$r5,$r6,0 +ammin_db.du $r4,$r6,$r5 +ldgt.b $r4,$r5,$r6 +ldgt.h $r4,$r5,$r6 +ldgt.w $r4,$r5,$r6 +ldgt.d $r4,$r5,$r6 +ldle.b $r4,$r5,$r6 +ldle.h $r4,$r5,$r6 +ldle.w $r4,$r5,$r6 +ldle.d $r4,$r5,$r6 +stgt.b $r4,$r5,$r6 +stgt.h $r4,$r5,$r6 +stgt.w $r4,$r5,$r6 +stgt.d $r4,$r5,$r6 +stle.b $r4,$r5,$r6 +stle.h $r4,$r5,$r6 +stle.w $r4,$r5,$r6 +stle.d $r4,$r5,$r6 diff --git a/gas/testsuite/gas/loongarch/loongarch.exp b/gas/testsuite/gas/loongarch/loongarch.exp new file mode 100644 index 00000000..b8ee4b25 --- /dev/null +++ b/gas/testsuite/gas/loongarch/loongarch.exp @@ -0,0 +1,24 @@ +# Expect script for LoongArch assembler tests. +# Copyright (C) 2021-2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + +if [istarget loongarch*-*-*] { + run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]] + gas_test_old bfd_reloc_8.s "" "bfd_reloc_8" +} diff --git a/gas/testsuite/gas/loongarch/macro_op.d b/gas/testsuite/gas/loongarch/macro_op.d new file mode 100644 index 00000000..d264c4f2 --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op.d @@ -0,0 +1,59 @@ +#as: +#objdump: -dr +#skip: loongarch32-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 +[ ]+14:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 +[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 +[ ]+1c:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 +[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 +[ ]+24:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* +[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.L1 +[ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.L1 +[ ]+30:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+30:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 +[ ]+34:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+34:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 +[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+38:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 +[ ]+3c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+40:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+40:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 +[ ]+44:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+44:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 +[ ]+48:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+48:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+4c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+4c:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+54:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+54:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+5c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+60:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+60:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+64:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+64:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 diff --git a/gas/testsuite/gas/loongarch/macro_op.s b/gas/testsuite/gas/loongarch/macro_op.s new file mode 100644 index 00000000..0c333141 --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op.s @@ -0,0 +1,15 @@ +li.w $r4, 0 +li.w $r4, 0xffffffff +li.d $r4, 0 +li.d $r4, 0xffffffffffffffff +la $r4, .L1 +la.global $r4, .L1 +la.local $r4, .L1 +la.abs $r4, .L1 +la.pcrel $r4, .L1 +la.got $r4, .L1 + +la.tls.le $r4, TLS1 +la.tls.ie $r4, TLS1 +la.tls.ld $r4, TLS1 +la.tls.gd $r4, TLS1 diff --git a/gas/testsuite/gas/loongarch/macro_op_32.d b/gas/testsuite/gas/loongarch/macro_op_32.d new file mode 100644 index 00000000..145d852b --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op_32.d @@ -0,0 +1,55 @@ +#as: +#objdump: -dr +#skip: loongarch64-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+14:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+1c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+24:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* +[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.text +[ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.text +[ ]+30:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+34:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+3c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+40:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+40:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+44:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+44:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+48:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+48:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+4c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+4c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+54:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+5c:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 diff --git a/gas/testsuite/gas/loongarch/macro_op_32.s b/gas/testsuite/gas/loongarch/macro_op_32.s new file mode 100644 index 00000000..7f19565e --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op_32.s @@ -0,0 +1,16 @@ +.L1: + li.w $r4, 0 + li.w $r4, 0xffffffff + li.w $r4, 0 + li.w $r4, 0xffffffff + la $r4, .L1 + la.global $r4, .L1 + la.local $r4, .L1 + la.abs $r4, .L1 + la.pcrel $r4, .L1 + la.got $r4, .L1 + + la.tls.le $r4, TLS1 + la.tls.ie $r4, TLS1 + la.tls.ld $r4, TLS1 + la.tls.gd $r4, TLS1 diff --git a/gas/testsuite/gas/loongarch/macro_op_large_abs.d b/gas/testsuite/gas/loongarch/macro_op_large_abs.d new file mode 100644 index 00000000..c3214a85 --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op_large_abs.d @@ -0,0 +1,77 @@ +#as: +#objdump: -dr +#skip: loongarch32-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+10:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+14:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+18:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+18:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+1c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+1c:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+20:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+20:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+24:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+28:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+2c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+2c:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+30:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+30:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+34:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+34:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+38:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+50:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+54:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+54:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+5c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 +[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+64:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 +[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+6c:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+70:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+70:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+74:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+74:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 +[ ]+78:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+78:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 +[ ]+7c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+80:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+80:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+84:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+84:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+88:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+88:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 +[ ]+8c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+8c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 +[ ]+90:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 diff --git a/gas/testsuite/gas/loongarch/macro_op_large_abs.s b/gas/testsuite/gas/loongarch/macro_op_large_abs.s new file mode 100644 index 00000000..fd76391d --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op_large_abs.s @@ -0,0 +1,9 @@ +.L1: +la.local $r4, $r5, .L1 +la.global $r4, $r5, .L1 +la.pcrel $r4, $r5, .L1 +la.got $r4, $r5, .L1 +la.tls.le $r4, TLS1 +la.tls.ie $r4, $r5, TLS1 +la.tls.ld $r4, $r5, TLS1 +la.tls.gd $r4, $r5, TLS1 diff --git a/gas/testsuite/gas/loongarch/macro_op_large_pc.d b/gas/testsuite/gas/loongarch/macro_op_large_pc.d new file mode 100644 index 00000000..c3214a85 --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op_large_pc.d @@ -0,0 +1,77 @@ +#as: +#objdump: -dr +#skip: loongarch32-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+8:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+10:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+14:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+14:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+18:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+18:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+1c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+1c:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+20:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+20:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+24:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+28:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+28:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+2c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+2c:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+30:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+30:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+34:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+34:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+38:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+50:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+54:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+54:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+5c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+60:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 +[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+64:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 +[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+6c:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+70:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+70:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+74:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+74:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 +[ ]+78:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+78:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 +[ ]+7c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+80:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+80:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+84:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+84:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+88:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+88:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 +[ ]+8c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+8c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 +[ ]+90:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 diff --git a/gas/testsuite/gas/loongarch/macro_op_large_pc.s b/gas/testsuite/gas/loongarch/macro_op_large_pc.s new file mode 100644 index 00000000..fd76391d --- /dev/null +++ b/gas/testsuite/gas/loongarch/macro_op_large_pc.s @@ -0,0 +1,9 @@ +.L1: +la.local $r4, $r5, .L1 +la.global $r4, $r5, .L1 +la.pcrel $r4, $r5, .L1 +la.got $r4, $r5, .L1 +la.tls.le $r4, TLS1 +la.tls.ie $r4, $r5, TLS1 +la.tls.ld $r4, $r5, TLS1 +la.tls.gd $r4, $r5, TLS1 diff --git a/gas/testsuite/gas/loongarch/nop.d b/gas/testsuite/gas/loongarch/nop.d new file mode 100644 index 00000000..4cdcc5ce --- /dev/null +++ b/gas/testsuite/gas/loongarch/nop.d @@ -0,0 +1,10 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 : +[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero, \$zero, 0x0 diff --git a/gas/testsuite/gas/loongarch/nop.s b/gas/testsuite/gas/loongarch/nop.s new file mode 100644 index 00000000..99456883 --- /dev/null +++ b/gas/testsuite/gas/loongarch/nop.s @@ -0,0 +1,2 @@ +target: + nop diff --git a/gas/testsuite/gas/loongarch/privilege_op.d b/gas/testsuite/gas/loongarch/privilege_op.d new file mode 100644 index 00000000..12d4790a --- /dev/null +++ b/gas/testsuite/gas/loongarch/privilege_op.d @@ -0,0 +1,44 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+04000004 [ ]+csrrd[ ]+[ ]+\$a0, 0x0 +[ ]+4:[ ]+04fffc04 [ ]+csrrd[ ]+[ ]+\$a0, 0x3fff +[ ]+8:[ ]+04000024 [ ]+csrwr[ ]+[ ]+\$a0, 0x0 +[ ]+c:[ ]+04fffc24 [ ]+csrwr[ ]+[ ]+\$a0, 0x3fff +[ ]+10:[ ]+040000a4 [ ]+csrxchg[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+14:[ ]+04fffca4 [ ]+csrxchg[ ]+[ ]+\$a0, \$a1, 0x3fff +[ ]+18:[ ]+060000a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 0 +[ ]+1c:[ ]+060000bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 0 +[ ]+20:[ ]+061ffca0 [ ]+cacop[ ]+[ ]+0x0, \$a1, 2047\(0x7ff\) +[ ]+24:[ ]+061ffcbf [ ]+cacop[ ]+[ ]+0x1f, \$a1, 2047\(0x7ff\) +[ ]+28:[ ]+062004a0 [ ]+cacop[ ]+[ ]+0x0, \$a1, -2047\(0x801\) +[ ]+2c:[ ]+062004bf [ ]+cacop[ ]+[ ]+0x1f, \$a1, -2047\(0x801\) +[ ]+30:[ ]+064000a4 [ ]+lddir[ ]+[ ]+\$a0, \$a1, 0x0 +[ ]+34:[ ]+0643fca4 [ ]+lddir[ ]+[ ]+\$a0, \$a1, 0xff +[ ]+38:[ ]+064400a0 [ ]+ldpte[ ]+[ ]+\$a1, 0x0 +[ ]+3c:[ ]+0647fca0 [ ]+ldpte[ ]+[ ]+\$a1, 0xff +[ ]+40:[ ]+064800a4 [ ]+iocsrrd.b[ ]+[ ]+\$a0, \$a1 +[ ]+44:[ ]+064804a4 [ ]+iocsrrd.h[ ]+[ ]+\$a0, \$a1 +[ ]+48:[ ]+064808a4 [ ]+iocsrrd.w[ ]+[ ]+\$a0, \$a1 +[ ]+4c:[ ]+06480ca4 [ ]+iocsrrd.d[ ]+[ ]+\$a0, \$a1 +[ ]+50:[ ]+064810a4 [ ]+iocsrwr.b[ ]+[ ]+\$a0, \$a1 +[ ]+54:[ ]+064814a4 [ ]+iocsrwr.h[ ]+[ ]+\$a0, \$a1 +[ ]+58:[ ]+064818a4 [ ]+iocsrwr.w[ ]+[ ]+\$a0, \$a1 +[ ]+5c:[ ]+06481ca4 [ ]+iocsrwr.d[ ]+[ ]+\$a0, \$a1 +[ ]+60:[ ]+06482000 [ ]+tlbclr[ ]+ +[ ]+64:[ ]+06482400 [ ]+tlbflush[ ]+ +[ ]+68:[ ]+06482800 [ ]+tlbsrch[ ]+ +[ ]+6c:[ ]+06482c00 [ ]+tlbrd[ ]+ +[ ]+70:[ ]+06483000 [ ]+tlbwr[ ]+ +[ ]+74:[ ]+06483400 [ ]+tlbfill[ ]+ +[ ]+78:[ ]+06483800 [ ]+ertn[ ]+ +[ ]+7c:[ ]+06488000 [ ]+idle[ ]+[ ]+0x0 +[ ]+80:[ ]+0648ffff [ ]+idle[ ]+[ ]+0x7fff +[ ]+84:[ ]+064998a0 [ ]+invtlb[ ]+[ ]+0x0, \$a1, \$a2 +[ ]+88:[ ]+064998bf [ ]+invtlb[ ]+[ ]+0x1f, \$a1, \$a2 diff --git a/gas/testsuite/gas/loongarch/privilege_op.s b/gas/testsuite/gas/loongarch/privilege_op.s new file mode 100644 index 00000000..cdc35732 --- /dev/null +++ b/gas/testsuite/gas/loongarch/privilege_op.s @@ -0,0 +1,35 @@ +csrrd $r4,0 +csrrd $r4,0x3fff +csrwr $r4,0 +csrwr $r4,0x3fff +csrxchg $r4,$r5,0 +csrxchg $r4,$r5,0x3fff +cacop 0,$r5,0 +cacop 0x1f,$r5,0 +cacop 0,$r5,0x7ff +cacop 0x1f,$r5,0x7ff +cacop 0,$r5,-0x7ff +cacop 0x1f,$r5,-0x7ff +lddir $r4,$r5,0 +lddir $r4,$r5,0xff +ldpte $r5,0 +ldpte $r5,0xff +iocsrrd.b $r4,$r5 +iocsrrd.h $r4,$r5 +iocsrrd.w $r4,$r5 +iocsrrd.d $r4,$r5 +iocsrwr.b $r4,$r5 +iocsrwr.h $r4,$r5 +iocsrwr.w $r4,$r5 +iocsrwr.d $r4,$r5 +tlbclr +tlbflush +tlbsrch +tlbrd +tlbwr +tlbfill +ertn +idle 0 +idle 0x7fff +invtlb 0,$r5,$r6 +invtlb 0x1f,$r5,$r6 diff --git a/gas/testsuite/gas/loongarch/reloc.d b/gas/testsuite/gas/loongarch/reloc.d new file mode 100644 index 00000000..6f5f110b --- /dev/null +++ b/gas/testsuite/gas/loongarch/reloc.d @@ -0,0 +1,167 @@ +#as: +#objdump: -dr +#skip: loongarch32-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero,[ ]+\$zero,[ ]+0x0 +[ ]+4:[ ]+58000085[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x4 +[ ]+4:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+8:[ ]+5c000085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x8 +[ ]+8:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+c:[ ]+60000085[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xc +[ ]+c:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+10:[ ]+64000085[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x10 +[ ]+10:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+14:[ ]+68000085[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x14 +[ ]+14:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+18:[ ]+6c000085[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0x18 +[ ]+18:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+1c:[ ]+4c0000a4[ ]+jirl[ ]+\$a0,[ ]+\$a1,[ ]+0 +[ ]+1c:[ ]+R_LARCH_B16[ ]+.L1 +[ ]+20:[ ]+40000080[ ]+beqz[ ]+\$a0,[ ]+0[ ]+#[ ]+0x20 +[ ]+20:[ ]+R_LARCH_B21[ ]+.L1 +[ ]+24:[ ]+44000080[ ]+bnez[ ]+\$a0,[ ]+0[ ]+#[ ]+0x24 +[ ]+24:[ ]+R_LARCH_B21[ ]+.L1 +[ ]+28:[ ]+50000000[ ]+b[ ]+0[ ]+#[ ]+0x28 +[ ]+28:[ ]+R_LARCH_B26[ ]+.L1 +[ ]+2c:[ ]+54000000[ ]+bl[ ]+0[ ]+#[ ]+0x2c +[ ]+2c:[ ]+R_LARCH_B26[ ]+.L1 +[ ]+30:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+30:[ ]+R_LARCH_ABS_HI20[ ]+.L1 +[ ]+34:[ ]+038000a4[ ]+ori[ ]+\$a0,[ ]+\$a1,[ ]+0x0 +[ ]+34:[ ]+R_LARCH_ABS_LO12[ ]+.L1 +[ ]+38:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+38:[ ]+R_LARCH_ABS64_LO20[ ]+.L1 +[ ]+3c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_ABS64_HI12[ ]+.L1 +[ ]+40:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+40:[ ]+R_LARCH_PCALA_HI20[ ]+.L1 +[ ]+44:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+44:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1 +[ ]+48:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+48:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1 +[ ]+4c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+4c:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLSL1 +[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLSL1 +[ ]+54:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+54:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLSL1 +[ ]+58:[ ]+02800085[ ]+addi.w[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+5c:[ ]+02c00085[ ]+addi.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+5c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+60:[ ]+28000085[ ]+ld.b[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+60:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+64:[ ]+28400085[ ]+ld.h[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+64:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+68:[ ]+28800085[ ]+ld.w[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+68:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+6c:[ ]+28c00085[ ]+ld.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+6c:[ ]+R_LARCH_PCALA_LO12[ ]+.L1 +[ ]+70:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+70:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 +[ ]+74:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+74:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1 +[ ]+78:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+78:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1 +[ ]+7c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+7c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1 +[ ]+80:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+80:[ ]+R_LARCH_GOT_HI20[ ]+.L1 +[ ]+84:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+84:[ ]+R_LARCH_GOT_LO12[ ]+.L1 +[ ]+88:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+88:[ ]+R_LARCH_GOT64_LO20[ ]+.L1 +[ ]+8c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+8c:[ ]+R_LARCH_GOT64_HI12[ ]+.L1 +[ ]+90:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+90:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLSL1 +[ ]+94:[ ]+03800085[ ]+ori[ ]+\$a1,[ ]+\$a0,[ ]+0x0 +[ ]+94:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLSL1 +[ ]+98:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+98:[ ]+R_LARCH_TLS_LE64_LO20[ ]+TLSL1 +[ ]+9c:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+9c:[ ]+R_LARCH_TLS_LE64_HI12[ ]+TLSL1 +[ ]+a0:[ ]+58000085[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xa0 +[ ]+a0:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+a4:[ ]+5c000085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xa4 +[ ]+a4:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+a8:[ ]+60000085[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xa8 +[ ]+a8:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+ac:[ ]+64000085[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xac +[ ]+ac:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+b0:[ ]+68000085[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xb0 +[ ]+b0:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+b4:[ ]+6c000085[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+0[ ]+#[ ]+0xb4 +[ ]+b4:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+b8:[ ]+4c0000a4[ ]+jirl[ ]+\$a0,[ ]+\$a1,[ ]+0 +[ ]+b8:[ ]+R_LARCH_B16[ ]+.L1\+0x8 +[ ]+bc:[ ]+40000080[ ]+beqz[ ]+\$a0,[ ]+0[ ]+#[ ]+0xbc +[ ]+bc:[ ]+R_LARCH_B21[ ]+.L1\+0x8 +[ ]+c0:[ ]+44000080[ ]+bnez[ ]+\$a0,[ ]+0[ ]+#[ ]+0xc0 +[ ]+c0:[ ]+R_LARCH_B21[ ]+.L1\+0x8 +[ ]+c4:[ ]+50000000[ ]+b[ ]+0[ ]+#[ ]+0xc4 +[ ]+c4:[ ]+R_LARCH_B26[ ]+.L1\+0x8 +[ ]+c8:[ ]+54000000[ ]+bl[ ]+0[ ]+#[ ]+0xc8 +[ ]+c8:[ ]+R_LARCH_B26[ ]+.L1\+0x8 +[ ]+cc:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+cc:[ ]+R_LARCH_ABS_HI20[ ]+.L1\+0x8 +[ ]+d0:[ ]+038000a4[ ]+ori[ ]+\$a0,[ ]+\$a1,[ ]+0x0 +[ ]+d0:[ ]+R_LARCH_ABS_LO12[ ]+.L1\+0x8 +[ ]+d4:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+d4:[ ]+R_LARCH_ABS64_LO20[ ]+.L1\+0x8 +[ ]+d8:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+d8:[ ]+R_LARCH_ABS64_HI12[ ]+.L1\+0x8 +[ ]+dc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+dc:[ ]+R_LARCH_PCALA_HI20[ ]+.L1\+0x8 +[ ]+e0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+e0:[ ]+R_LARCH_GOT_PC_HI20[ ]+.L1\+0x8 +[ ]+e4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+e4:[ ]+R_LARCH_GOT_PC_LO12[ ]+.L1\+0x8 +[ ]+e8:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+e8:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLSL1\+0x8 +[ ]+ec:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+ec:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLSL1\+0x8 +[ ]+f0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+f0:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLSL1\+0x8 +[ ]+f4:[ ]+02800085[ ]+addi.w[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+f4:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 +[ ]+f8:[ ]+02c00085[ ]+addi.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+f8:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 +[ ]+fc:[ ]+28000085[ ]+ld.b[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+fc:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 +[ ]+100:[ ]+28400085[ ]+ld.h[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+100:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 +[ ]+104:[ ]+28800085[ ]+ld.w[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+104:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 +[ ]+108:[ ]+28c00085[ ]+ld.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+108:[ ]+R_LARCH_PCALA_LO12[ ]+.L1\+0x8 +[ ]+10c:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+10c:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1\+0x8 +[ ]+110:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+110:[ ]+R_LARCH_PCALA64_LO20[ ]+.L1\+0x8 +[ ]+114:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+114:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.L1\+0x8 +[ ]+118:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+118:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.L1\+0x8 +[ ]+11c:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+11c:[ ]+R_LARCH_GOT_HI20[ ]+.L1\+0x8 +[ ]+120:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+120:[ ]+R_LARCH_GOT_LO12[ ]+.L1\+0x8 +[ ]+124:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+124:[ ]+R_LARCH_GOT64_LO20[ ]+.L1\+0x8 +[ ]+128:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+128:[ ]+R_LARCH_GOT64_HI12[ ]+.L1\+0x8 +[ ]+12c:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+12c:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLSL1\+0x8 +[ ]+130:[ ]+03800085[ ]+ori[ ]+\$a1,[ ]+\$a0,[ ]+0x0 +[ ]+130:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLSL1\+0x8 +[ ]+134:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+134:[ ]+R_LARCH_TLS_LE64_LO20[ ]+TLSL1\+0x8 +[ ]+138:[ ]+03000085[ ]+lu52i.d[ ]+\$a1,[ ]+\$a0,[ ]+0 +[ ]+138:[ ]+R_LARCH_TLS_LE64_HI12[ ]+TLSL1\+0x8 diff --git a/gas/testsuite/gas/loongarch/reloc.s b/gas/testsuite/gas/loongarch/reloc.s new file mode 100644 index 00000000..a67fecd9 --- /dev/null +++ b/gas/testsuite/gas/loongarch/reloc.s @@ -0,0 +1,144 @@ +/* Test insn relocs. */ +.text +nop + +/* Jump Insns. */ +/* b16. */ +beq $r4,$r5,%b16(.L1) +bne $r4,$r5,%b16(.L1) +blt $r4,$r5,%b16(.L1) +bge $r4,$r5,%b16(.L1) +bltu $r4,$r5,%b16(.L1) +bgeu $r4,$r5,%b16(.L1) +jirl $r4,$r5,%b16(.L1) + +/* b21. */ +beqz $r4,%b21(.L1) +bnez $r4,%b21(.L1) + +/* b26. */ +b %b26(.L1) +bl %b26(.L1) + + +/* ABS Insns. */ +/* lu12i.w. */ +lu12i.w $r4,%abs_hi20(.L1) + +/* ori */ +ori $r4,$r5,%abs_lo12(.L1) + +/* lu32i.d. */ +lu32i.d $r4,%abs64_lo20(.L1) + +/* lu52i.d. */ +lu52i.d $r5,$r4,%abs64_hi12(.L1) + + +/* Pcala Insns. */ +/* pcalau12i. */ +pcalau12i $r4,%pc_hi20(.L1) +pcalau12i $r4,%got_pc_hi20(.L1) +pcalau12i $r4,%got_pc_lo12(.L1) +pcalau12i $r4,%ie_pc_hi20(TLSL1) +pcalau12i $r4,%ld_pc_hi20(TLSL1) +pcalau12i $r4,%gd_pc_hi20(TLSL1) + +/* addi.w/d ld.b/h/w/d. */ +addi.w $r5,$r4,%pc_lo12(.L1) +addi.d $r5,$r4,%pc_lo12(.L1) +ld.b $r5,$r4,%pc_lo12(.L1) +ld.h $r5,$r4,%pc_lo12(.L1) +ld.w $r5,$r4,%pc_lo12(.L1) +ld.d $r5,$r4,%pc_lo12(.L1) +lu32i.d $r4,%pc64_lo20(.L1) +lu52i.d $r5,$r4,%pc64_lo20(.L1) +lu32i.d $r4,%got64_pc_lo20(.L1) +lu52i.d $r5,$r4,%got64_pc_hi12(.L1) + + +/* GOT64 Insns. */ +/* lu12i.w. */ +lu12i.w $r4,%got_hi20(.L1) +ori $r4,$r4,%got_lo12(.L1) +lu32i.d $r4,%got64_lo20(.L1) +lu52i.d $r5,$r4,%got64_hi12(.L1) + + +/* TLS Insns. */ +lu12i.w $r4,%le_hi20(TLSL1) +ori $r5,$r4,%le_lo12(TLSL1) +lu32i.d $r4,%le64_lo20(TLSL1) +lu52i.d $r5,$r4,%le64_hi12(TLSL1) + + + +/* Insns with addend. */ +/* Jump Insns. */ +/* b16. */ +beq $r4,$r5,%b16(.L1 + 0x8) +bne $r4,$r5,%b16(.L1 + 0x8) +blt $r4,$r5,%b16(.L1 + 0x8) +bge $r4,$r5,%b16(.L1 + 0x8) +bltu $r4,$r5,%b16(.L1 + 0x8) +bgeu $r4,$r5,%b16(.L1 + 0x8) +jirl $r4,$r5,%b16(.L1 + 0x8) + +/* b21. */ +beqz $r4,%b21(.L1 + 0x8) +bnez $r4,%b21(.L1 + 0x8) + +/* b26. */ +b %b26(.L1 + 0x8) +bl %b26(.L1 + 0x8) + + +/* ABS Insns. */ +/* lu12i.w. */ +lu12i.w $r4,%abs_hi20(.L1 + 0x8) + +/* ori */ +ori $r4,$r5,%abs_lo12(.L1 + 0x8) + +/* lu32i.d. */ +lu32i.d $r4,%abs64_lo20(.L1 + 0x8) + +/* lu52i.d. */ +lu52i.d $r5,$r4,%abs64_hi12(.L1 + 0x8) + + +/* Pcala Insns. */ +/* pcalau12i. */ +pcalau12i $r4,%pc_hi20(.L1 + 0x8) +pcalau12i $r4,%got_pc_hi20(.L1 + 0x8) +pcalau12i $r4,%got_pc_lo12(.L1 + 0x8) +pcalau12i $r4,%ie_pc_hi20(TLSL1 + 0x8) +pcalau12i $r4,%ld_pc_hi20(TLSL1 + 0x8) +pcalau12i $r4,%gd_pc_hi20(TLSL1 + 0x8) + +/* addi.w/d ld.b/h/w/d. */ +addi.w $r5,$r4,%pc_lo12(.L1 + 0x8) +addi.d $r5,$r4,%pc_lo12(.L1 + 0x8) +ld.b $r5,$r4,%pc_lo12(.L1 + 0x8) +ld.h $r5,$r4,%pc_lo12(.L1 + 0x8) +ld.w $r5,$r4,%pc_lo12(.L1 + 0x8) +ld.d $r5,$r4,%pc_lo12(.L1 + 0x8) +lu32i.d $r4,%pc64_lo20(.L1 + 0x8) +lu52i.d $r5,$r4,%pc64_lo20(.L1 + 0x8) +lu32i.d $r4,%got64_pc_lo20(.L1 + 0x8) +lu52i.d $r5,$r4,%got64_pc_hi12(.L1 + 0x8) + + +/* GOT64 Insns. */ +/* lu12i.w. */ +lu12i.w $r4,%got_hi20(.L1 + 0x8) +ori $r4,$r4,%got_lo12(.L1 + 0x8) +lu32i.d $r4,%got64_lo20(.L1 + 0x8) +lu52i.d $r5,$r4,%got64_hi12(.L1 + 0x8) + + +/* TLS Insns. */ +lu12i.w $r4,%le_hi20(TLSL1 + 0x8) +ori $r5,$r4,%le_lo12(TLSL1 + 0x8) +lu32i.d $r4,%le64_lo20(TLSL1 + 0x8) +lu52i.d $r5,$r4,%le64_hi12(TLSL1 + 0x8) diff --git a/gas/testsuite/gas/loongarch/syscall.d b/gas/testsuite/gas/loongarch/syscall.d new file mode 100644 index 00000000..1625664f --- /dev/null +++ b/gas/testsuite/gas/loongarch/syscall.d @@ -0,0 +1,11 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+002b0000 [ ]+syscall[ ]+[ ]+0x0 +[ ]+4:[ ]+002b7fff [ ]+syscall[ ]+[ ]+0x7fff diff --git a/gas/testsuite/gas/loongarch/syscall.s b/gas/testsuite/gas/loongarch/syscall.s new file mode 100644 index 00000000..168b713f --- /dev/null +++ b/gas/testsuite/gas/loongarch/syscall.s @@ -0,0 +1,2 @@ +syscall 0 +syscall 0x7fff diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp index f9ee6f4a..6074c2ee 100644 --- a/gas/testsuite/lib/gas-defs.exp +++ b/gas/testsuite/lib/gas-defs.exp @@ -360,6 +360,10 @@ proc verbose_eval { expr { level 1 } } { # This definition is taken from an unreleased version of DejaGnu. Once # that version gets released, and has been out in the world for a few # months at least, it may be safe to delete this copy. + +if { [istarget loongarch*-*-*] } { + rename prune_warnings prune_warnings_other +} if ![string length [info proc prune_warnings]] { # # prune_warnings -- delete various system verbosities from TEXT. diff --git a/include/dis-asm.h b/include/dis-asm.h index 0b91ab47..c0bc1d54 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -307,6 +307,7 @@ extern void print_arm_disassembler_options (FILE *); extern void print_arc_disassembler_options (FILE *); extern void print_s390_disassembler_options (FILE *); extern void print_wasm32_disassembler_options (FILE *); +extern void print_loongarch_disassembler_options (FILE *); extern bool aarch64_symbol_is_valid (asymbol *, struct disassemble_info *); extern bool arm_symbol_is_valid (asymbol *, struct disassemble_info *); extern bool csky_symbol_is_valid (asymbol *, struct disassemble_info *); diff --git a/include/elf/common.h b/include/elf/common.h index 0cca2867..0fbcd49f 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -677,8 +677,18 @@ /* note name must be "LINUX". */ #define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */ /* note name must be "LINUX". */ -#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ +#define NT_LARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ + /* note name must be "LINUX". */ +#define NT_LARCH_CSR 0xa01 /* LoongArch Control State Registers */ + /* note name must be "LINUX". */ +#define NT_LARCH_LSX 0xa02 /* LoongArch SIMD eXtension registers */ + /* note name must be "LINUX". */ +#define NT_LARCH_LASX 0xa03 /* LoongArch Advanced SIMD eXtension registers */ + /* note name must be "LINUX". */ +#define NT_LARCH_LBT 0xa04 /* LoongArch Binary Translation registers */ /* note name must be "CORE". */ +#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ + /* note name must be "LINUX". */ #define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */ #define NT_FILE 0x46494c45 /* Description of mapped files. */ diff --git a/include/elf/loongarch.h b/include/elf/loongarch.h new file mode 100644 index 00000000..a6341b46 --- /dev/null +++ b/include/elf/loongarch.h @@ -0,0 +1,265 @@ +/* Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the license, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#ifndef _ELF_LOONGARCH_H +#define _ELF_LOONGARCH_H + +#include "elf/reloc-macros.h" +#include "libiberty.h" + +START_RELOC_NUMBERS (elf_loongarch_reloc_type) +/* Used by the dynamic linker. */ +RELOC_NUMBER (R_LARCH_NONE, 0) +RELOC_NUMBER (R_LARCH_32, 1) +RELOC_NUMBER (R_LARCH_64, 2) +RELOC_NUMBER (R_LARCH_RELATIVE, 3) +RELOC_NUMBER (R_LARCH_COPY, 4) +RELOC_NUMBER (R_LARCH_JUMP_SLOT, 5) +RELOC_NUMBER (R_LARCH_TLS_DTPMOD32, 6) +RELOC_NUMBER (R_LARCH_TLS_DTPMOD64, 7) +RELOC_NUMBER (R_LARCH_TLS_DTPREL32, 8) +RELOC_NUMBER (R_LARCH_TLS_DTPREL64, 9) +RELOC_NUMBER (R_LARCH_TLS_TPREL32, 10) +RELOC_NUMBER (R_LARCH_TLS_TPREL64, 11) +RELOC_NUMBER (R_LARCH_IRELATIVE, 12) + +/* Reserved for future relocs that the dynamic linker must understand. */ + +/* Used by the static linker for relocating .text. */ +RELOC_NUMBER (R_LARCH_MARK_LA, 20) +RELOC_NUMBER (R_LARCH_MARK_PCREL, 21) + +RELOC_NUMBER (R_LARCH_SOP_PUSH_PCREL, 22) + +RELOC_NUMBER (R_LARCH_SOP_PUSH_ABSOLUTE, 23) + +RELOC_NUMBER (R_LARCH_SOP_PUSH_DUP, 24) +RELOC_NUMBER (R_LARCH_SOP_PUSH_GPREL, 25) +RELOC_NUMBER (R_LARCH_SOP_PUSH_TLS_TPREL, 26) +RELOC_NUMBER (R_LARCH_SOP_PUSH_TLS_GOT, 27) +RELOC_NUMBER (R_LARCH_SOP_PUSH_TLS_GD, 28) +RELOC_NUMBER (R_LARCH_SOP_PUSH_PLT_PCREL, 29) + +RELOC_NUMBER (R_LARCH_SOP_ASSERT, 30) +RELOC_NUMBER (R_LARCH_SOP_NOT, 31) +RELOC_NUMBER (R_LARCH_SOP_SUB, 32) +RELOC_NUMBER (R_LARCH_SOP_SL, 33) +RELOC_NUMBER (R_LARCH_SOP_SR, 34) +RELOC_NUMBER (R_LARCH_SOP_ADD, 35) +RELOC_NUMBER (R_LARCH_SOP_AND, 36) +RELOC_NUMBER (R_LARCH_SOP_IF_ELSE, 37) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_10_5, 38) +RELOC_NUMBER (R_LARCH_SOP_POP_32_U_10_12, 39) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_10_12, 40) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_10_16, 41) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_10_16_S2, 42) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_5_20, 43) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_0_5_10_16_S2, 44) +RELOC_NUMBER (R_LARCH_SOP_POP_32_S_0_10_10_16_S2, 45) +RELOC_NUMBER (R_LARCH_SOP_POP_32_U, 46) + +/* Used by the static linker for relocating non .text. */ +RELOC_NUMBER (R_LARCH_ADD8, 47) +RELOC_NUMBER (R_LARCH_ADD16, 48) +RELOC_NUMBER (R_LARCH_ADD24, 49) +RELOC_NUMBER (R_LARCH_ADD32, 50) +RELOC_NUMBER (R_LARCH_ADD64, 51) +RELOC_NUMBER (R_LARCH_SUB8, 52) +RELOC_NUMBER (R_LARCH_SUB16, 53) +RELOC_NUMBER (R_LARCH_SUB24, 54) +RELOC_NUMBER (R_LARCH_SUB32, 55) +RELOC_NUMBER (R_LARCH_SUB64, 56) + +/* I don't know what it is. Existing in almost all other arch. */ +RELOC_NUMBER (R_LARCH_GNU_VTINHERIT, 57) +RELOC_NUMBER (R_LARCH_GNU_VTENTRY, 58) + + +/* B16: + beq/bne/blt/bge/bltu/bgeu/jirl + %b16 (sym). */ +RELOC_NUMBER (R_LARCH_B16, 64) +/* B21: + beqz/bnez + %b16 (sym). */ +RELOC_NUMBER (R_LARCH_B21, 65) +/* B26: + b/bl + %b26 (sym) or %plt (sym). */ +RELOC_NUMBER (R_LARCH_B26, 66) + +/* ABS: 32/64 + lu12i.w + %abs_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_ABS_HI20, 67) +/* ABS: 32/64 + ori + %abs_lo12 (sym). */ +RELOC_NUMBER (R_LARCH_ABS_LO12, 68) + +/* ABS: 64 + lu32i.d + %abs64_lo20 (sym). */ +RELOC_NUMBER (R_LARCH_ABS64_LO20, 69) +/* ABS: 64 + lu52i.d + %abs64_hi12 (sym). */ +RELOC_NUMBER (R_LARCH_ABS64_HI12, 70) + +/* PCREL: 32/64 + pcalau12i + %pc_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_PCALA_HI20, 71) +/* PCREL: 32/64 + addi.w/addi.d + %pc_lo12 (sym). */ +RELOC_NUMBER (R_LARCH_PCALA_LO12, 72) +/* PCREL: 64 + lu32i.d + %pc64_lo20 (sym). */ +RELOC_NUMBER (R_LARCH_PCALA64_LO20, 73) +/* PCREL: 64 + lu52i.d + %pc64_hi12 (sym). */ +RELOC_NUMBER (R_LARCH_PCALA64_HI12, 74) + +/* GOT: 32/64 + pcalau12i + %got_pc_hi20 (got). */ +RELOC_NUMBER (R_LARCH_GOT_PC_HI20, 75) +/* GOT: 32/64 + ld.w/ld.d + %got_pc_lo12 (got). */ +RELOC_NUMBER (R_LARCH_GOT_PC_LO12, 76) +/* GOT: 32/64 + lu32i.d + %got_pc_lo12 (got). */ +RELOC_NUMBER (R_LARCH_GOT64_PC_LO20, 77) +/* GOT64: PCREL + lu52i.d + %got64_pc_hi12 (got). */ +RELOC_NUMBER (R_LARCH_GOT64_PC_HI12, 78) +/* GOT32/64: ABS + lu12i.w + %got_hi20 (got). */ +RELOC_NUMBER (R_LARCH_GOT_HI20, 79) +/* GOT: 32/64: ABS + ori + %got_lo12 (got). */ +RELOC_NUMBER (R_LARCH_GOT_LO12, 80) +/* GOT64: ABS + lu32i.d + %got64_lo20 (got). */ +RELOC_NUMBER (R_LARCH_GOT64_LO20, 81) +/* GOT64: ABS + lu52i.d + %got64_hi12 (got). */ +RELOC_NUMBER (R_LARCH_GOT64_HI12, 82) + +/* TLS-LE: 32/64 + lu12i.w + %le_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_LE_HI20, 83) +/* TLS-LE: 32/64 + ori + %le_lo12 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_LE_LO12, 84) +/* TLS-LE: 64 + lu32i.d + %le64_lo20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_LE64_LO20, 85) +/* TLS-LE: 64 + lu52i.d + %le64_hi12 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_LE64_HI12, 86) + +/* TLS-IE: 32/64 + pcalau12i + %ie_pc_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_IE_PC_HI20, 87) +RELOC_NUMBER (R_LARCH_TLS_IE_PC_LO12, 88) +RELOC_NUMBER (R_LARCH_TLS_IE64_PC_LO20, 89) +RELOC_NUMBER (R_LARCH_TLS_IE64_PC_HI12, 90) + +/* TLS-IE: 32/64: ABS + lu12i.w + %ie_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_IE_HI20, 91) +RELOC_NUMBER (R_LARCH_TLS_IE_LO12, 92) +RELOC_NUMBER (R_LARCH_TLS_IE64_LO20, 93) +RELOC_NUMBER (R_LARCH_TLS_IE64_HI12, 94) + +/* TLS-LD: 32/64 + pcalau12i + %ld_pc_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_LD_PC_HI20, 95) +/* TLS-LD: 32/64: ABS + lu12i.w + %ld_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_LD_HI20, 96) + +/* TLS-GD: 32/64 + pcalau12i + %gd_pc_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_GD_PC_HI20, 97) +/* TLS-GD: 32/64: ABS + lu12i.w + %gd_hi20 (sym). */ +RELOC_NUMBER (R_LARCH_TLS_GD_HI20, 98) + +/* For eh_frame and debug info. */ +RELOC_NUMBER (R_LARCH_32_PCREL, 99) + +/* RELAX. */ +RELOC_NUMBER (R_LARCH_RELAX, 100) + +END_RELOC_NUMBERS (R_LARCH_count) + +/* Processor specific flags for the ELF header e_flags field. */ +/* Base ABI modifier, 3bits. */ +#define EF_LOONGARCH_ABI_SOFT_FLOAT 0x1 +#define EF_LOONGARCH_ABI_SINGLE_FLOAT 0x2 +#define EF_LOONGARCH_ABI_DOUBLE_FLOAT 0x3 +#define EF_LOONGARCH_ABI_MODIFIER_MASK 0x7 + +#define EF_LOONGARCH_OBJABI_V1 0x40 +#define EF_LOONGARCH_OBJABI_MASK 0xC0 + +#define EF_LOONGARCH_ABI_MASK \ + (EF_LOONGARCH_OBJABI_MASK | EF_LOONGARCH_ABI_MODIFIER_MASK) + +#define EF_LOONGARCH_ABI_MODIFIER(abi) \ + (EF_LOONGARCH_ABI_MODIFIER_MASK & (abi)) +#define EF_LOONGARCH_OBJABI(abi) \ + (EF_LOONGARCH_OBJABI_MASK & (abi)) + +#define EF_LOONGARCH_ABI(abi) ((abi) & EF_LOONGARCH_ABI_MASK) + +#define EF_LOONGARCH_IS_SOFT_FLOAT(abi) \ + (EF_LOONGARCH_ABI_MODIFIER (abi) == EF_LOONGARCH_ABI_SOFT_FLOAT) +#define EF_LOONGARCH_IS_SINGLE_FLOAT(abi) \ + (EF_LOONGARCH_ABI_MODIFIER (abi) == EF_LOONGARCH_ABI_SINGLE_FLOAT) +#define EF_LOONGARCH_IS_DOUBLE_FLOAT(abi) \ + (EF_LOONGARCH_ABI_MODIFIER (abi) == EF_LOONGARCH_ABI_DOUBLE_FLOAT) + +#define EF_LOONGARCH_IS_OBJ_V0(abi) (!EF_LOONGARCH_OBJABI (abi)) +#define EF_LOONGARCH_IS_OBJ_V1(abi) \ + (EF_LOONGARCH_OBJABI (abi) == EF_LOONGARCH_OBJABI_V1) + +#endif /* _ELF_LOONGARCH_H */ diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h new file mode 100644 index 00000000..c3922348 --- /dev/null +++ b/include/opcode/loongarch.h @@ -0,0 +1,239 @@ +/* LoongArch assembler/disassembler support. + + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the license, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#ifndef _LOONGARCH_H_ +#define _LOONGARCH_H_ +#include + +#ifdef __cplusplus +extern "C" +{ +#endif + + typedef uint32_t insn_t; + + struct loongarch_opcode + { + const insn_t match; + const insn_t mask; /* High 1 byte is main opcode and it must be 0xf. */ +#define LARCH_INSN_OPC(insn) ((insn & 0xf0000000) >> 28) + const char *const name; + + /* ACTUAL PARAMETER: + + // BNF with regular expression. +args : token* end + + // just few char separate 'iden' +token : ',' +| '(' +| ')' +| iden // maybe a label (include at least one alphabet), + maybe a number, maybe a expr +| regname + +regname : '$' iden + +iden : [a-zA-Z0-9\.\+\-]+ + +end : '\0' + + +FORMAT: A string to describe the format of actual parameter including +bit field infomation. For example, "r5:5,r0:5,sr10:16<<2" matches +"$12,$13,12345" and "$4,$7,a_label". That 'sr' means the instruction +may need relocate. '10:16' means bit field of instruction. +In a 'format', every 'escape's can be replaced to 'iden' or 'regname' +acrroding to its meaning. We fill all information needed by +disassembing and assembing to 'format'. + + // BNF with regular expression. +format : escape (literal+ escape)* literal* end +| (literal+ escape)* literal* end + +end : '\0' // Get here means parse end. + + // The intersection between any two among FIRST (end), FIRST + // (literal) and FIRST (escape) must be empty. + // So we can build a simple parser. +literal : ',' +| '(' +| ')' + + // Double '<'s means the real number is the immediate after shifting left. +escape : esc_ch bit_field '<' '<' dec2 +| esc_ch bit_field +| esc_ch // for MACRO. non-macro format must indicate 'bit_field' + + // '|' means to concatenate nonadjacent bit fields + // For example, "10:16|0:4" means + // "16 bits starting from the 10th bit concatenating with 4 bits + // starting from the 0th bit". + // This is to say "[25..10]||[3..0]" (little endian). +b_field : dec2 ':' dec2 +| dec2 ':' dec2 '|' bit_field + +esc_ch : 's' 'r' // signed immediate or label need relocate +| 's' // signed immediate no need relocate +| 'u' // unsigned immediate +| 'l' // label needed relocate +| 'r' // general purpose registers +| 'f' // FPU registers +| 'v' // 128 bit SIMD register +| 'x' // 256 bit SIMD register + +dec2 : [1-9][0-9]? +| 0 + +*/ + const char *const format; + + /* MACRO: Indicate how a macro instruction expand for assembling. + The main is to replace the '%num'(means the 'num'th 'escape' in + 'format') in 'macro' string to get the real instruction. + + Maybe need + */ + const char *const macro; + const int *include; + const int *exclude; + + const unsigned long pinfo; +#define USELESS 0x0l + }; + + struct hash_control; + + struct loongarch_ase + { + const int *enabled; + struct loongarch_opcode *const opcodes; + const int *include; + const int *exclude; + + /* For disassemble to create main opcode hash table. */ + const struct loongarch_opcode *opc_htab[16]; + unsigned char opc_htab_inited; + + /* For GAS to create hash table. */ + struct htab *name_hash_entry; + }; + + extern int is_unsigned (const char *); + extern int is_signed (const char *); + extern int is_branch_label (const char *); + + extern int loongarch_get_bit_field_width (const char *bit_field, char **end); + extern int32_t loongarch_decode_imm (const char *bit_field, insn_t insn, + int si); + +#define MAX_ARG_NUM_PLUS_2 9 + + extern size_t loongarch_split_args_by_comma (char *args, + const char *arg_strs[]); + extern char *loongarch_cat_splited_strs (const char *arg_strs[]); + extern insn_t loongarch_foreach_args ( + const char *format, const char *arg_strs[], + int32_t (*helper) (char esc1, char esc2, const char *bit_field, + const char *arg, void *context), + void *context); + + extern int loongarch_check_format (const char *format); + extern int loongarch_check_macro (const char *format, const char *macro); + + extern char *loongarch_expand_macro_with_format_map ( + const char *format, const char *macro, const char *const arg_strs[], + const char *(*map) (char esc1, char esc2, const char *arg), + char *(*helper) (const char *const arg_strs[], void *context), + void *context, size_t len_str); + extern char *loongarch_expand_macro ( + const char *macro, const char *const arg_strs[], + char *(*helper) (const char *const arg_strs[], void *context), + void *context, size_t len_str); + extern size_t loongarch_bits_imm_needed (int64_t imm, int si); + + extern void loongarch_eliminate_adjacent_repeat_char (char *dest, char c); + + extern int loongarch_parse_dis_options (const char *opts_in); + extern void loongarch_disassemble_one ( + int64_t pc, insn_t insn, + int (*fprintf_func) (void *stream, const char *format, ...), void *stream); + + extern const char *const loongarch_r_normal_name[32]; + extern const char *const loongarch_r_lp64_name[32]; + extern const char *const loongarch_r_lp64_name1[32]; + extern const char *const loongarch_f_normal_name[32]; + extern const char *const loongarch_f_lp64_name[32]; + extern const char *const loongarch_f_lp64_name1[32]; + extern const char *const loongarch_c_normal_name[8]; + extern const char *const loongarch_cr_normal_name[4]; + extern const char *const loongarch_v_normal_name[32]; + extern const char *const loongarch_x_normal_name[32]; + + extern struct loongarch_ase loongarch_ASEs[]; + + extern struct loongarch_ASEs_option + { + struct opt_abi + { + int elf_abi; + } abi; +#define ase_abi abi.elf_abi + + struct opt_isa + { + int use_ilp32; + int use_lp64; + + int use_soft_float; + int use_single_float; + int use_double_float; + + int use_lsx; + int use_lasx; + + int use_la_local_with_abs; + int use_la_global_with_pcrel; + int use_la_global_with_abs; + } isa; +#define ase_ilp32 isa.use_ilp32 +#define ase_lp64 isa.use_lp64 + +#define ase_nf isa.use_soft_float +#define ase_sf isa.use_single_float +#define ase_df isa.use_double_float + +#define ase_lsx isa.use_lsx +#define ase_lasx isa.use_lasx + +#define ase_labs isa.use_la_local_with_abs +#define ase_gpcr isa.use_la_global_with_pcrel +#define ase_gabs isa.use_la_global_with_abs + + } LARCH_opts; + + extern size_t loongarch_insn_length (insn_t insn); + +#ifdef __cplusplus +} +#endif + +#endif /* _LOONGARCH_H_ */ diff --git a/ld/Makefile.am b/ld/Makefile.am index f8e99325..933741df 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -401,6 +401,7 @@ ALL_64_EMULATION_SOURCES = \ eelf32elmip.c \ eelf32elmipvxworks.c \ eelf32l4300.c \ + eelf32loongarch.c \ eelf32lmip.c \ eelf32lr5900.c \ eelf32lr5900n32.c \ @@ -434,6 +435,7 @@ ALL_64_EMULATION_SOURCES = \ eelf64hppa.c \ eelf64lppc.c \ eelf64lppc_fbsd.c \ + eelf64loongarch.c \ eelf64lriscv.c \ eelf64lriscv_lp64f.c \ eelf64lriscv_lp64.c \ @@ -893,6 +895,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32elmip.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32elmipvxworks.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32l4300.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32loongarch.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lmip.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900n32.Pc@am__quote@ @@ -920,6 +923,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Pc@am__quote@ diff --git a/ld/Makefile.in b/ld/Makefile.in index ef2e99e0..966194ae 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -891,6 +891,7 @@ ALL_64_EMULATION_SOURCES = \ eelf32elmipvxworks.c \ eelf32l4300.c \ eelf32lmip.c \ + eelf32loongarch.c \ eelf32lr5900.c \ eelf32lr5900n32.c \ eelf32lsmip.c \ @@ -923,6 +924,7 @@ ALL_64_EMULATION_SOURCES = \ eelf64hppa.c \ eelf64lppc.c \ eelf64lppc_fbsd.c \ + eelf64loongarch.c \ eelf64lriscv.c \ eelf64lriscv_lp64f.c \ eelf64lriscv_lp64.c \ @@ -1347,6 +1349,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq10.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32iq2000.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32l4300.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32loongarch.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lm32.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lm32fd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lmip.Po@am__quote@ @@ -1417,6 +1420,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip_fbsd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Po@am__quote@ @@ -2578,6 +2582,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS) @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc_fbsd.Pc@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64loongarch.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Pc@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64.Pc@am__quote@ diff --git a/ld/configure.tgt b/ld/configure.tgt index 6205d7c9..86ce0919 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -1021,6 +1021,10 @@ z8k-*-coff) targ_emul=z8002 targ_extra_emuls=z8001 targ_extra_ofiles= ;; +loongarch32-*) targ_emul=elf32loongarch + ;; +loongarch64-*) targ_emul=elf64loongarch + ;; *-*-ieee*) targ_emul=vanilla targ_extra_ofiles= ;; diff --git a/ld/emulparams/elf32loongarch-defs.sh b/ld/emulparams/elf32loongarch-defs.sh new file mode 100644 index 00000000..f80f5742 --- /dev/null +++ b/ld/emulparams/elf32loongarch-defs.sh @@ -0,0 +1,36 @@ +# This is an ELF platform. +SCRIPT_NAME=elf +ARCH=loongarch +NO_REL_RELOCS=yes + +TEMPLATE_NAME=elf +EXTRA_EM_FILE=loongarchelf + +ELFSIZE=32 + +if test `echo "$host" | sed -e s/64//` = `echo "$target" | sed -e s/64//`; then + case " $EMULATION_LIBPATH " in + *" ${EMULATION_NAME} "*) + NATIVE=yes + ;; + esac +fi + +# Enable shared library support for everything except an embedded elf target. +case "$target" in + loongarch*-elf) + ;; + *) + GENERATE_SHLIB_SCRIPT=yes + GENERATE_PIE_SCRIPT=yes + ;; +esac + +IREL_IN_PLT= +TEXT_START_ADDR=0x10000 +MAXPAGESIZE="CONSTANT (MAXPAGESIZE)" +COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)" + +SEPARATE_GOTPLT=0 +INITIAL_READONLY_SECTIONS=".interp : { *(.interp) } ${CREATE_PIE-${INITIAL_READONLY_SECTIONS}}" +INITIAL_READONLY_SECTIONS="${RELOCATING+${CREATE_SHLIB-${INITIAL_READONLY_SECTIONS}}}" diff --git a/ld/emulparams/elf32loongarch.sh b/ld/emulparams/elf32loongarch.sh new file mode 100644 index 00000000..edc85ece --- /dev/null +++ b/ld/emulparams/elf32loongarch.sh @@ -0,0 +1,11 @@ +source_sh ${srcdir}/emulparams/elf32loongarch-defs.sh +OUTPUT_FORMAT="elf32-loongarch" + +case "$target" in + loongarch32*-linux*) + case "$EMULATION_NAME" in + *32*) + LIBPATH_SUFFIX="32" ;; + esac + ;; +esac diff --git a/ld/emulparams/elf64loongarch-defs.sh b/ld/emulparams/elf64loongarch-defs.sh new file mode 100644 index 00000000..c793f5d8 --- /dev/null +++ b/ld/emulparams/elf64loongarch-defs.sh @@ -0,0 +1,39 @@ +# This is an ELF platform. +SCRIPT_NAME=elf +ARCH=loongarch +NO_REL_RELOCS=yes + +TEMPLATE_NAME=elf +EXTRA_EM_FILE=loongarchelf + +ELFSIZE=64 + +if test `echo "$host" | sed -e s/64//` = `echo "$target" | sed -e s/64//`; then + case " $EMULATION_LIBPATH " in + *" ${EMULATION_NAME} "*) + NATIVE=yes + ;; + esac +fi + +# Enable shared library support for everything except an embedded elf target. +case "$target" in + loongarch*-elf) + ;; + *) + GENERATE_SHLIB_SCRIPT=yes + GENERATE_PIE_SCRIPT=yes + ;; +esac + +# In all cases, the number is big-endian. +# LoongArch nop is 'andi $r0,$r0,0'. +NOP=0x00004003 + +TEXT_START_ADDR=0x120000000 +MAXPAGESIZE="CONSTANT (MAXPAGESIZE)" +COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)" + +SEPARATE_GOTPLT=0 +INITIAL_READONLY_SECTIONS=".interp : { *(.interp) } ${CREATE_PIE-${INITIAL_READONLY_SECTIONS}}" +INITIAL_READONLY_SECTIONS="${RELOCATING+${CREATE_SHLIB-${INITIAL_READONLY_SECTIONS}}}" diff --git a/ld/emulparams/elf64loongarch.sh b/ld/emulparams/elf64loongarch.sh new file mode 100644 index 00000000..d7b2229e --- /dev/null +++ b/ld/emulparams/elf64loongarch.sh @@ -0,0 +1,11 @@ +source_sh ${srcdir}/emulparams/elf64loongarch-defs.sh +OUTPUT_FORMAT="elf64-loongarch" + +case "$target" in + loongarch64*-linux*) + case "$EMULATION_NAME" in + *64*) + LIBPATH_SUFFIX="64";; + esac + ;; +esac diff --git a/ld/emultempl/loongarchelf.em b/ld/emultempl/loongarchelf.em new file mode 100644 index 00000000..b688ef7b --- /dev/null +++ b/ld/emultempl/loongarchelf.em @@ -0,0 +1,87 @@ +# This shell script emits a C file. -*- C -*- +# Copyright (C) 2021 Free Software Foundation, Inc. +# Contributed by Loongson Ltd. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; see the file COPYING3. If not, +# see . + +fragment < + +static int implementation (void) +{ + printf ("'ere I am JH\n"); + return 0; +} + +static __typeof__ (implementation)* resolver (void) +{ + return implementation; +} + +static int magic (void) __attribute__ ((ifunc ("resolver"))); + +int main () +{ + return magic () != 0; +} diff --git a/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out b/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out new file mode 100644 index 00000000..2d9cc343 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/attr-ifunc-4.out @@ -0,0 +1 @@ +'ere I am JH diff --git a/ld/testsuite/ld-loongarch-elf/cmodel-libjirl.dd b/ld/testsuite/ld-loongarch-elf/cmodel-libjirl.dd new file mode 100644 index 00000000..52d3dca8 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/cmodel-libjirl.dd @@ -0,0 +1,4 @@ +.*file format.*loongarch +#... +[0-9a-f]+ : +#pass diff --git a/ld/testsuite/ld-loongarch-elf/cmodel.exp b/ld/testsuite/ld-loongarch-elf/cmodel.exp new file mode 100644 index 00000000..7ef972a4 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/cmodel.exp @@ -0,0 +1,37 @@ +# Expect script for LoongArch ELF linker tests +# Copyright (C) 2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +if ![istarget loongarch*-*-*] { + return +} + +run_ld_link_tests [list \ + [list \ + "medium jirl plt" \ + "-shared" "" \ + "" \ + {libjirl.s} \ + [list \ + [list objdump -d cmodel-libjirl.dd] \ + ] \ + "libjirl.so" \ + ] \ + ] diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d new file mode 100644 index 00000000..2f2a41af --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.d @@ -0,0 +1,15 @@ +#as: +#objdump: -dr +#skip: loongarch64-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <_start>: +[ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 +[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start +[ ]+4:[ ]+02800294[ ]+addi.w[ ]+\$t8,[ ]+\$t8,[ ]+0 +[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start +[ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl-32.s b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.s new file mode 100644 index 00000000..d6027c9c --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/disas-jirl-32.s @@ -0,0 +1,5 @@ + .text + .globl _start +_start: + la.local $r20,_start + jirl $r1, $r20, 0 diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl.d b/ld/testsuite/ld-loongarch-elf/disas-jirl.d new file mode 100644 index 00000000..595c30c7 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/disas-jirl.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.*: +[ ]+0:[ ]+1a000014[ ]+pcalau12i[ ]+\$t8,[ ]+0 +[ ]+0:[ ]+R_LARCH_PCALA_HI20[ ]+_start +[ ]+4:[ ]+02c00294[ ]+addi.d[ ]+\$t8,[ ]+\$t8,[ ]+0 +[ ]+4:[ ]+R_LARCH_PCALA_LO12[ ]+_start +[ ]+8:[ ]+4c000281[ ]+jirl[ ]+\$ra,[ ]+\$t8,[ ]+0 diff --git a/ld/testsuite/ld-loongarch-elf/disas-jirl.s b/ld/testsuite/ld-loongarch-elf/disas-jirl.s new file mode 100644 index 00000000..d6027c9c --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/disas-jirl.s @@ -0,0 +1,5 @@ + .text + .globl _start +_start: + la.local $r20,_start + jirl $r1, $r20, 0 diff --git a/ld/testsuite/ld-loongarch-elf/ifunc.exp b/ld/testsuite/ld-loongarch-elf/ifunc.exp new file mode 100644 index 00000000..2b55002f --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/ifunc.exp @@ -0,0 +1,34 @@ +# Expect script for LoongArch assembler tests. +# Copyright (C) 2021-2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. + + + +if [istarget loongarch*-*-*] { + run_ld_link_exec_tests [list \ + [list \ + "Run attr-ifunc-4" \ + "" \ + "" \ + {attr-ifunc-4.c} \ + "attr-ifunc-4" \ + "attr-ifunc-4.out" \ + ] \ + ] +} diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.d b/ld/testsuite/ld-loongarch-elf/jmp_op.d new file mode 100644 index 00000000..93452c31 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/jmp_op.d @@ -0,0 +1,30 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+03400000[ ]+andi[ ]+\$zero,[ ]+\$zero,[ ]+0x0 +[ ]+4:[ ]+63fffc04[ ]+bgtz[ ]+\$a0,[ ]+-4\(0x3fffc\)[ ]+#[ ]+0x0 +[ ]+8:[ ]+67fff880[ ]+bgez[ ]+\$a0,[ ]+-8\(0x3fff8\)[ ]+#[ ]+0x0 +[ ]+c:[ ]+67fff404[ ]+blez[ ]+\$a0,[ ]+-12\(0x3fff4\)[ ]+#[ ]+0x0 +[ ]+10:[ ]+43fff09f[ ]+beqz[ ]+\$a0,[ ]+-16\(0x7ffff0\)[ ]+#[ ]+0x0 +[ ]+14:[ ]+47ffec9f[ ]+bnez[ ]+\$a0,[ ]+-20\(0x7fffec\)[ ]+#[ ]+0x0 +[ ]+18:[ ]+4bffe81f[ ]+bceqz[ ]+\$fcc0,[ ]+-24\(0x7fffe8\)[ ]+#[ ]+0x0 +[ ]+1c:[ ]+4bffe51f[ ]+bcnez[ ]+\$fcc0,[ ]+-28\(0x7fffe4\)[ ]+#[ ]+0x0 +[ ]+20:[ ]+4c000080[ ]+jirl[ ]+\$zero,[ ]+\$a0,[ ]+0 +[ ]+24:[ ]+53ffdfff[ ]+b[ ]+-36\(0xfffffdc\)[ ]+#[ ]+0x0 +[ ]+28:[ ]+57ffdbff[ ]+bl[ ]+-40\(0xfffffd8\)[ ]+#[ ]+0x0 +[ ]+2c:[ ]+5bffd485[ ]+beq[ ]+\$a0,[ ]+\$a1,[ ]+-44\(0x3ffd4\)[ ]+#[ ]+0x0 +[ ]+30:[ ]+5fffd085[ ]+bne[ ]+\$a0,[ ]+\$a1,[ ]+-48\(0x3ffd0\)[ ]+#[ ]+0x0 +[ ]+34:[ ]+63ffcc85[ ]+blt[ ]+\$a0,[ ]+\$a1,[ ]+-52\(0x3ffcc\)[ ]+#[ ]+0x0 +[ ]+38:[ ]+63ffc8a4[ ]+blt[ ]+\$a1,[ ]+\$a0,[ ]+-56\(0x3ffc8\)[ ]+#[ ]+0x0 +[ ]+3c:[ ]+67ffc485[ ]+bge[ ]+\$a0,[ ]+\$a1,[ ]+-60\(0x3ffc4\)[ ]+#[ ]+0x0 +[ ]+40:[ ]+67ffc0a4[ ]+bge[ ]+\$a1,[ ]+\$a0,[ ]+-64\(0x3ffc0\)[ ]+#[ ]+0x0 +[ ]+44:[ ]+6bffbc85[ ]+bltu[ ]+\$a0,[ ]+\$a1,[ ]+-68\(0x3ffbc\)[ ]+#[ ]+0x0 +[ ]+48:[ ]+6bffb8a4[ ]+bltu[ ]+\$a1,[ ]+\$a0,[ ]+-72\(0x3ffb8\)[ ]+#[ ]+0x0 +[ ]+4c:[ ]+6fffb485[ ]+bgeu[ ]+\$a0,[ ]+\$a1,[ ]+-76\(0x3ffb4\)[ ]+#[ ]+0x0 +[ ]+50:[ ]+6fffb0a4[ ]+bgeu[ ]+\$a1,[ ]+\$a0,[ ]+-80\(0x3ffb0\)[ ]+#[ ]+0x0 diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.s b/ld/testsuite/ld-loongarch-elf/jmp_op.s new file mode 100644 index 00000000..1deb165a --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/jmp_op.s @@ -0,0 +1,22 @@ +.L1: +nop +bgtz $r4,.L1 +bgez $r4,.L1 +blez $r4,.L1 +beqz $r4,.L1 +bnez $r4,.L1 +bceqz $fcc0,.L1 +bcnez $fcc0,.L1 +jr $r4 +b .L1 +bl .L1 +beq $r4,$r5,.L1 +bne $r4,$r5,.L1 +blt $r4,$r5,.L1 +bgt $r4,$r5,.L1 +bge $r4,$r5,.L1 +ble $r4,$r5,.L1 +bltu $r4,$r5,.L1 +bgtu $r4,$r5,.L1 +bgeu $r4,$r5,.L1 +bleu $r4,$r5,.L1 diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp new file mode 100644 index 00000000..726ee823 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp @@ -0,0 +1,42 @@ +# Expect script for LoongArch ELF linker tests +# Copyright (C) 2021-2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +proc loongarch_choose_lp64_emul {} { + if { [istarget "loongarch64be-*"] } { + return "elf64bloongarch" + } + return "elf64lloongarch" +} + +if [istarget "loongarch64-*-*"] { + run_dump_test "jmp_op" + run_dump_test "macro_op" + run_dump_test "syscall" + run_dump_test "disas-jirl" + run_dump_test "local-ifunc-reloc" +} + +if [istarget "loongarch32-*-*"] { + run_dump_test "jmp_op" + run_dump_test "macro_op_32" + run_dump_test "syscall" + run_dump_test "disas-jirl-32" +} diff --git a/ld/testsuite/ld-loongarch-elf/libjirl.s b/ld/testsuite/ld-loongarch-elf/libjirl.s new file mode 100644 index 00000000..4d963870 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/libjirl.s @@ -0,0 +1,2 @@ +pcalau12i $r12, %pc_hi20(func) +jirl $r1,$r12, %pc_lo12(func) diff --git a/ld/testsuite/ld-loongarch-elf/libnopic-global.s b/ld/testsuite/ld-loongarch-elf/libnopic-global.s new file mode 100644 index 00000000..39d7dc68 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/libnopic-global.s @@ -0,0 +1,113 @@ + .file "libnopic-global.c" + .text +.Ltext0: + .file 1 "libnopic-global.c" + .globl g_nopic + .data + .align 2 + .type g_nopic, @object + .size g_nopic, 4 +g_nopic: + .word 305419896 + .text +.Letext0: + .section .debug_info,"",@progbits +.Ldebug_info0: + .4byte 0x38 + .2byte 0x5 + .byte 0x1 + .byte 0x8 + .4byte .Ldebug_abbrev0 + .uleb128 0x1 + .4byte .LASF0 + .byte 0x1d + .4byte .LASF1 + .4byte .LASF2 + .4byte .Ldebug_line0 + .uleb128 0x2 + .4byte .LASF3 + .byte 0x1 + .byte 0x1 + .byte 0x5 + .4byte 0x34 + .uleb128 0x9 + .byte 0x3 + .8byte g_nopic + .uleb128 0x3 + .byte 0x4 + .byte 0x5 + .ascii "int\000" + .byte 0 + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .uleb128 0x1 + .uleb128 0x11 + .byte 0x1 + .uleb128 0x25 + .uleb128 0xe + .uleb128 0x13 + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x1b + .uleb128 0xe + .uleb128 0x10 + .uleb128 0x17 + .byte 0 + .byte 0 + .uleb128 0x2 + .uleb128 0x34 + .byte 0 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x2 + .uleb128 0x18 + .byte 0 + .byte 0 + .uleb128 0x3 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0x8 + .byte 0 + .byte 0 + .byte 0 + .section .debug_aranges,"",@progbits + .4byte 0x1c + .2byte 0x2 + .4byte .Ldebug_info0 + .byte 0x8 + .byte 0 + .2byte 0 + .2byte 0 + .8byte 0 + .8byte 0 + .section .debug_line,"",@progbits +.Ldebug_line0: + .section .debug_str,"MS",@progbits,1 +.LASF1: + .ascii "libnopic-global.c\000" +.LASF0: + .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" + .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" + .ascii "O0 -fPIC\000" +.LASF2: + .ascii "/home/liuzhensong/test/ld/nopic/test/global_var\000" +.LASF3: + .ascii "g_nopic\000" + .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" + .section .note.GNU-stack,"",@progbits diff --git a/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d new file mode 100644 index 00000000..29f2d3f3 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.d @@ -0,0 +1,10 @@ +#as: +#ld: -shared -z combreloc +#objdump: -R + +.*: +file format .* + +DYNAMIC RELOCATION RECORDS +OFFSET +TYPE +VALUE +[[:xdigit:]]+ R_LARCH_IRELATIVE +\*ABS\*\+0x[[:xdigit:]]+ +[[:xdigit:]]+ R_LARCH_64 +test diff --git a/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.s b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.s new file mode 100644 index 00000000..77c48746 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/local-ifunc-reloc.s @@ -0,0 +1,28 @@ +.text +.align 2 + +.local ifunc +.type ifunc, @gnu_indirect_function +.set ifunc, resolver + +resolver: + la.local $a0, impl + jr $ra + +impl: + li.w $a0, 42 + jr $ra + +.global test +.type test, @function +test: + move $s0, $ra + bl ifunc + xori $a0, $a0, 42 + jr $s0 + +.data +.global ptr +.type ptr, @object +ptr: + .dword test diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.d b/ld/testsuite/ld-loongarch-elf/macro_op.d new file mode 100644 index 00000000..a1c64fcf --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/macro_op.d @@ -0,0 +1,164 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+14:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+1c:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+20:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+24:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+24:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+28:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+28:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+2c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+2c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+30:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+34:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+34:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+38:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+38:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+3c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+40:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+40:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+44:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+44:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+48:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+48:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+4c:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+54:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+5c:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+60:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+60:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+64:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+64:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+68:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+6c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+6c:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+70:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+70:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+74:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+74:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+78:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+78:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+7c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+7c:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+80:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+80:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+84:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+88:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+88:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+8c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+8c:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+90:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+90:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+94:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+94:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+98:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+98:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+9c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+9c:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+a0:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+a4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+a4:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* +[ ]+a4:[ ]+R_LARCH_ABS_HI20[ ]+.text +[ ]+a8:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+a8:[ ]+R_LARCH_ABS_LO12[ ]+.text +[ ]+ac:[ ]+16000004[ ]+lu32i.d[ ]+\$a0,[ ]+0 +[ ]+ac:[ ]+R_LARCH_ABS64_LO20[ ]+.text +[ ]+b0:[ ]+03000084[ ]+lu52i.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+b0:[ ]+R_LARCH_ABS64_HI12[ ]+.text +[ ]+b4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+b4:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+b8:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+b8:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+bc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+bc:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+c0:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+c0:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+c4:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+c4:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+c8:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+c8:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+cc:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+cc:[ ]+R_LARCH_PCALA64_LO20[ ]+.text +[ ]+d0:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+d0:[ ]+R_LARCH_PCALA64_HI12[ ]+.text +[ ]+d4:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+d8:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+d8:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+dc:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+dc:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+e0:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+e0:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+e4:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+e4:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+e8:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+e8:[ ]+R_LARCH_GOT64_PC_LO20[ ]+.text +[ ]+ec:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+ec:[ ]+R_LARCH_GOT64_PC_HI12[ ]+.text +[ ]+f0:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+f4:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+f4:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+f8:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+f8:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+fc:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+fc:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+100:[ ]+28c00084[ ]+ld.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+100:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+104:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+104:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+108:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+108:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+10c:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+10c:[ ]+R_LARCH_TLS_IE64_PC_LO20[ ]+TLS1 +[ ]+110:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+110:[ ]+R_LARCH_TLS_IE64_PC_HI12[ ]+TLS1 +[ ]+114:[ ]+380c1484[ ]+ldx.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+118:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+118:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+11c:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+11c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+120:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+120:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+124:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+124:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+128:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+128:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 +[ ]+12c:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+12c:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 +[ ]+130:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 +[ ]+134:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+134:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+138:[ ]+02c00084[ ]+addi.d[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+138:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+13c:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+13c:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+140:[ ]+02c00005[ ]+addi.d[ ]+\$a1,[ ]+\$zero,[ ]+0 +[ ]+140:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+144:[ ]+16000005[ ]+lu32i.d[ ]+\$a1,[ ]+0 +[ ]+144:[ ]+R_LARCH_GOT64_PC_LO20[ ]+TLS1 +[ ]+148:[ ]+030000a5[ ]+lu52i.d[ ]+\$a1,[ ]+\$a1,[ ]+0 +[ ]+148:[ ]+R_LARCH_GOT64_PC_HI12[ ]+TLS1 +[ ]+14c:[ ]+00109484[ ]+add.d[ ]+\$a0,[ ]+\$a0,[ ]+\$a1 diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.s b/ld/testsuite/ld-loongarch-elf/macro_op.s new file mode 100644 index 00000000..5cf066c3 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/macro_op.s @@ -0,0 +1,30 @@ +.L1: +li.w $r4, 0 +li.w $r4, 0xffffffff +li.d $r4, 0 +li.d $r4, 0xffffffffffffffff +la $r4, .L1 +la.global $r4, .L1 +la.global $r4, $r5, .L1 +la.global $r4, .L1 +la.global $r4, $r5, .L1 +la.global $r4, .L1 +la.global $r4, $r5, .L1 +la.local $r4, .L1 +la.local $r4, $r5, .L1 +la.local $r4, .L1 +la.local $r4, $r5, .L1 +la.abs $r4, .L1 +la.pcrel $r4, .L1 +la.pcrel $r4, .L1 +la.pcrel $r4, $r5, .L1 +la.got $r4, .L1 +la.got $r4, $r5, .L1 + +la.tls.le $r4, TLS1 +la.tls.ie $r4, TLS1 +la.tls.ie $r4, $r5, TLS1 +la.tls.ld $r4, TLS1 +la.tls.ld $r4, $r5, TLS1 +la.tls.gd $r4, TLS1 +la.tls.gd $r4, $r5, TLS1 diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.d b/ld/testsuite/ld-loongarch-elf/macro_op_32.d new file mode 100644 index 00000000..145d852b --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.d @@ -0,0 +1,55 @@ +#as: +#objdump: -dr +#skip: loongarch64-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +00000000.* <.text>: +[ ]+0:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+4:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+8:[ ]+00150004[ ]+move[ ]+\$a0,[ ]+\$zero +[ ]+c:[ ]+02bffc04[ ]+addi.w[ ]+\$a0,[ ]+\$zero,[ ]+-1\(0xfff\) +[ ]+10:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+10:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+14:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+14:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+18:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+18:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+1c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+1c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+20:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+20:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+24:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+24:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+28:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+28:[ ]+R_LARCH_MARK_LA[ ]+\*ABS\* +[ ]+28:[ ]+R_LARCH_ABS_HI20[ ]+.text +[ ]+2c:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+2c:[ ]+R_LARCH_ABS_LO12[ ]+.text +[ ]+30:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+30:[ ]+R_LARCH_PCALA_HI20[ ]+.text +[ ]+34:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+34:[ ]+R_LARCH_PCALA_LO12[ ]+.text +[ ]+38:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+38:[ ]+R_LARCH_GOT_PC_HI20[ ]+.text +[ ]+3c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+3c:[ ]+R_LARCH_GOT_PC_LO12[ ]+.text +[ ]+40:[ ]+14000004[ ]+lu12i.w[ ]+\$a0,[ ]+0 +[ ]+40:[ ]+R_LARCH_TLS_LE_HI20[ ]+TLS1 +[ ]+44:[ ]+03800084[ ]+ori[ ]+\$a0,[ ]+\$a0,[ ]+0x0 +[ ]+44:[ ]+R_LARCH_TLS_LE_LO12[ ]+TLS1 +[ ]+48:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+48:[ ]+R_LARCH_TLS_IE_PC_HI20[ ]+TLS1 +[ ]+4c:[ ]+28800084[ ]+ld.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+4c:[ ]+R_LARCH_TLS_IE_PC_LO12[ ]+TLS1 +[ ]+50:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+50:[ ]+R_LARCH_TLS_LD_PC_HI20[ ]+TLS1 +[ ]+54:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+54:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 +[ ]+58:[ ]+1a000004[ ]+pcalau12i[ ]+\$a0,[ ]+0 +[ ]+58:[ ]+R_LARCH_TLS_GD_PC_HI20[ ]+TLS1 +[ ]+5c:[ ]+02800084[ ]+addi.w[ ]+\$a0,[ ]+\$a0,[ ]+0 +[ ]+5c:[ ]+R_LARCH_GOT_PC_LO12[ ]+TLS1 diff --git a/ld/testsuite/ld-loongarch-elf/macro_op_32.s b/ld/testsuite/ld-loongarch-elf/macro_op_32.s new file mode 100644 index 00000000..7f19565e --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/macro_op_32.s @@ -0,0 +1,16 @@ +.L1: + li.w $r4, 0 + li.w $r4, 0xffffffff + li.w $r4, 0 + li.w $r4, 0xffffffff + la $r4, .L1 + la.global $r4, .L1 + la.local $r4, .L1 + la.abs $r4, .L1 + la.pcrel $r4, .L1 + la.got $r4, .L1 + + la.tls.le $r4, TLS1 + la.tls.ie $r4, TLS1 + la.tls.ld $r4, TLS1 + la.tls.gd $r4, TLS1 diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global-so.rd b/ld/testsuite/ld-loongarch-elf/nopic-global-so.rd new file mode 100644 index 00000000..2bcc718a --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-global-so.rd @@ -0,0 +1,5 @@ +Relocation section '.rela.dyn'.* + +Offset +Info +Type +Sym\. +Value +Sym\. +Name +\+ +Addend +#... +[0-9a-f]+ +[0-9a-f]+ +R_LARCH_64 +[0-9a-f]+ +g_nopic +\+ +[0-9] +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global-so.sd b/ld/testsuite/ld-loongarch-elf/nopic-global-so.sd new file mode 100644 index 00000000..c0e7a66b --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-global-so.sd @@ -0,0 +1,10 @@ +Symbol table '\.dynsym' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]+: +[0-9a-f]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +UND+ +g_nopic +#... +Symbol table '\.symtab' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]+: +[0-9a-f]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +UND+ +g_nopic +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.out b/ld/testsuite/ld-loongarch-elf/nopic-global.out new file mode 100644 index 00000000..3a179f66 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-global.out @@ -0,0 +1 @@ +0x12345678 diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.s b/ld/testsuite/ld-loongarch-elf/nopic-global.s new file mode 100644 index 00000000..189fa675 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-global.s @@ -0,0 +1,373 @@ + .file "nopic-global.c" + .text +.Ltext0: + .file 1 "nopic-global.c" + .section .rodata + .align 3 +.LC0: + .ascii "0x%x\012\000" + .text + .align 2 + .globl main + .type main, @function +main: +.LFB6 = . + .loc 1 7 1 + .cfi_startproc + addi.d $r3,$r3,-16 + .cfi_def_cfa_offset 16 + st.d $r1,$r3,8 + stptr.d $r22,$r3,0 + .cfi_offset 1, -8 + .cfi_offset 22, -16 + addi.d $r22,$r3,16 + .cfi_def_cfa 22, 0 + .loc 1 8 15 + pcalau12i $r12,%got_pc_hi20(g_nopic) + ld.d $r12,$r12,%got_pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + .loc 1 8 6 + or $r13,$r12,$r0 + lu12i.w $r12,305418240>>12 # 0x12345000 + ori $r12,$r12,1656 + bne $r13,$r12,.L2 + .loc 1 9 5 + pcalau12i $r12,%got_pc_hi20(g_nopic) + ld.d $r12,$r12,%got_pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + or $r5,$r12,$r0 + pcalau12i $r12,%pc_hi20(.LC0) + addi.d $r4,$r12,%pc_lo12(.LC0) + bl %plt(printf) + b .L5 +.L2: + .loc 1 11 5 + bl %plt(abort) +.L5: + .loc 1 12 10 + or $r12,$r0,$r0 + .loc 1 13 1 + or $r4,$r12,$r0 + ld.d $r1,$r3,8 + .cfi_restore 1 + ldptr.d $r22,$r3,0 + .cfi_restore 22 + addi.d $r3,$r3,16 + .cfi_def_cfa_register 3 + jr $r1 + .cfi_endproc +.LFE6: + .size main, .-main +.Letext0: + .file 2 "/usr/include/stdlib.h" + .file 3 "/usr/include/stdio.h" + .section .debug_info,"",@progbits +.Ldebug_info0: + .4byte 0xce + .2byte 0x5 + .byte 0x1 + .byte 0x8 + .4byte .Ldebug_abbrev0 + .uleb128 0x2 + .4byte .LASF10 + .byte 0x1d + .4byte .LASF11 + .4byte .LASF12 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .4byte .Ldebug_line0 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF0 + .uleb128 0x1 + .byte 0x1 + .byte 0x8 + .4byte .LASF1 + .uleb128 0x1 + .byte 0x2 + .byte 0x7 + .4byte .LASF2 + .uleb128 0x1 + .byte 0x4 + .byte 0x7 + .4byte .LASF3 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF4 + .uleb128 0x1 + .byte 0x2 + .byte 0x5 + .4byte .LASF5 + .uleb128 0x3 + .byte 0x4 + .byte 0x5 + .ascii "int\000" + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF6 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF7 + .uleb128 0x4 + .4byte 0x66 + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF8 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF9 + .uleb128 0x5 + .4byte .LASF13 + .byte 0x1 + .byte 0x4 + .byte 0xc + .4byte 0x58 + .uleb128 0x6 + .4byte .LASF14 + .byte 0x2 + .2byte 0x256 + .byte 0xd + .uleb128 0x7 + .4byte .LASF15 + .byte 0x3 + .2byte 0x164 + .byte 0xc + .4byte 0x58 + .4byte 0xad + .uleb128 0x8 + .4byte 0xad + .uleb128 0x9 + .byte 0 + .uleb128 0xa + .byte 0x8 + .4byte 0x6d + .uleb128 0xb + .4byte .LASF16 + .byte 0x1 + .byte 0x6 + .byte 0x5 + .4byte 0x58 + .8byte .LFB6 + .8byte .LFE6-.LFB6 + .uleb128 0x1 + .byte 0x9c + .byte 0 + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .uleb128 0x1 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .byte 0 + .byte 0 + .uleb128 0x2 + .uleb128 0x11 + .byte 0x1 + .uleb128 0x25 + .uleb128 0xe + .uleb128 0x13 + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x1b + .uleb128 0xe + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x10 + .uleb128 0x17 + .byte 0 + .byte 0 + .uleb128 0x3 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0x8 + .byte 0 + .byte 0 + .uleb128 0x4 + .uleb128 0x26 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x5 + .uleb128 0x34 + .byte 0 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3c + .uleb128 0x19 + .byte 0 + .byte 0 + .uleb128 0x6 + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x87 + .uleb128 0x19 + .uleb128 0x3c + .uleb128 0x19 + .byte 0 + .byte 0 + .uleb128 0x7 + .uleb128 0x2e + .byte 0x1 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3c + .uleb128 0x19 + .uleb128 0x1 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x8 + .uleb128 0x5 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x9 + .uleb128 0x18 + .byte 0 + .byte 0 + .byte 0 + .uleb128 0xa + .uleb128 0xf + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0xb + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x40 + .uleb128 0x18 + .uleb128 0x7c + .uleb128 0x19 + .byte 0 + .byte 0 + .byte 0 + .section .debug_aranges,"",@progbits + .4byte 0x2c + .2byte 0x2 + .4byte .Ldebug_info0 + .byte 0x8 + .byte 0 + .2byte 0 + .2byte 0 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .8byte 0 + .8byte 0 + .section .debug_line,"",@progbits +.Ldebug_line0: + .section .debug_str,"MS",@progbits,1 +.LASF8: + .ascii "long long int\000" +.LASF3: + .ascii "unsigned int\000" +.LASF11: + .ascii "nopic-global.c\000" +.LASF0: + .ascii "long unsigned int\000" +.LASF9: + .ascii "long long unsigned int\000" +.LASF10: + .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" + .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" + .ascii "O0\000" +.LASF1: + .ascii "unsigned char\000" +.LASF12: + .ascii "/home/liuzhensong/test/ld/nopic/test/global_var\000" +.LASF7: + .ascii "char\000" +.LASF6: + .ascii "long int\000" +.LASF13: + .ascii "g_nopic\000" +.LASF2: + .ascii "short unsigned int\000" +.LASF15: + .ascii "printf\000" +.LASF16: + .ascii "main\000" +.LASF14: + .ascii "abort\000" +.LASF5: + .ascii "short int\000" +.LASF4: + .ascii "signed char\000" + .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" + .section .note.GNU-stack,"",@progbits diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.sd b/ld/testsuite/ld-loongarch-elf/nopic-global.sd new file mode 100644 index 00000000..605206a2 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-global.sd @@ -0,0 +1,5 @@ +Symbol table '\.symtab' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]: +[0-9]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +[0-9] +g_nopic +#xpass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-global.xd b/ld/testsuite/ld-loongarch-elf/nopic-global.xd new file mode 100644 index 00000000..d0130663 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-global.xd @@ -0,0 +1,3 @@ +Hex dump of section '\.data': + +0x[0-9]+ +78563412.* +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.out b/ld/testsuite/ld-loongarch-elf/nopic-local.out new file mode 100644 index 00000000..3a179f66 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-local.out @@ -0,0 +1 @@ +0x12345678 diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.rd b/ld/testsuite/ld-loongarch-elf/nopic-local.rd new file mode 100644 index 00000000..e69de29b diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.s b/ld/testsuite/ld-loongarch-elf/nopic-local.s new file mode 100644 index 00000000..4a496f03 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-local.s @@ -0,0 +1,383 @@ + .file "nopic-local.c" + .text +.Ltext0: + .file 1 "nopic-local.c" + .globl g_nopic + .data + .align 2 + .type g_nopic, @object + .size g_nopic, 4 +g_nopic: + .word 305419896 + .section .rodata + .align 3 +.LC0: + .ascii "0x%x\012\000" + .text + .align 2 + .globl main + .type main, @function +main: +.LFB6 = . + .loc 1 7 1 + .cfi_startproc + addi.d $r3,$r3,-16 + .cfi_def_cfa_offset 16 + st.d $r1,$r3,8 + stptr.d $r22,$r3,0 + .cfi_offset 1, -8 + .cfi_offset 22, -16 + addi.d $r22,$r3,16 + .cfi_def_cfa 22, 0 + .loc 1 8 15 + pcalau12i $r12,%pc_hi20(g_nopic) + addi.d $r12,$r12,%pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + .loc 1 8 6 + or $r13,$r12,$r0 + lu12i.w $r12,305418240>>12 # 0x12345000 + ori $r12,$r12,1656 + bne $r13,$r12,.L2 + .loc 1 9 5 + pcalau12i $r12,%pc_hi20(g_nopic) + addi.d $r12,$r12,%pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + or $r5,$r12,$r0 + pcalau12i $r12,%pc_hi20(.LC0) + addi.d $r4,$r12,%pc_lo12(.LC0) + bl %plt(printf) + b .L5 +.L2: + .loc 1 11 5 + bl %plt(abort) +.L5: + .loc 1 12 10 + or $r12,$r0,$r0 + .loc 1 13 1 + or $r4,$r12,$r0 + ld.d $r1,$r3,8 + .cfi_restore 1 + ldptr.d $r22,$r3,0 + .cfi_restore 22 + addi.d $r3,$r3,16 + .cfi_def_cfa_register 3 + jr $r1 + .cfi_endproc +.LFE6: + .size main, .-main +.Letext0: + .file 2 "/usr/include/stdlib.h" + .file 3 "/usr/include/stdio.h" + .section .debug_info,"",@progbits +.Ldebug_info0: + .4byte 0xd8 + .2byte 0x5 + .byte 0x1 + .byte 0x8 + .4byte .Ldebug_abbrev0 + .uleb128 0x2 + .4byte .LASF10 + .byte 0x1d + .4byte .LASF11 + .4byte .LASF12 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .4byte .Ldebug_line0 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF0 + .uleb128 0x1 + .byte 0x1 + .byte 0x8 + .4byte .LASF1 + .uleb128 0x1 + .byte 0x2 + .byte 0x7 + .4byte .LASF2 + .uleb128 0x1 + .byte 0x4 + .byte 0x7 + .4byte .LASF3 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF4 + .uleb128 0x1 + .byte 0x2 + .byte 0x5 + .4byte .LASF5 + .uleb128 0x3 + .byte 0x4 + .byte 0x5 + .ascii "int\000" + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF6 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF7 + .uleb128 0x4 + .4byte 0x66 + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF8 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF9 + .uleb128 0x5 + .4byte .LASF13 + .byte 0x1 + .byte 0x4 + .byte 0x5 + .4byte 0x58 + .uleb128 0x9 + .byte 0x3 + .8byte g_nopic + .uleb128 0x6 + .4byte .LASF14 + .byte 0x2 + .2byte 0x256 + .byte 0xd + .uleb128 0x7 + .4byte .LASF15 + .byte 0x3 + .2byte 0x164 + .byte 0xc + .4byte 0x58 + .4byte 0xb7 + .uleb128 0x8 + .4byte 0xb7 + .uleb128 0x9 + .byte 0 + .uleb128 0xa + .byte 0x8 + .4byte 0x6d + .uleb128 0xb + .4byte .LASF16 + .byte 0x1 + .byte 0x6 + .byte 0x5 + .4byte 0x58 + .8byte .LFB6 + .8byte .LFE6-.LFB6 + .uleb128 0x1 + .byte 0x9c + .byte 0 + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .uleb128 0x1 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .byte 0 + .byte 0 + .uleb128 0x2 + .uleb128 0x11 + .byte 0x1 + .uleb128 0x25 + .uleb128 0xe + .uleb128 0x13 + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x1b + .uleb128 0xe + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x10 + .uleb128 0x17 + .byte 0 + .byte 0 + .uleb128 0x3 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0x8 + .byte 0 + .byte 0 + .uleb128 0x4 + .uleb128 0x26 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x5 + .uleb128 0x34 + .byte 0 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x2 + .uleb128 0x18 + .byte 0 + .byte 0 + .uleb128 0x6 + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x87 + .uleb128 0x19 + .uleb128 0x3c + .uleb128 0x19 + .byte 0 + .byte 0 + .uleb128 0x7 + .uleb128 0x2e + .byte 0x1 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3c + .uleb128 0x19 + .uleb128 0x1 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x8 + .uleb128 0x5 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x9 + .uleb128 0x18 + .byte 0 + .byte 0 + .byte 0 + .uleb128 0xa + .uleb128 0xf + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0xb + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x40 + .uleb128 0x18 + .uleb128 0x7c + .uleb128 0x19 + .byte 0 + .byte 0 + .byte 0 + .section .debug_aranges,"",@progbits + .4byte 0x2c + .2byte 0x2 + .4byte .Ldebug_info0 + .byte 0x8 + .byte 0 + .2byte 0 + .2byte 0 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .8byte 0 + .8byte 0 + .section .debug_line,"",@progbits +.Ldebug_line0: + .section .debug_str,"MS",@progbits,1 +.LASF8: + .ascii "long long int\000" +.LASF3: + .ascii "unsigned int\000" +.LASF16: + .ascii "main\000" +.LASF0: + .ascii "long unsigned int\000" +.LASF9: + .ascii "long long unsigned int\000" +.LASF11: + .ascii "nopic-local.c\000" +.LASF10: + .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" + .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" + .ascii "O0\000" +.LASF1: + .ascii "unsigned char\000" +.LASF7: + .ascii "char\000" +.LASF6: + .ascii "long int\000" +.LASF13: + .ascii "g_nopic\000" +.LASF2: + .ascii "short unsigned int\000" +.LASF15: + .ascii "printf\000" +.LASF12: + .ascii "/home/liuzhensong/test/ld/nopic/test/local_var\000" +.LASF14: + .ascii "abort\000" +.LASF5: + .ascii "short int\000" +.LASF4: + .ascii "signed char\000" + .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" + .section .note.GNU-stack,"",@progbits diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.sd b/ld/testsuite/ld-loongarch-elf/nopic-local.sd new file mode 100644 index 00000000..2dd16be5 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-local.sd @@ -0,0 +1,5 @@ +Symbol table '\.symtab' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]: +[0-9]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +[0-9] +g_nopic +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-local.xd b/ld/testsuite/ld-loongarch-elf/nopic-local.xd new file mode 100644 index 00000000..d0130663 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-local.xd @@ -0,0 +1,3 @@ +Hex dump of section '\.data': + +0x[0-9]+ +78563412.* +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd new file mode 100644 index 00000000..2c32a543 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.rd @@ -0,0 +1,5 @@ +Relocation section '.rela.dyn'.* + +Offset +Info +Type +Sym\. +Value +Sym\. +Name +\+ +Addend +#... +[0-9a-f]+ +[0-9a-f]+ +R_LARCH_64 +[0-9a-f]+ +g_nopic +\+ +[0-9a-f] +#... diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd new file mode 100644 index 00000000..4745ff78 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global-so.sd @@ -0,0 +1,10 @@ +Symbol table '\.dynsym' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]+: +[0-9]+ +[0-9] +OBJECT +WEAK +DEFAULT +UND +g_nopic +#... +Symbol table '\.symtab' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]+: +[0-9]+ +[0-9] +OBJECT +WEAK +DEFAULT +UND +g_nopic +#... diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.out b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.out new file mode 100644 index 00000000..3a179f66 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.out @@ -0,0 +1 @@ +0x12345678 diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.s b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.s new file mode 100644 index 00000000..298780a3 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.s @@ -0,0 +1,374 @@ + .file "nopic-weak-global.c" + .text +.Ltext0: + .file 1 "nopic-weak-global.c" + .section .rodata + .align 3 +.LC0: + .ascii "0x%x\012\000" + .text + .align 2 + .globl main + .type main, @function +main: +.LFB6 = . + .loc 1 7 1 + .cfi_startproc + addi.d $r3,$r3,-16 + .cfi_def_cfa_offset 16 + st.d $r1,$r3,8 + stptr.d $r22,$r3,0 + .cfi_offset 1, -8 + .cfi_offset 22, -16 + addi.d $r22,$r3,16 + .cfi_def_cfa 22, 0 + .loc 1 8 15 + pcalau12i $r12,%got_pc_hi20(g_nopic) + ld.d $r12,$r12,%got_pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + .loc 1 8 6 + or $r13,$r12,$r0 + lu12i.w $r12,305418240>>12 # 0x12345000 + ori $r12,$r12,1656 + bne $r13,$r12,.L2 + .loc 1 9 5 + pcalau12i $r12,%got_pc_hi20(g_nopic) + ld.d $r12,$r12,%got_pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + or $r5,$r12,$r0 + pcalau12i $r12,%pc_hi20(.LC0) + addi.d $r4,$r12,%pc_lo12(.LC0) + bl %plt(printf) + b .L5 +.L2: + .loc 1 11 5 + bl %plt(abort) +.L5: + .loc 1 12 10 + or $r12,$r0,$r0 + .loc 1 13 1 + or $r4,$r12,$r0 + ld.d $r1,$r3,8 + .cfi_restore 1 + ldptr.d $r22,$r3,0 + .cfi_restore 22 + addi.d $r3,$r3,16 + .cfi_def_cfa_register 3 + jr $r1 + .cfi_endproc +.LFE6: + .size main, .-main + .weak g_nopic +.Letext0: + .file 2 "/usr/include/stdlib.h" + .file 3 "/usr/include/stdio.h" + .section .debug_info,"",@progbits +.Ldebug_info0: + .4byte 0xce + .2byte 0x5 + .byte 0x1 + .byte 0x8 + .4byte .Ldebug_abbrev0 + .uleb128 0x2 + .4byte .LASF10 + .byte 0x1d + .4byte .LASF11 + .4byte .LASF12 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .4byte .Ldebug_line0 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF0 + .uleb128 0x1 + .byte 0x1 + .byte 0x8 + .4byte .LASF1 + .uleb128 0x1 + .byte 0x2 + .byte 0x7 + .4byte .LASF2 + .uleb128 0x1 + .byte 0x4 + .byte 0x7 + .4byte .LASF3 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF4 + .uleb128 0x1 + .byte 0x2 + .byte 0x5 + .4byte .LASF5 + .uleb128 0x3 + .byte 0x4 + .byte 0x5 + .ascii "int\000" + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF6 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF7 + .uleb128 0x4 + .4byte 0x66 + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF8 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF9 + .uleb128 0x5 + .4byte .LASF13 + .byte 0x1 + .byte 0x4 + .byte 0x22 + .4byte 0x58 + .uleb128 0x6 + .4byte .LASF14 + .byte 0x2 + .2byte 0x256 + .byte 0xd + .uleb128 0x7 + .4byte .LASF15 + .byte 0x3 + .2byte 0x164 + .byte 0xc + .4byte 0x58 + .4byte 0xad + .uleb128 0x8 + .4byte 0xad + .uleb128 0x9 + .byte 0 + .uleb128 0xa + .byte 0x8 + .4byte 0x6d + .uleb128 0xb + .4byte .LASF16 + .byte 0x1 + .byte 0x6 + .byte 0x5 + .4byte 0x58 + .8byte .LFB6 + .8byte .LFE6-.LFB6 + .uleb128 0x1 + .byte 0x9c + .byte 0 + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .uleb128 0x1 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .byte 0 + .byte 0 + .uleb128 0x2 + .uleb128 0x11 + .byte 0x1 + .uleb128 0x25 + .uleb128 0xe + .uleb128 0x13 + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x1b + .uleb128 0xe + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x10 + .uleb128 0x17 + .byte 0 + .byte 0 + .uleb128 0x3 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0x8 + .byte 0 + .byte 0 + .uleb128 0x4 + .uleb128 0x26 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x5 + .uleb128 0x34 + .byte 0 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3c + .uleb128 0x19 + .byte 0 + .byte 0 + .uleb128 0x6 + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x87 + .uleb128 0x19 + .uleb128 0x3c + .uleb128 0x19 + .byte 0 + .byte 0 + .uleb128 0x7 + .uleb128 0x2e + .byte 0x1 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3c + .uleb128 0x19 + .uleb128 0x1 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x8 + .uleb128 0x5 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x9 + .uleb128 0x18 + .byte 0 + .byte 0 + .byte 0 + .uleb128 0xa + .uleb128 0xf + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0xb + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x40 + .uleb128 0x18 + .uleb128 0x7c + .uleb128 0x19 + .byte 0 + .byte 0 + .byte 0 + .section .debug_aranges,"",@progbits + .4byte 0x2c + .2byte 0x2 + .4byte .Ldebug_info0 + .byte 0x8 + .byte 0 + .2byte 0 + .2byte 0 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .8byte 0 + .8byte 0 + .section .debug_line,"",@progbits +.Ldebug_line0: + .section .debug_str,"MS",@progbits,1 +.LASF8: + .ascii "long long int\000" +.LASF3: + .ascii "unsigned int\000" +.LASF16: + .ascii "main\000" +.LASF0: + .ascii "long unsigned int\000" +.LASF9: + .ascii "long long unsigned int\000" +.LASF10: + .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" + .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" + .ascii "O0\000" +.LASF1: + .ascii "unsigned char\000" +.LASF12: + .ascii "/home/liuzhensong/test/ld/nopic/test/global_var\000" +.LASF7: + .ascii "char\000" +.LASF6: + .ascii "long int\000" +.LASF13: + .ascii "g_nopic\000" +.LASF2: + .ascii "short unsigned int\000" +.LASF15: + .ascii "printf\000" +.LASF14: + .ascii "abort\000" +.LASF5: + .ascii "short int\000" +.LASF11: + .ascii "nopic-weak-global.c\000" +.LASF4: + .ascii "signed char\000" + .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" + .section .note.GNU-stack,"",@progbits diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd new file mode 100644 index 00000000..f4634d20 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.sd @@ -0,0 +1,5 @@ +#xfail: *-*-* +Symbol table '\.symtab' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]: +[0-9]+ +[0-9] +OBJECT +GLOBAL +DEFAULT +[0-9] +g_nopic diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd new file mode 100644 index 00000000..d0130663 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-global.xd @@ -0,0 +1,3 @@ +Hex dump of section '\.data': + +0x[0-9]+ +78563412.* +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.out b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.out new file mode 100644 index 00000000..3a179f66 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.out @@ -0,0 +1 @@ +0x12345678 diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.rd b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.rd new file mode 100644 index 00000000..e69de29b diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.s b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.s new file mode 100644 index 00000000..00a4b616 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.s @@ -0,0 +1,383 @@ + .file "nopic-weak-local.c" + .text +.Ltext0: + .file 1 "nopic-weak-local.c" + .weak g_nopic + .data + .align 2 + .type g_nopic, @object + .size g_nopic, 4 +g_nopic: + .word 305419896 + .section .rodata + .align 3 +.LC0: + .ascii "0x%x\012\000" + .text + .align 2 + .globl main + .type main, @function +main: +.LFB6 = . + .loc 1 7 1 + .cfi_startproc + addi.d $r3,$r3,-16 + .cfi_def_cfa_offset 16 + st.d $r1,$r3,8 + stptr.d $r22,$r3,0 + .cfi_offset 1, -8 + .cfi_offset 22, -16 + addi.d $r22,$r3,16 + .cfi_def_cfa 22, 0 + .loc 1 8 15 + pcalau12i $r12,%pc_hi20(g_nopic) + addi.d $r12,$r12,%pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + .loc 1 8 6 + or $r13,$r12,$r0 + lu12i.w $r12,305418240>>12 # 0x12345000 + ori $r12,$r12,1656 + bne $r13,$r12,.L2 + .loc 1 9 5 + pcalau12i $r12,%pc_hi20(g_nopic) + addi.d $r12,$r12,%pc_lo12(g_nopic) + ldptr.w $r12,$r12,0 + or $r5,$r12,$r0 + pcalau12i $r12,%pc_hi20(.LC0) + addi.d $r4,$r12,%pc_lo12(.LC0) + bl %plt(printf) + b .L5 +.L2: + .loc 1 11 5 + bl %plt(abort) +.L5: + .loc 1 12 10 + or $r12,$r0,$r0 + .loc 1 13 1 + or $r4,$r12,$r0 + ld.d $r1,$r3,8 + .cfi_restore 1 + ldptr.d $r22,$r3,0 + .cfi_restore 22 + addi.d $r3,$r3,16 + .cfi_def_cfa_register 3 + jr $r1 + .cfi_endproc +.LFE6: + .size main, .-main +.Letext0: + .file 2 "/usr/include/stdlib.h" + .file 3 "/usr/include/stdio.h" + .section .debug_info,"",@progbits +.Ldebug_info0: + .4byte 0xd8 + .2byte 0x5 + .byte 0x1 + .byte 0x8 + .4byte .Ldebug_abbrev0 + .uleb128 0x2 + .4byte .LASF10 + .byte 0x1d + .4byte .LASF11 + .4byte .LASF12 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .4byte .Ldebug_line0 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF0 + .uleb128 0x1 + .byte 0x1 + .byte 0x8 + .4byte .LASF1 + .uleb128 0x1 + .byte 0x2 + .byte 0x7 + .4byte .LASF2 + .uleb128 0x1 + .byte 0x4 + .byte 0x7 + .4byte .LASF3 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF4 + .uleb128 0x1 + .byte 0x2 + .byte 0x5 + .4byte .LASF5 + .uleb128 0x3 + .byte 0x4 + .byte 0x5 + .ascii "int\000" + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF6 + .uleb128 0x1 + .byte 0x1 + .byte 0x6 + .4byte .LASF7 + .uleb128 0x4 + .4byte 0x66 + .uleb128 0x1 + .byte 0x8 + .byte 0x5 + .4byte .LASF8 + .uleb128 0x1 + .byte 0x8 + .byte 0x7 + .4byte .LASF9 + .uleb128 0x5 + .4byte .LASF13 + .byte 0x1 + .byte 0x4 + .byte 0x1b + .4byte 0x58 + .uleb128 0x9 + .byte 0x3 + .8byte g_nopic + .uleb128 0x6 + .4byte .LASF14 + .byte 0x2 + .2byte 0x256 + .byte 0xd + .uleb128 0x7 + .4byte .LASF15 + .byte 0x3 + .2byte 0x164 + .byte 0xc + .4byte 0x58 + .4byte 0xb7 + .uleb128 0x8 + .4byte 0xb7 + .uleb128 0x9 + .byte 0 + .uleb128 0xa + .byte 0x8 + .4byte 0x6d + .uleb128 0xb + .4byte .LASF16 + .byte 0x1 + .byte 0x6 + .byte 0x5 + .4byte 0x58 + .8byte .LFB6 + .8byte .LFE6-.LFB6 + .uleb128 0x1 + .byte 0x9c + .byte 0 + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .uleb128 0x1 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .byte 0 + .byte 0 + .uleb128 0x2 + .uleb128 0x11 + .byte 0x1 + .uleb128 0x25 + .uleb128 0xe + .uleb128 0x13 + .uleb128 0xb + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x1b + .uleb128 0xe + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x10 + .uleb128 0x17 + .byte 0 + .byte 0 + .uleb128 0x3 + .uleb128 0x24 + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .uleb128 0x3 + .uleb128 0x8 + .byte 0 + .byte 0 + .uleb128 0x4 + .uleb128 0x26 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x5 + .uleb128 0x34 + .byte 0 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x2 + .uleb128 0x18 + .byte 0 + .byte 0 + .uleb128 0x6 + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x87 + .uleb128 0x19 + .uleb128 0x3c + .uleb128 0x19 + .byte 0 + .byte 0 + .uleb128 0x7 + .uleb128 0x2e + .byte 0x1 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0x5 + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x27 + .uleb128 0x19 + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x3c + .uleb128 0x19 + .uleb128 0x1 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x8 + .uleb128 0x5 + .byte 0 + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0x9 + .uleb128 0x18 + .byte 0 + .byte 0 + .byte 0 + .uleb128 0xa + .uleb128 0xf + .byte 0 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .byte 0 + .byte 0 + .uleb128 0xb + .uleb128 0x2e + .byte 0 + .uleb128 0x3f + .uleb128 0x19 + .uleb128 0x3 + .uleb128 0xe + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x39 + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x7 + .uleb128 0x40 + .uleb128 0x18 + .uleb128 0x7c + .uleb128 0x19 + .byte 0 + .byte 0 + .byte 0 + .section .debug_aranges,"",@progbits + .4byte 0x2c + .2byte 0x2 + .4byte .Ldebug_info0 + .byte 0x8 + .byte 0 + .2byte 0 + .2byte 0 + .8byte .Ltext0 + .8byte .Letext0-.Ltext0 + .8byte 0 + .8byte 0 + .section .debug_line,"",@progbits +.Ldebug_line0: + .section .debug_str,"MS",@progbits,1 +.LASF8: + .ascii "long long int\000" +.LASF3: + .ascii "unsigned int\000" +.LASF16: + .ascii "main\000" +.LASF0: + .ascii "long unsigned int\000" +.LASF9: + .ascii "long long unsigned int\000" +.LASF10: + .ascii "GNU C17 13.0.0 20220512 (experimental) -mabi=lp64d -marc" + .ascii "h=loongarch64 -mfpu=64 -mcmodel=normal -mtune=la464 -g -" + .ascii "O0\000" +.LASF1: + .ascii "unsigned char\000" +.LASF7: + .ascii "char\000" +.LASF6: + .ascii "long int\000" +.LASF11: + .ascii "nopic-weak-local.c\000" +.LASF13: + .ascii "g_nopic\000" +.LASF2: + .ascii "short unsigned int\000" +.LASF15: + .ascii "printf\000" +.LASF12: + .ascii "/home/liuzhensong/test/ld/nopic/test/local_var\000" +.LASF14: + .ascii "abort\000" +.LASF5: + .ascii "short int\000" +.LASF4: + .ascii "signed char\000" + .ident "GCC: (GNU) 13.0.0 20220512 (experimental)" + .section .note.GNU-stack,"",@progbits diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd new file mode 100644 index 00000000..b2970676 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.sd @@ -0,0 +1,5 @@ +Symbol table '\.symtab' contains [0-9]+ entries: + +Num: +Value +Size +Type +Bind +Vis +Ndx +Name +#... + +[0-9]: +[0-9]+ +[0-9] +OBJECT +WEAK +DEFAULT +[0-9] +g_nopic +#pass diff --git a/ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd new file mode 100644 index 00000000..d0130663 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/nopic-weak-local.xd @@ -0,0 +1,3 @@ +Hex dump of section '\.data': + +0x[0-9]+ +78563412.* +#pass diff --git a/ld/testsuite/ld-loongarch-elf/pic.exp b/ld/testsuite/ld-loongarch-elf/pic.exp new file mode 100644 index 00000000..40a5138a --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/pic.exp @@ -0,0 +1,202 @@ +# Expect script for LoongArch ELF linker tests +# Copyright (C) 2022 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +if ![istarget loongarch*-*-*] { + return +} + +global verbose +set old_verbose verbose +# set verbose 3 + +# Check to see if the C compiler works +if { ![check_compiler_available] } { + return +} + + +set testname "nopic link test pre build" +set pre_builds [list \ + [list \ + "$testname" \ + "-shared $NOSANITIZE_CFLAGS" \ + "-fPIC $NOSANITIZE_CFLAGS" \ + {libnopic-global.s} \ + {} \ + "libnopic-global.so" \ + ] \ +] + +# 0:name +# 1:ld or ar options +# 2:compile options +# 3:filenames of source files +# 4:action and options. +# 5:name of output file +# 6:language (optional) +run_cc_link_tests $pre_builds + + + +set testname "nopic link test" + +set link_tests [list \ + [list \ + "$testname readelf -s/-x nopic-local" \ + "-T pic.ld" "" \ + "" \ + { nopic-local.s } \ + [list \ + [list readelf -s nopic-local.sd] \ + [list readelf "-x .data" nopic-local.xd] \ + ] \ + "nopic-local" \ + ] \ + [list \ + "$testname readelf -s/-x nopic-weak-local" \ + "-T pic.ld" "" \ + "" \ + {nopic-weak-local.s} \ + [list \ + [list readelf -s nopic-weak-local.sd] \ + [list readelf "-x .data" nopic-weak-local.xd] \ + ] \ + "nopic-weak-local" \ + ] \ + [list \ + "$testname readelf -s/-x nopic-global" \ + "-T pic.ld" "" \ + "" \ + {nopic-global.s libnopic-global.s} \ + [list \ + [list readelf -s nopic-global.sd] \ + [list readelf "-x .data" nopic-global.xd] \ + ] \ + "nopic-global" \ + ] \ + [list \ + "$testname readelf -s/-r nopic-global-so" \ + "-L./tmpdir -lnopic-global -L/usr/lib -lc" "" \ + "" \ + {nopic-global.s} \ + [list \ + [list readelf -s nopic-global-so.sd] \ + [list readelf -r nopic-global-so.rd] \ + ] \ + "nopic-global-so" \ + ] \ + [list \ + "$testname readelf -s/-x nopic-weak-global" \ + "-T pic.ld" "" \ + "" \ + {nopic-weak-global.s libnopic-global.s} \ + [list \ + [list readelf -s nopic-weak-global.sd] \ + [list readelf "-x .data" nopic-weak-global.xd] \ + ] \ + "nopic-weak-global" \ + ] \ + [list \ + "$testname readelf -s/-x nopic-weak-global-so" \ + "-L./tmpdir -lnopic-global -L/usr/lib -lc" "" \ + "" \ + {nopic-weak-global.s} \ + [list \ + [list readelf -s nopic-weak-global-so.sd] \ + [list readelf -r nopic-weak-global-so.rd] \ + ] \ + "nopic-weak-global-so" \ + ] \ +] + +# 0:name +# 1:ld/ar leading options, placed before object files +# 2:ld/ar trailing options, placed after object files +# 3:assembler options +# 4:filenames of assembler files +# 5:list of actions, options and expected outputs. +# 6:name of output file +# 7:compiler flags (optional) +run_ld_link_tests $link_tests + +set testname "nopic link exec test" + +set link_exec_tests [list \ + [list \ + "$testname" \ + "" "" \ + { nopic-local.s } \ + "nopic-local" \ + "nopic-local.out" \ + ] \ + [list \ + "$testname" \ + "" "" \ + { nopic-weak-local.s } \ + "nopic-weak-local" \ + "nopic-weak-local.out" \ + ] \ + [list \ + "$testname" \ + "" "" \ + { nopic-global.s libnopic-global.s } \ + "nopic-global" \ + "nopic-global.out" \ + ] \ + [list \ + "$testname" \ + "-L./tmpdir -lnopic-global -lc -Wl,-rpath=./tmpdir -no-pie" "" \ + { nopic-global.s } \ + "nopic-global-so" \ + "nopic-global.out" \ + ] \ + [list \ + "$testname" \ + "" "" \ + { nopic-weak-global.s libnopic-global.s } \ + "nopic-weak-global" \ + "nopic-weak-global.out" \ + ] \ + [list \ + "$testname" \ + "-L./tmpdir -lnopic-global -lc -Wl,-rpath=./tmpdir -no-pie" "" \ + { nopic-weak-global.s } \ + "nopic-weak-global-so" \ + "nopic-weak-global.out" \ + ] \ +] + +# ldtests contains test-items with 3 items followed by 1 lists, 2 items +# and 3 optional items: +# 0:name +# 1:ld leading options, placed before object files +# 2:assembler options +# 3:filenames of source files +# 4:name of output file +# 5:expected output +# 6:compiler flags (optional) +# 7:language (optional) +# 8:linker warning (optional) +# 9:ld trailing options, placed after object files (optional) +run_ld_link_exec_tests $link_exec_tests + + +#set verbose old_verbose diff --git a/ld/testsuite/ld-loongarch-elf/pic.ld b/ld/testsuite/ld-loongarch-elf/pic.ld new file mode 100644 index 00000000..d57b37f5 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/pic.ld @@ -0,0 +1,18 @@ +SECTIONS +{ + .bss : { *(.dynbss) } + .got : { *(.got.plt) *(.got) } + .dynamic : { *(.dynamic) } + .data : { *(.data) } + .rela.dyn : { *(.rela.*) } + .interp : { *(.interp) } + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .debug_foo : { *(.debug_foo) } + .shstrtab : { *(.shstrtab) } + .symtab : { *(.symtab) } + .strtab : { *(.strtab) } + /DISCARD/ : { *(*) } +} diff --git a/ld/testsuite/ld-loongarch-elf/syscall-0.s b/ld/testsuite/ld-loongarch-elf/syscall-0.s new file mode 100644 index 00000000..f31e05f3 --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/syscall-0.s @@ -0,0 +1,9 @@ +.globl _start + +.section .text.hot +_start: + la.global $r20,cc + jirl $r1, $r20, 0 + addi.w $r11,$r0,93 + addi.w $r4,$r0,0 + syscall 0 diff --git a/ld/testsuite/ld-loongarch-elf/syscall-1.s b/ld/testsuite/ld-loongarch-elf/syscall-1.s new file mode 100644 index 00000000..e9acee9e --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/syscall-1.s @@ -0,0 +1,20 @@ +.globl cc + +.text +cc: + addi.d $r3,$r3,-16 + st.d $r1,$r3,8 + la.local $r5,.LC0 + addi.w $r4,$r0,0 + addi.w $r6, $r0,12 + addi.w $r11, $r0, 64 + syscall 0 + ld.d $r1,$r3,8 + addi.d $r3,$r3,16 + jirl $r0, $r1, 0 +.LC0: + .ascii "hello world\012\000" + .text + .align 2 + .globl world + .type world, @function diff --git a/ld/testsuite/ld-loongarch-elf/syscall.d b/ld/testsuite/ld-loongarch-elf/syscall.d new file mode 100644 index 00000000..b599277f --- /dev/null +++ b/ld/testsuite/ld-loongarch-elf/syscall.d @@ -0,0 +1,5 @@ +#name: syscall +#source: syscall-0.s +#source: syscall-1.s +#objdump: -d +#pass diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp index c8d561b8..efe10ba2 100644 --- a/ld/testsuite/ld-srec/srec.exp +++ b/ld/testsuite/ld-srec/srec.exp @@ -291,6 +291,12 @@ proc run_srec_test { test objs } { setup_xfail "riscv*-*-*" } + # LoongArch targets cannot convert format in the linker + # using the --oformat command line switch + if [istarget loongarch*-*-*] { + setup_xfail "loongarch*-*-*" + } + # V850 targets need libgcc.a if [istarget v850*-*-elf] { set objs "$objs -L ../gcc -lgcc" diff --git a/ld/testsuite/ld-unique/pr21529.d b/ld/testsuite/ld-unique/pr21529.d index fb637943..896f8722 100644 --- a/ld/testsuite/ld-unique/pr21529.d +++ b/ld/testsuite/ld-unique/pr21529.d @@ -1,6 +1,6 @@ #ld: --oformat binary -T pr21529.ld -e main #objdump: -s -b binary -#xfail: aarch64*-*-* arm*-*-* avr-*-* ia64-*-* m68hc1*-*-* nds32*-*-* riscv*-*-* score-*-* v850-*-* +#xfail: aarch64*-*-* arm*-*-* avr-*-* ia64-*-* m68hc1*-*-* nds32*-*-* riscv*-*-* score-*-* v850-*-* loongarch*-*-* # Skip targets which can't change output format to binary. #pass diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 0e04b4c0..c45fc295 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -164,6 +164,9 @@ TARGET_LIBOPCODES_CFILES = \ lm32-ibld.c \ lm32-opc.c \ lm32-opinst.c \ + loongarch-opc.c \ + loongarch-dis.c \ + loongarch-coder.c \ m10200-dis.c \ m10200-opc.c \ m10300-dis.c \ diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index 42c15f00..8ba01c9f 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -555,6 +555,9 @@ TARGET_LIBOPCODES_CFILES = \ lm32-ibld.c \ lm32-opc.c \ lm32-opinst.c \ + loongarch-opc.c \ + loongarch-dis.c \ + loongarch-coder.c \ m10200-dis.c \ m10200-opc.c \ m10300-dis.c \ @@ -973,6 +976,9 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-ibld.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lm32-opinst.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-coder.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-dis.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/loongarch-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-dis.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10200-opc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m10300-dis.Plo@am__quote@ diff --git a/opcodes/configure b/opcodes/configure index 6ca33dd5..e4e198cd 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -12318,6 +12318,7 @@ if test x${all_targets} = xfalse ; then bfd_z80_arch) ta="$ta z80-dis.lo" ;; bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; + bfd_loongarch_arch) ta="$ta loongarch-dis.lo loongarch-opc.lo loongarch-coder.lo" ;; "") ;; *) as_fn_error $? "*** unknown target architecture $arch" "$LINENO" 5 ;; diff --git a/opcodes/configure.ac b/opcodes/configure.ac index e564f067..4853b9e3 100644 --- a/opcodes/configure.ac +++ b/opcodes/configure.ac @@ -355,6 +355,7 @@ if test x${all_targets} = xfalse ; then bfd_z80_arch) ta="$ta z80-dis.lo" ;; bfd_z8k_arch) ta="$ta z8k-dis.lo" ;; bfd_bpf_arch) ta="$ta bpf-asm.lo bpf-desc.lo bpf-dis.lo bpf-ibld.lo bpf-opc.lo" using_cgen=yes ;; + bfd_loongarch_arch) ta="$ta loongarch-dis.lo loongarch-opc.lo loongarch-coder.lo" ;; "") ;; *) AC_MSG_ERROR(*** unknown target architecture $arch) ;; diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 8590e945..61e666c1 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -49,6 +49,7 @@ #define ARCH_ip2k #define ARCH_iq2000 #define ARCH_lm32 +#define ARCH_loongarch #define ARCH_m32c #define ARCH_m32r #define ARCH_m68hc11 @@ -551,6 +552,11 @@ disassembler (enum bfd_architecture a, case bfd_arch_tilepro: disassemble = print_insn_tilepro; break; +#endif +#ifdef ARCH_loongarch + case bfd_arch_loongarch: + disassemble = print_insn_loongarch; + break; #endif default: return 0; @@ -591,6 +597,9 @@ disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) #ifdef ARCH_wasm32 print_wasm32_disassembler_options (stream); #endif +#ifdef ARCH_loongarch + print_loongarch_disassembler_options (stream); +#endif return; } diff --git a/opcodes/disassemble.h b/opcodes/disassemble.h index 8ee54dc9..4e3ea232 100644 --- a/opcodes/disassemble.h +++ b/opcodes/disassemble.h @@ -100,6 +100,7 @@ extern int print_insn_xtensa (bfd_vma, disassemble_info *); extern int print_insn_z80 (bfd_vma, disassemble_info *); extern int print_insn_z8001 (bfd_vma, disassemble_info *); extern int print_insn_z8002 (bfd_vma, disassemble_info *); +extern int print_insn_loongarch (bfd_vma, disassemble_info *); extern disassembler_ftype csky_get_disassembler (bfd *); extern disassembler_ftype rl78_get_disassembler (bfd *); diff --git a/opcodes/loongarch-coder.c b/opcodes/loongarch-coder.c new file mode 100644 index 00000000..f5e10b94 --- /dev/null +++ b/opcodes/loongarch-coder.c @@ -0,0 +1,481 @@ +/* LoongArch opcode support. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of the GNU opcodes library. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ +#include "sysdep.h" +#include "opcode/loongarch.h" + +int +is_unsigned (const char *c_str) +{ + if (c_str[0] == '0' && (c_str[1] == 'x' || c_str[1] == 'X')) + { + c_str += 2; + while (('a' <= *c_str && *c_str <= 'f') + || ('A' <= *c_str && *c_str <= 'F') + || ('0' <= *c_str && *c_str <= '9')) + c_str++; + } + else if (*c_str == '\0') + return 0; + else + while ('0' <= *c_str && *c_str <= '9') + c_str++; + return *c_str == '\0'; +} + +int +is_signed (const char *c_str) +{ + return *c_str == '-' ? is_unsigned (c_str + 1) : is_unsigned (c_str); +} + +int +loongarch_get_bit_field_width (const char *bit_field, char **end) +{ + int width = 0; + char has_specify = 0, *bit_field_1 = (char *) bit_field; + if (bit_field_1 && *bit_field_1 != '\0') + while (1) + { + strtol (bit_field_1, &bit_field_1, 10); + + if (*bit_field_1 != ':') + break; + bit_field_1++; + + width += strtol (bit_field_1, &bit_field_1, 10); + has_specify = 1; + + if (*bit_field_1 != '|') + break; + bit_field_1++; + } + if (end) + *end = bit_field_1; + return has_specify ? width : -1; +} + +int32_t +loongarch_decode_imm (const char *bit_field, insn_t insn, int si) +{ + int32_t ret = 0; + uint32_t t; + int len = 0, width, b_start; + char *bit_field_1 = (char *) bit_field; + while (1) + { + b_start = strtol (bit_field_1, &bit_field_1, 10); + if (*bit_field_1 != ':') + break; + width = strtol (bit_field_1 + 1, &bit_field_1, 10); + len += width; + + t = insn; + t <<= sizeof (t) * 8 - width - b_start; + t >>= sizeof (t) * 8 - width; + ret <<= width; + ret |= t; + + if (*bit_field_1 != '|') + break; + bit_field_1++; + } + + if (*bit_field_1 == '<' && *(++bit_field_1) == '<') + { + width = atoi (bit_field_1 + 1); + ret <<= width; + len += width; + } + else if (*bit_field_1 == '+') + ret += atoi (bit_field_1 + 1); + + /* Extend signed bit. */ + if (si) + { + uint32_t sign = 1u << (len - 1); + ret = (ret ^ sign) - sign; + } + + return ret; +} + +static insn_t +loongarch_encode_imm (const char *bit_field, int32_t imm) +{ + char *bit_field_1 = (char *) bit_field; + char *t = bit_field_1; + int width, b_start; + insn_t ret = 0; + uint32_t i; + uint32_t uimm = (uint32_t)imm; + + width = loongarch_get_bit_field_width (t, &t); + if (width == -1) + return ret; + + if (*t == '<' && *(++t) == '<') + width += atoi (t + 1); + else if (*t == '+') + uimm -= atoi (t + 1); + + uimm = width ? (uimm << (sizeof (uimm) * 8 - width)) : 0; + + while (1) + { + b_start = strtol (bit_field_1, &bit_field_1, 10); + if (*bit_field_1 != ':') + break; + width = strtol (bit_field_1 + 1, &bit_field_1, 10); + i = uimm; + i = width ? (i >> (sizeof (i) * 8 - width)) : 0; + i = (b_start == 32) ? 0 : (i << b_start); + ret |= i; + uimm = (width == 32) ? 0 : (uimm << width); + + if (*bit_field_1 != '|') + break; + bit_field_1++; + } + return ret; +} + +/* Parse such FORMAT + "" + "u" + "v0:5,r5:5,s10:10<<2" + "r0:5,r5:5,r10:5,u15:2+1" + "r,r,u0:5+32,u0:5+1" +*/ +static int +loongarch_parse_format (const char *format, char *esc1s, char *esc2s, + const char **bit_fields) +{ + size_t arg_num = 0; + + if (*format == '\0') + goto end; + + while (1) + { + /* esc1 esc2 + for "[a-zA-Z][a-zA-Z]?" */ + if (('a' <= *format && *format <= 'z') + || ('A' <= *format && *format <= 'Z')) + { + *esc1s++ = *format++; + if (('a' <= *format && *format <= 'z') + || ('A' <= *format && *format <= 'Z')) + *esc2s++ = *format++; + else + *esc2s++ = '\0'; + } + else + return -1; + + arg_num++; + if (MAX_ARG_NUM_PLUS_2 - 2 < arg_num) + /* Need larger MAX_ARG_NUM_PLUS_2. */ + return -1; + + *bit_fields++ = format; + + if ('0' <= *format && *format <= '9') + { + /* For "[0-9]+:[0-9]+(\|[0-9]+:[0-9]+)*". */ + while (1) + { + while ('0' <= *format && *format <= '9') + format++; + + if (*format != ':') + return -1; + format++; + + if (!('0' <= *format && *format <= '9')) + return -1; + while ('0' <= *format && *format <= '9') + format++; + + if (*format != '|') + break; + format++; + } + + /* For "((\+|<<)[1-9][0-9]*)?". */ + do + { + if (*format == '+') + format++; + else if (format[0] == '<' && format[1] == '<') + format += 2; + else + break; + + if (!('1' <= *format && *format <= '9')) + return -1; + while ('0' <= *format && *format <= '9') + format++; + } + while (0); + } + + if (*format == ',') + format++; + else if (*format == '\0') + break; + else + return -1; + } + + end: + *esc1s = '\0'; + return 0; +} + +size_t +loongarch_split_args_by_comma (char *args, const char *arg_strs[]) +{ + size_t num = 0; + + if (*args) + arg_strs[num++] = args; + for (; *args; args++) + if (*args == ',') + { + if (MAX_ARG_NUM_PLUS_2 - 1 == num) + break; + else + *args = '\0', arg_strs[num++] = args + 1; + } + arg_strs[num] = NULL; + return num; +} + +char * +loongarch_cat_splited_strs (const char *arg_strs[]) +{ + char *ret; + size_t n, l; + + for (l = 0, n = 0; arg_strs[n]; n++) + l += strlen (arg_strs[n]); + ret = malloc (l + n + 1); + if (!ret) + return ret; + + ret[0] = '\0'; + if (0 < n) + strcat (ret, arg_strs[0]); + for (l = 1; l < n; l++) + strcat (ret, ","), strcat (ret, arg_strs[l]); + return ret; +} + +insn_t +loongarch_foreach_args (const char *format, const char *arg_strs[], + int32_t (*helper) (char esc1, char esc2, + const char *bit_field, + const char *arg, void *context), + void *context) +{ + char esc1s[MAX_ARG_NUM_PLUS_2 - 1], esc2s[MAX_ARG_NUM_PLUS_2 - 1]; + const char *bit_fields[MAX_ARG_NUM_PLUS_2 - 1]; + size_t i; + insn_t ret = 0; + int ok; + + ok = loongarch_parse_format (format, esc1s, esc2s, bit_fields) == 0; + + /* Make sure the num of actual args is equal to the num of escape. */ + for (i = 0; esc1s[i] && arg_strs[i]; i++) + ; + ok = ok && !esc1s[i] && !arg_strs[i]; + + if (ok && helper) + { + for (i = 0; arg_strs[i]; i++) + ret |= loongarch_encode_imm (bit_fields[i], + helper (esc1s[i], esc2s[i], + bit_fields[i], arg_strs[i], + context)); + ret |= helper ('\0', '\0', NULL, NULL, context); + } + + return ret; +} + +int +loongarch_check_format (const char *format) +{ + char esc1s[MAX_ARG_NUM_PLUS_2 - 1], esc2s[MAX_ARG_NUM_PLUS_2 - 1]; + const char *bit_fields[MAX_ARG_NUM_PLUS_2 - 1]; + + if (!format) + return -1; + + return loongarch_parse_format (format, esc1s, esc2s, bit_fields); +} + +int +loongarch_check_macro (const char *format, const char *macro) +{ + int num_of_args; + char esc1s[MAX_ARG_NUM_PLUS_2 - 1], esc2s[MAX_ARG_NUM_PLUS_2 - 1]; + const char *bit_fields[MAX_ARG_NUM_PLUS_2 - 1]; + + if (!format || !macro + || loongarch_parse_format (format, esc1s, esc2s, bit_fields) != 0) + return -1; + + for (num_of_args = 0; esc1s[num_of_args]; num_of_args++) + ; + + for (; macro[0]; macro++) + if (macro[0] == '%') + { + macro++; + if ('1' <= macro[0] && macro[0] <= '9') + { + if (num_of_args < macro[0] - '0') + /* Out of args num. */ + return -1; + } + else if (macro[0] == 'f') + ; + else if (macro[0] == '%') + ; + else + return -1; + } + return 0; +} + +static const char * +I (char esc_ch1 ATTRIBUTE_UNUSED, char esc_ch2 ATTRIBUTE_UNUSED, + const char *c_str) +{ + return c_str; +} + +char * +loongarch_expand_macro_with_format_map ( + const char *format, const char *macro, const char *const arg_strs[], + const char *(*map) (char esc1, char esc2, const char *arg), + char *(*helper) (const char *const arg_strs[], void *context), void *context, + size_t len_str) +{ + char esc1s[MAX_ARG_NUM_PLUS_2 - 1], esc2s[MAX_ARG_NUM_PLUS_2 - 1]; + const char *bit_fields[MAX_ARG_NUM_PLUS_2 - 1]; + const char *src; + char *dest; + + /* The expanded macro character length does not exceed 1000, and number of + label is 6 at most in the expanded macro. The len_str is the length of + str. */ + char *buffer =(char *) malloc(1024 + 6 * len_str); + + if (format) + loongarch_parse_format (format, esc1s, esc2s, bit_fields); + + src = macro; + dest = buffer; + + while (*src) + if (*src == '%') + { + src++; + if ('1' <= *src && *src <= '9') + { + size_t i = *src - '1'; + const char *t = map (esc1s[i], esc2s[i], arg_strs[i]); + while (*t) + *dest++ = *t++; + } + else if (*src == '%') + *dest++ = '%'; + else if (*src == 'f' && helper) + { + char *b, *t; + t = b = (*helper) (arg_strs, context); + if (b) + { + while (*t) + *dest++ = *t++; + free (b); + } + } + src++; + } + else + *dest++ = *src++; + + *dest = '\0'; + return buffer; +} + +char * +loongarch_expand_macro (const char *macro, const char *const arg_strs[], + char *(*helper) (const char *const arg_strs[], + void *context), + void *context, size_t len_str) +{ + return loongarch_expand_macro_with_format_map (NULL, macro, arg_strs, I, + helper, context, len_str); +} + +size_t +loongarch_bits_imm_needed (int64_t imm, int si) +{ + size_t ret; + if (si) + { + if (imm < 0) + { + uint64_t uimm = (uint64_t) imm; + uint64_t uimax = UINT64_C (1) << 63; + for (ret = 0; (uimm & uimax) != 0; uimm <<= 1, ret++) + ; + ret = 64 - ret + 1; + } + else + ret = loongarch_bits_imm_needed (imm, 0) + 1; + } + else + { + uint64_t t = imm; + for (ret = 0; t; t >>= 1, ret++) + ; + } + return ret; +} + +void +loongarch_eliminate_adjacent_repeat_char (char *dest, char c) +{ + if (c == '\0') + return; + char *src = dest; + while (*dest) + { + while (src[0] == c && src[0] == src[1]) + src++; + *dest++ = *src++; + } +} diff --git a/opcodes/loongarch-dis.c b/opcodes/loongarch-dis.c new file mode 100644 index 00000000..9dcf989d --- /dev/null +++ b/opcodes/loongarch-dis.c @@ -0,0 +1,342 @@ +/* LoongArch opcode support. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of the GNU opcodes library. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include "sysdep.h" +#include "disassemble.h" +#include "opintl.h" +#include "opcode/loongarch.h" +#include "libiberty.h" +#include + +static const struct loongarch_opcode * +get_loongarch_opcode_by_binfmt (insn_t insn) +{ + const struct loongarch_opcode *it; + struct loongarch_ase *ase; + size_t i; + for (ase = loongarch_ASEs; ase->enabled; ase++) + { + if (!*ase->enabled || (ase->include && !*ase->include) + || (ase->exclude && *ase->exclude)) + continue; + + if (!ase->opc_htab_inited) + { + for (it = ase->opcodes; it->mask; it++) + if (!ase->opc_htab[LARCH_INSN_OPC (it->match)] + && it->macro == NULL) + ase->opc_htab[LARCH_INSN_OPC (it->match)] = it; + for (i = 0; i < 16; i++) + if (!ase->opc_htab[i]) + ase->opc_htab[i] = it; + ase->opc_htab_inited = 1; + } + + it = ase->opc_htab[LARCH_INSN_OPC (insn)]; + for (; it->name; it++) + if ((insn & it->mask) == it->match && it->mask + && !(it->include && !*it->include) + && !(it->exclude && *it->exclude)) + return it; + } + return NULL; +} + +static const char *const *loongarch_r_disname = NULL; +static const char *const *loongarch_f_disname = NULL; +static const char *const *loongarch_c_disname = NULL; +static const char *const *loongarch_cr_disname = NULL; +static const char *const *loongarch_v_disname = NULL; +static const char *const *loongarch_x_disname = NULL; + +static void +set_default_loongarch_dis_options (void) +{ + LARCH_opts.ase_ilp32 = 1; + LARCH_opts.ase_lp64 = 1; + LARCH_opts.ase_sf = 1; + LARCH_opts.ase_df = 1; + LARCH_opts.ase_lsx = 1; + LARCH_opts.ase_lasx = 1; + + loongarch_r_disname = loongarch_r_lp64_name; + loongarch_f_disname = loongarch_f_lp64_name; + loongarch_c_disname = loongarch_c_normal_name; + loongarch_cr_disname = loongarch_cr_normal_name; + loongarch_v_disname = loongarch_v_normal_name; + loongarch_x_disname = loongarch_x_normal_name; +} + +static int +parse_loongarch_dis_option (const char *option) +{ + if (strcmp (option, "numeric") == 0) + { + loongarch_r_disname = loongarch_r_normal_name; + loongarch_f_disname = loongarch_f_normal_name; + } + return -1; +} + +static int +parse_loongarch_dis_options (const char *opts_in) +{ + set_default_loongarch_dis_options (); + + if (opts_in == NULL) + return 0; + + char *opts, *opt, *opt_end; + opts = xmalloc (strlen (opts_in) + 1); + strcpy (opts, opts_in); + + for (opt = opt_end = opts; opt_end != NULL; opt = opt_end + 1) + { + if ((opt_end = strchr (opt, ',')) != NULL) + *opt_end = 0; + if (parse_loongarch_dis_option (opt) != 0) + return -1; + } + free (opts); + return 0; +} + +static int32_t +dis_one_arg (char esc1, char esc2, const char *bit_field, + const char *arg ATTRIBUTE_UNUSED, void *context) +{ + static int need_comma = 0; + struct disassemble_info *info = context; + insn_t insn = *(insn_t *) info->private_data; + int32_t imm, u_imm; + + if (esc1) + { + if (need_comma) + info->fprintf_func (info->stream, ", "); + need_comma = 1; + imm = loongarch_decode_imm (bit_field, insn, 1); + u_imm = loongarch_decode_imm (bit_field, insn, 0); + } + + switch (esc1) + { + case 'r': + info->fprintf_func (info->stream, "%s", loongarch_r_disname[u_imm]); + break; + case 'f': + info->fprintf_func (info->stream, "%s", loongarch_f_disname[u_imm]); + break; + case 'c': + switch (esc2) + { + case 'r': + info->fprintf_func (info->stream, "%s", loongarch_cr_disname[u_imm]); + break; + default: + info->fprintf_func (info->stream, "%s", loongarch_c_disname[u_imm]); + } + break; + case 'v': + info->fprintf_func (info->stream, "%s", loongarch_v_disname[u_imm]); + break; + case 'x': + info->fprintf_func (info->stream, "%s", loongarch_x_disname[u_imm]); + break; + case 'u': + info->fprintf_func (info->stream, "0x%x", u_imm); + break; + case 's': + if (imm == 0) + info->fprintf_func (info->stream, "%d", imm); + else + info->fprintf_func (info->stream, "%d(0x%x)", imm, u_imm); + switch (esc2) + { + case 'b': + info->insn_type = dis_branch; + info->target += imm; + } + break; + case '\0': + need_comma = 0; + } + return 0; +} + +static void +disassemble_one (insn_t insn, struct disassemble_info *info) +{ + const struct loongarch_opcode *opc = get_loongarch_opcode_by_binfmt (insn); + +#ifdef LOONGARCH_DEBUG + char have_space[32] = { 0 }; + insn_t t; + int i; + const char *t_f = opc ? opc->format : NULL; + if (t_f) + while (*t_f) + { + while (('a' <= t_f[0] && t_f[0] <= 'z') + || ('A' <= t_f[0] && t_f[0] <= 'Z') + || t_f[0] == ',') + t_f++; + while (1) + { + i = strtol (t_f, &t_f, 10); + have_space[i] = 1; + t_f++; /* ':' */ + i += strtol (t_f, &t_f, 10); + have_space[i] = 1; + if (t_f[0] == '|') + t_f++; + else + break; + } + if (t_f[0] == '<') + t_f += 2; /* '<' '<' */ + strtol (t_f, &t_f, 10); + } + + have_space[28] = 1; + have_space[0] = 0; + t = ~((insn_t) -1 >> 1); + for (i = 31; 0 <= i; i--) + { + if (t & insn) + info->fprintf_func (info->stream, "1"); + else + info->fprintf_func (info->stream, "0"); + if (have_space[i]) + info->fprintf_func (info->stream, " "); + t = t >> 1; + } + info->fprintf_func (info->stream, "\t"); +#endif + + if (!opc) + { + info->insn_type = dis_noninsn; + info->fprintf_func (info->stream, "0x%08x", insn); + return; + } + + info->insn_type = dis_nonbranch; + info->fprintf_func (info->stream, "%-12s", opc->name); + + { + char *fake_args = xmalloc (strlen (opc->format) + 1); + const char *fake_arg_strs[MAX_ARG_NUM_PLUS_2]; + strcpy (fake_args, opc->format); + if (0 < loongarch_split_args_by_comma (fake_args, fake_arg_strs)) + info->fprintf_func (info->stream, "\t"); + info->private_data = &insn; + loongarch_foreach_args (opc->format, fake_arg_strs, dis_one_arg, info); + free (fake_args); + } + + if (info->insn_type == dis_branch || info->insn_type == dis_condbranch + /* Someother if we have extra info to print. */) + info->fprintf_func (info->stream, "\t#"); + + if (info->insn_type == dis_branch || info->insn_type == dis_condbranch) + { + info->fprintf_func (info->stream, " "); + info->print_address_func (info->target, info); + } +} + +int +print_insn_loongarch (bfd_vma memaddr, struct disassemble_info *info) +{ + insn_t insn; + int status; + + static int not_init_yet = 1; + if (not_init_yet) + { + parse_loongarch_dis_options (info->disassembler_options); + not_init_yet = 0; + } + + info->bytes_per_chunk = 4; + info->bytes_per_line = 4; + info->display_endian = BFD_ENDIAN_LITTLE; + info->insn_info_valid = 1; + info->target = memaddr; + + if ((status = info->read_memory_func (memaddr, (bfd_byte *) &insn, + sizeof (insn), info)) != 0) + { + info->memory_error_func (status, memaddr, info); + return -1; /* loongarch_insn_length (0); */ + } + + disassemble_one (insn, info); + + return loongarch_insn_length (insn); +} + +void +print_loongarch_disassembler_options (FILE *stream) +{ + fprintf (stream, _("\n\ +The following LoongArch disassembler options are supported for use\n\ +with the -M switch (multiple options should be separated by commas):\n")); + + fprintf (stream, _("\n\ + numeric Print numeric register names, rather than ABI names.\n")); + fprintf (stream, _("\n")); +} + +int +loongarch_parse_dis_options (const char *opts_in) +{ + return parse_loongarch_dis_options (opts_in); +} + +static void +my_print_address_func (bfd_vma addr, struct disassemble_info *dinfo) +{ + dinfo->fprintf_func (dinfo->stream, "0x%llx", (long long) addr); +} + +void +loongarch_disassemble_one (int64_t pc, insn_t insn, + int (*fprintf_func) (void *stream, + const char *format, ...), + void *stream) +{ + static struct disassemble_info my_disinfo = + { + .print_address_func = my_print_address_func, + }; + static int not_init_yet = 1; + if (not_init_yet) + { + loongarch_parse_dis_options (NULL); + not_init_yet = 0; + } + + my_disinfo.fprintf_func = fprintf_func; + my_disinfo.stream = stream; + my_disinfo.target = pc; + disassemble_one (insn, &my_disinfo); +} diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c new file mode 100644 index 00000000..be0de61c --- /dev/null +++ b/opcodes/loongarch-opc.c @@ -0,0 +1,870 @@ +/* LoongArch opcode support. + Copyright (C) 2021-2022 Free Software Foundation, Inc. + Contributed by Loongson Ltd. + + This file is part of the GNU opcodes library. + + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + +#include +#include "opcode/loongarch.h" +#include "libiberty.h" + +struct loongarch_ASEs_option LARCH_opts; + +size_t +loongarch_insn_length (insn_t insn ATTRIBUTE_UNUSED) +{ + return 4; +} + +const char *const loongarch_r_normal_name[32] = +{ + "$r0", "$r1", "$r2", "$r3", "$r4", "$r5", "$r6", "$r7", + "$r8", "$r9", "$r10", "$r11", "$r12", "$r13", "$r14", "$r15", + "$r16", "$r17", "$r18", "$r19", "$r20", "$r21", "$r22", "$r23", + "$r24", "$r25", "$r26", "$r27", "$r28", "$r29", "$r30", "$r31", +}; + +const char *const loongarch_r_lp64_name[32] = +{ + "$zero", "$ra", "$tp", "$sp", "$a0", "$a1", "$a2", "$a3", + "$a4", "$a5", "$a6", "$a7", "$t0", "$t1", "$t2", "$t3", + "$t4", "$t5", "$t6", "$t7", "$t8", "$x", "$fp", "$s0", + "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$s8", +}; + +const char *const loongarch_r_lp64_name1[32] = +{ + "", "", "", "", "$v0", "$v1", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", +}; + +const char *const loongarch_f_normal_name[32] = +{ + "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", + "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", + "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", + "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", +}; + +const char *const loongarch_f_lp64_name[32] = +{ + "$fa0", "$fa1", "$fa2", "$fa3", "$fa4", "$fa5", "$fa6", "$fa7", + "$ft0", "$ft1", "$ft2", "$ft3", "$ft4", "$ft5", "$ft6", "$ft7", + "$ft8", "$ft9", "$ft10", "$ft11", "$ft12", "$ft13", "$ft14", "$ft15", + "$fs0", "$fs1", "$fs2", "$fs3", "$fs4", "$fs5", "$fs6", "$fs7", +}; + +const char *const loongarch_f_lp64_name1[32] = +{ + "$fv0", "$fv1", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", +}; + +const char *const loongarch_c_normal_name[8] = +{ + "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5", "$fcc6", "$fcc7", +}; + +const char *const loongarch_cr_normal_name[4] = +{ + "$scr0", + "$scr1", + "$scr2", + "$scr3", +}; + +const char *const loongarch_v_normal_name[32] = +{ + "$vr0", "$vr1", "$vr2", "$vr3", "$vr4", "$vr5", "$vr6", "$vr7", + "$vr8", "$vr9", "$vr10", "$vr11", "$vr12", "$vr13", "$vr14", "$vr15", + "$vr16", "$vr17", "$vr18", "$vr19", "$vr20", "$vr21", "$vr22", "$vr23", + "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31", +}; + +const char *const loongarch_x_normal_name[32] = +{ + "$xr0", "$xr1", "$xr2", "$xr3", "$xr4", "$xr5", "$xr6", "$xr7", + "$xr8", "$xr9", "$xr10", "$xr11", "$xr12", "$xr13", "$xr14", "$xr15", + "$xr16", "$xr17", "$xr18", "$xr19", "$xr20", "$xr21", "$xr22", "$xr23", + "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31", +}; + +/* Can not use xx_pa for abs. */ + +/* For LoongArch32 abs. */ +#define INSN_LA_ABS32 \ + "lu12i.w %1,%%abs_hi20(%2);" \ + "ori %1,%1,%%abs_lo12(%2);", \ + &LARCH_opts.ase_ilp32, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_ABS64 \ + "lu12i.w %1,%%abs_hi20(%2);" \ + "ori %1,%1,%%abs_lo12(%2);" \ + "lu32i.d %1,%%abs64_lo20(%2);" \ + "lu52i.d %1,%1,%%abs64_hi12(%2);", \ + &LARCH_opts.ase_lp64, 0 + +#define INSN_LA_PCREL32 \ + "pcalau12i %1,%%pc_hi20(%2);" \ + "addi.w %1,%1,%%pc_lo12(%2);", \ + &LARCH_opts.ase_ilp32, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_PCREL64 \ + "pcalau12i %1,%%pc_hi20(%2);" \ + "addi.d %1,%1,%%pc_lo12(%2);", \ + &LARCH_opts.ase_lp64, 0 +#define INSN_LA_PCREL64_LARGE \ + "pcalau12i %1,%%pc_hi20(%3);" \ + "addi.d %2,$r0,%%pc_lo12(%3);" \ + "lu32i.d %2,%%pc64_lo20(%3);" \ + "lu52i.d %2,%2,%%pc64_hi12(%3);" \ + "add.d %1,%1,%2;", \ + &LARCH_opts.ase_lp64, 0 + +#define INSN_LA_GOT32 \ + "pcalau12i %1,%%got_pc_hi20(%2);" \ + "ld.w %1,%1,%%got_pc_lo12(%2);", \ + &LARCH_opts.ase_ilp32, \ + &LARCH_opts.ase_lp64 +/* got32 abs. */ +#define INSN_LA_GOT32_ABS \ + "lu12i.w %1,%%got_hi20(%2);" \ + "ori %1,%1,%%got_lo12(%2);" \ + "ld.w %1,%1,0;", \ + &LARCH_opts.ase_gabs, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_GOT64 \ + "pcalau12i %1,%%got_pc_hi20(%2);" \ + "ld.d %1,%1,%%got_pc_lo12(%2);", \ + &LARCH_opts.ase_lp64, 0 +/* got64 abs. */ +#define INSN_LA_GOT64_LARGE_ABS \ + "lu12i.w %1,%%got_hi20(%2);" \ + "ori %1,%1,%%got_lo12(%2);" \ + "lu32i.d %1,%%got64_lo20(%2);" \ + "lu52i.d %1,%1,%%got64_hi12(%2);" \ + "ld.d %1,%1,0", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gpcr +/* got64 pic. */ +#define INSN_LA_GOT64_LARGE_PCREL \ + "pcalau12i %1,%%got_pc_hi20(%3);" \ + "addi.d %2,$r0,%%got_pc_lo12(%3);" \ + "lu32i.d %2,%%got64_pc_lo20(%3);" \ + "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ + "ldx.d %1,%1,%2;", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gabs + +/* For LoongArch32/64 cmode=normal. */ +#define INSN_LA_TLS_LE \ + "lu12i.w %1,%%le_hi20(%2);" \ + "ori %1,%1,%%le_lo12(%2);", \ + &LARCH_opts.ase_ilp32, 0 + +/* For LoongArch64 cmode=large. */ +#define INSN_LA_TLS_LE64_LARGE \ + "lu12i.w %1,%%le_hi20(%2);" \ + "ori %1,%1,%%le_lo12(%2);" \ + "lu32i.d %1,%%le64_lo20(%2);" \ + "lu52i.d %1,%1,%%le64_hi12(%2);", \ + &LARCH_opts.ase_lp64, 0 + +#define INSN_LA_TLS_IE32 \ + "pcalau12i %1,%%ie_pc_hi20(%2);" \ + "ld.w %1,%1,%%ie_pc_lo12(%2);", \ + &LARCH_opts.ase_ilp32, \ + &LARCH_opts.ase_lp64 +/* For ie32 abs. */ +#define INSN_LA_TLS_IE32_ABS \ + "lu12i.w %1,%%ie_hi20(%2);" \ + "ori %1,%1,%%ie_lo12(%2);" \ + "ld.w %1,%1,0", \ + &LARCH_opts.ase_gabs, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_TLS_IE64 \ + "pcalau12i %1,%%ie_pc_hi20(%2);" \ + "ld.d %1,%1,%%ie_pc_lo12(%2);", \ + &LARCH_opts.ase_lp64, 0 +/* For ie64 pic. */ +#define INSN_LA_TLS_IE64_LARGE_PCREL \ + "pcalau12i %1,%%ie_pc_hi20(%3);" \ + "addi.d %2,$r0,%%ie_pc_lo12(%3);" \ + "lu32i.d %2,%%ie64_pc_lo20(%3);" \ + "lu52i.d %2,%2,%%ie64_pc_hi12(%3);"\ + "ldx.d %1,%1,%2;", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gabs +/* For ie64 abs. */ +#define INSN_LA_TLS_IE64_LARGE_ABS \ + "lu12i.w %1,%%ie_hi20(%2);" \ + "ori %1,%1,%%ie_lo12(%2);" \ + "lu32i.d %1,%%ie64_lo20(%2);" \ + "lu52i.d %1,%1,%%ie64_hi12(%2);" \ + "ld.d %1,%1,0", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gpcr + +/* For LoongArch32/64 cmode=normal. */ +#define INSN_LA_TLS_LD32 \ + "pcalau12i %1,%%ld_pc_hi20(%2);" \ + "addi.w %1,%1,%%got_pc_lo12(%2);", \ + &LARCH_opts.ase_ilp32, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_TLS_LD32_ABS \ + "lu12i.w %1,%%ld_hi20(%2);" \ + "ori %1,%1,%%got_lo12(%2);", \ + &LARCH_opts.ase_gabs, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_TLS_LD64 \ + "pcalau12i %1,%%ld_pc_hi20(%2);" \ + "addi.d %1,%1,%%got_pc_lo12(%2);", \ + &LARCH_opts.ase_lp64, 0 +#define INSN_LA_TLS_LD64_LARGE_PCREL \ + "pcalau12i %1,%%ld_pc_hi20(%3);" \ + "addi.d %2,$r0,%%got_pc_lo12(%3);" \ + "lu32i.d %2,%%got64_pc_lo20(%3);" \ + "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ + "add.d %1,%1,%2;", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gabs +#define INSN_LA_TLS_LD64_LARGE_ABS \ + "lu12i.w %1,%%ld_hi20(%2);" \ + "ori %1,%1,%%got_lo12(%2);" \ + "lu32i.d %1,%%got64_lo20(%2);" \ + "lu52i.d %1,%1,%%got64_hi12(%2);", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gpcr + +#define INSN_LA_TLS_GD32 \ + "pcalau12i %1,%%gd_pc_hi20(%2);" \ + "addi.w %1,%1,%%got_pc_lo12(%2);", \ + &LARCH_opts.ase_ilp32, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_TLS_GD32_ABS \ + "lu12i.w %1,%%gd_hi20(%2);" \ + "ori %1,%1,%%got_lo12(%2);", \ + &LARCH_opts.ase_gabs, \ + &LARCH_opts.ase_lp64 +#define INSN_LA_TLS_GD64 \ + "pcalau12i %1,%%gd_pc_hi20(%2);" \ + "addi.d %1,%1,%%got_pc_lo12(%2);", \ + &LARCH_opts.ase_lp64, 0 +#define INSN_LA_TLS_GD64_LARGE_PCREL \ + "pcalau12i %1,%%gd_pc_hi20(%3);" \ + "addi.d %2,$r0,%%got_pc_lo12(%3);" \ + "lu32i.d %2,%%got64_pc_lo20(%3);" \ + "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ + "add.d %1,%1,%2;", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gabs +#define INSN_LA_TLS_GD64_LARGE_ABS \ + "lu12i.w %1,%%gd_hi20(%2);" \ + "ori %1,%1,%%got_lo12(%2);" \ + "lu32i.d %1,%%got64_lo20(%2);" \ + "lu52i.d %1,%1,%%got64_hi12(%2);", \ + &LARCH_opts.ase_lp64, \ + &LARCH_opts.ase_gpcr + + +static struct loongarch_opcode loongarch_macro_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0, 0, "li.w", "r,sc", "%f", 0, 0, 0 }, + { 0, 0, "li.d", "r,sc", "%f", 0, 0, 0 }, + + { 0, 0, "la", "r,la", "la.global %1,%2", 0, 0, 0 }, + { 0, 0, "la.global", "r,la", "la.pcrel %1,%2", &LARCH_opts.ase_gpcr, 0, 0 }, + { 0, 0, "la.global", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_gpcr, 0, 0 }, + { 0, 0, "la.global", "r,la", "la.abs %1,%2", &LARCH_opts.ase_gabs, 0, 0 }, + { 0, 0, "la.global", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_gabs, 0, 0 }, + { 0, 0, "la.global", "r,la", "la.got %1,%2", 0, 0, 0 }, + { 0, 0, "la.global", "r,r,la", "la.got %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 }, + + { 0, 0, "la.local", "r,la", "la.abs %1,%2", &LARCH_opts.ase_labs, 0, 0 }, + { 0, 0, "la.local", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_labs, 0, 0 }, + { 0, 0, "la.local", "r,la", "la.pcrel %1,%2", 0, 0, 0 }, + { 0, 0, "la.local", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 }, + + { 0, 0, "la.abs", "r,la", INSN_LA_ABS32, 0 }, + { 0, 0, "la.abs", "r,la", INSN_LA_ABS64, 0 }, + { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL32, 0 }, + { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL64, 0 }, + { 0, 0, "la.pcrel", "r,r,la", INSN_LA_PCREL64_LARGE, 0 }, + { 0, 0, "la.got", "r,la", INSN_LA_GOT32, 0 }, + { 0, 0, "la.got", "r,la", INSN_LA_GOT32_ABS, 0 }, + { 0, 0, "la.got", "r,la", INSN_LA_GOT64, 0 }, + { 0, 0, "la.got", "r,la", INSN_LA_GOT64_LARGE_ABS, 0 }, + { 0, 0, "la.got", "r,r,la", INSN_LA_GOT64_LARGE_PCREL, 0 }, + { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE, 0 }, + { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE64_LARGE, 0 }, + { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32, 0 }, + { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32_ABS, 0 }, + { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64, 0 }, + { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64_LARGE_ABS, 0 }, + { 0, 0, "la.tls.ie", "r,r,l", INSN_LA_TLS_IE64_LARGE_PCREL, 0 }, + { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32, 0 }, + { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32_ABS, 0 }, + { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64, 0 }, + { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64_LARGE_ABS, 0 }, + { 0, 0, "la.tls.ld", "r,r,l", INSN_LA_TLS_LD64_LARGE_PCREL, 0 }, + { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32, 0 }, + { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32_ABS, 0 }, + { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64, 0 }, + { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64_LARGE_ABS, 0 }, + { 0, 0, "la.tls.gd", "r,r,l", INSN_LA_TLS_GD64_LARGE_PCREL, 0 }, + + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_fix_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x00001000, 0xfffffc00, "clo.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00001400, 0xfffffc00, "clz.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00001800, 0xfffffc00, "cto.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00001c00, 0xfffffc00, "ctz.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00002000, 0xfffffc00, "clo.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00002400, 0xfffffc00, "clz.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00002800, 0xfffffc00, "cto.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00002c00, 0xfffffc00, "ctz.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00003000, 0xfffffc00, "revb.2h", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00003400, 0xfffffc00, "revb.4h", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00003800, 0xfffffc00, "revb.2w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00003c00, 0xfffffc00, "revb.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00004000, 0xfffffc00, "revh.2w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00004400, 0xfffffc00, "revh.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00004800, 0xfffffc00, "bitrev.4b", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00004c00, 0xfffffc00, "bitrev.8b", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00005000, 0xfffffc00, "bitrev.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00005400, 0xfffffc00, "bitrev.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00005800, 0xfffffc00, "ext.w.h", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00005c00, 0xfffffc00, "ext.w.b", "r0:5,r5:5", 0, 0, 0, 0 }, + /* or %1,%2,$r0 */ + { 0x00150000, 0xfffffc00, "move", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00006000, 0xfffffc00, "rdtimel.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00006400, 0xfffffc00, "rdtimeh.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00006800, 0xfffffc00, "rdtime.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00006c00, 0xfffffc00, "cpucfg", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x00010000, 0xffff801f, "asrtle.d", "r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00018000, 0xffff801f, "asrtgt.d", "r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00040000, 0xfffe0000, "alsl.w", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 }, + { 0x00060000, 0xfffe0000, "alsl.wu", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 }, + { 0x00080000, 0xfffe0000, "bytepick.w", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 }, + { 0x000c0000, 0xfffc0000, "bytepick.d", "r0:5,r5:5,r10:5,u15:3", 0, 0, 0, 0 }, + { 0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00110000, 0xffff8000, "sub.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00118000, 0xffff8000, "sub.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00120000, 0xffff8000, "slt", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00128000, 0xffff8000, "sltu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00130000, 0xffff8000, "maskeqz", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00138000, 0xffff8000, "masknez", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00140000, 0xffff8000, "nor", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00148000, 0xffff8000, "and", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00150000, 0xffff8000, "or", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00158000, 0xffff8000, "xor", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00160000, 0xffff8000, "orn", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00168000, 0xffff8000, "andn", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00170000, 0xffff8000, "sll.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00178000, 0xffff8000, "srl.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00180000, 0xffff8000, "sra.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00188000, 0xffff8000, "sll.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00190000, 0xffff8000, "srl.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00198000, 0xffff8000, "sra.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001b0000, 0xffff8000, "rotr.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001b8000, 0xffff8000, "rotr.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001c0000, 0xffff8000, "mul.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001c8000, 0xffff8000, "mulh.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001d0000, 0xffff8000, "mulh.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001d8000, 0xffff8000, "mul.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001e0000, 0xffff8000, "mulh.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001e8000, 0xffff8000, "mulh.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001f0000, 0xffff8000, "mulw.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x001f8000, 0xffff8000, "mulw.d.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00200000, 0xffff8000, "div.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00208000, 0xffff8000, "mod.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00210000, 0xffff8000, "div.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00218000, 0xffff8000, "mod.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00220000, 0xffff8000, "div.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00228000, 0xffff8000, "mod.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00230000, 0xffff8000, "div.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00238000, 0xffff8000, "mod.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00240000, 0xffff8000, "crc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00248000, 0xffff8000, "crc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00250000, 0xffff8000, "crc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00258000, 0xffff8000, "crc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00260000, 0xffff8000, "crcc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00268000, 0xffff8000, "crcc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00270000, 0xffff8000, "crcc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x00278000, 0xffff8000, "crcc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x002a0000, 0xffff8000, "break", "u0:15", 0, 0, 0, 0 }, + { 0x002a8000, 0xffff8000, "dbcl", "u0:15", 0, 0, 0, 0 }, + { 0x002b0000, 0xffff8000, "syscall", "u0:15", 0, 0, 0, 0 }, + { 0x002c0000, 0xfffe0000, "alsl.d", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 }, + { 0x00408000, 0xffff8000, "slli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, + { 0x00410000, 0xffff0000, "slli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, + { 0x00448000, 0xffff8000, "srli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, + { 0x00450000, 0xffff0000, "srli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, + { 0x00488000, 0xffff8000, "srai.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, + { 0x00490000, 0xffff0000, "srai.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, + { 0x004c8000, 0xffff8000, "rotri.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, + { 0x004d0000, 0xffff0000, "rotri.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, + { 0x00600000, 0xffe08000, "bstrins.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 }, + { 0x00608000, 0xffe08000, "bstrpick.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 }, + { 0x00800000, 0xffc00000, "bstrins.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 }, + { 0x00c00000, 0xffc00000, "bstrpick.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_single_float_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x01008000, 0xffff8000, "fadd.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01028000, 0xffff8000, "fsub.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01048000, 0xffff8000, "fmul.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01068000, 0xffff8000, "fdiv.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01088000, 0xffff8000, "fmax.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x010a8000, 0xffff8000, "fmin.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x010c8000, 0xffff8000, "fmaxa.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x010e8000, 0xffff8000, "fmina.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01108000, 0xffff8000, "fscaleb.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01128000, 0xffff8000, "fcopysign.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01140400, 0xfffffc00, "fabs.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01141400, 0xfffffc00, "fneg.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01142400, 0xfffffc00, "flogb.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01143400, 0xfffffc00, "fclass.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01144400, 0xfffffc00, "fsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01145400, 0xfffffc00, "frecip.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01146400, 0xfffffc00, "frsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01149400, 0xfffffc00, "fmov.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x0114a400, 0xfffffc00, "movgr2fr.w", "f0:5,r5:5", 0, 0, 0, 0 }, + { 0x0114ac00, 0xfffffc00, "movgr2frh.w", "f0:5,r5:5", 0, 0, 0, 0 }, + { 0x0114b400, 0xfffffc00, "movfr2gr.s", "r0:5,f5:5", 0, 0, 0, 0 }, + { 0x0114bc00, 0xfffffc00, "movfrh2gr.s", "r0:5,f5:5", 0, 0, 0, 0 }, + { 0x0114c000, 0xfffffc00, "movgr2fcsr", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x0114c800, 0xfffffc00, "movfcsr2gr", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x0114d000, 0xfffffc18, "movfr2cf", "c0:3,f5:5", 0, 0, 0, 0 }, + { 0x0114d400, 0xffffff00, "movcf2fr", "f0:5,c5:3", 0, 0, 0, 0 }, + { 0x0114d800, 0xfffffc18, "movgr2cf", "c0:3,r5:5", 0, 0, 0, 0 }, + { 0x0114dc00, 0xffffff00, "movcf2gr", "r0:5,c5:3", 0, 0, 0, 0 }, + { 0x011a0400, 0xfffffc00, "ftintrm.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a2400, 0xfffffc00, "ftintrm.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a4400, 0xfffffc00, "ftintrp.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a6400, 0xfffffc00, "ftintrp.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a8400, 0xfffffc00, "ftintrz.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011aa400, 0xfffffc00, "ftintrz.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011ac400, 0xfffffc00, "ftintrne.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011ae400, 0xfffffc00, "ftintrne.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011b0400, 0xfffffc00, "ftint.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011b2400, 0xfffffc00, "ftint.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011d1000, 0xfffffc00, "ffint.s.w", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011d1800, 0xfffffc00, "ffint.s.l", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011e4400, 0xfffffc00, "frint.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; +static struct loongarch_opcode loongarch_double_float_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x01010000, 0xffff8000, "fadd.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01030000, 0xffff8000, "fsub.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01050000, 0xffff8000, "fmul.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01070000, 0xffff8000, "fdiv.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01090000, 0xffff8000, "fmax.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x010b0000, 0xffff8000, "fmin.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x010d0000, 0xffff8000, "fmaxa.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x010f0000, 0xffff8000, "fmina.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01110000, 0xffff8000, "fscaleb.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01130000, 0xffff8000, "fcopysign.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x01140800, 0xfffffc00, "fabs.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01141800, 0xfffffc00, "fneg.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01142800, 0xfffffc00, "flogb.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01143800, 0xfffffc00, "fclass.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01144800, 0xfffffc00, "fsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01145800, 0xfffffc00, "frecip.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01146800, 0xfffffc00, "frsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01149800, 0xfffffc00, "fmov.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x0114a800, 0xfffffc00, "movgr2fr.d", "f0:5,r5:5", 0, 0, 0, 0 }, + { 0x0114b800, 0xfffffc00, "movfr2gr.d", "r0:5,f5:5", 0, 0, 0, 0 }, + { 0x01191800, 0xfffffc00, "fcvt.s.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x01192400, 0xfffffc00, "fcvt.d.s", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a0800, 0xfffffc00, "ftintrm.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a2800, 0xfffffc00, "ftintrm.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a4800, 0xfffffc00, "ftintrp.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a6800, 0xfffffc00, "ftintrp.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011a8800, 0xfffffc00, "ftintrz.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011aa800, 0xfffffc00, "ftintrz.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011ac800, 0xfffffc00, "ftintrne.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011ae800, 0xfffffc00, "ftintrne.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011b0800, 0xfffffc00, "ftint.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011b2800, 0xfffffc00, "ftint.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011d2000, 0xfffffc00, "ffint.d.w", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011d2800, 0xfffffc00, "ffint.d.l", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0x011e4800, 0xfffffc00, "frint.d", "f0:5,f5:5", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_imm_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x02000000, 0xffc00000, "slti", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x02400000, 0xffc00000, "sltui", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x02800000, 0xffc00000, "addi.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x02c00000, 0xffc00000, "addi.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x03000000, 0xffc00000, "lu52i.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x0, 0x0, "nop", "", "andi $r0,$r0,0", 0, 0, 0 }, + { 0x03400000, 0xffc00000, "andi", "r0:5,r5:5,u10:12", 0, 0, 0, 0 }, + { 0x03800000, 0xffc00000, "ori", "r0:5,r5:5,u10:12", 0, 0, 0, 0 }, + { 0x03c00000, 0xffc00000, "xori", "r0:5,r5:5,u10:12", 0, 0, 0, 0 }, + { 0x10000000, 0xfc000000, "addu16i.d", "r0:5,r5:5,s10:16", 0, 0, 0, 0 }, + { 0x14000000, 0xfe000000, "lu12i.w", "r0:5,s5:20", 0, 0, 0, 0 }, + { 0x16000000, 0xfe000000, "lu32i.d", "r0:5,s5:20", 0, 0, 0, 0 }, + { 0x18000000, 0xfe000000, "pcaddi", "r0:5,s5:20", 0, 0, 0, 0 }, + { 0x1a000000, 0xfe000000, "pcalau12i", "r0:5,s5:20", 0, 0, 0, 0 }, + { 0x1c000000, 0xfe000000, "pcaddu12i", "r0:5,s5:20", 0, 0, 0, 0 }, + { 0x1e000000, 0xfe000000, "pcaddu18i", "r0:5,s5:20", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_privilege_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x04000000, 0xff0003e0, "csrrd", "r0:5,u10:14", 0, 0, 0, 0 }, + { 0x04000020, 0xff0003e0, "csrwr", "r0:5,u10:14", 0, 0, 0, 0 }, + { 0x04000000, 0xff000000, "csrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0 }, + { 0x06000000, 0xffc00000, "cacop", "u0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x06400000, 0xfffc0000, "lddir", "r0:5,r5:5,u10:8", 0, 0, 0, 0 }, + { 0x06440000, 0xfffc001f, "ldpte", "r5:5,u10:8", 0, 0, 0, 0 }, + { 0x06480000, 0xfffffc00, "iocsrrd.b", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06480400, 0xfffffc00, "iocsrrd.h", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06480800, 0xfffffc00, "iocsrrd.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06480c00, 0xfffffc00, "iocsrrd.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06481000, 0xfffffc00, "iocsrwr.b", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06481400, 0xfffffc00, "iocsrwr.h", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06481800, 0xfffffc00, "iocsrwr.w", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06481c00, 0xfffffc00, "iocsrwr.d", "r0:5,r5:5", 0, 0, 0, 0 }, + { 0x06482000, 0xffffffff, "tlbclr", "", 0, 0, 0, 0 }, + { 0x06482400, 0xffffffff, "tlbflush", "", 0, 0, 0, 0 }, + { 0x06482800, 0xffffffff, "tlbsrch", "", 0, 0, 0, 0 }, + { 0x06482c00, 0xffffffff, "tlbrd", "", 0, 0, 0, 0 }, + { 0x06483000, 0xffffffff, "tlbwr", "", 0, 0, 0, 0 }, + { 0x06483400, 0xffffffff, "tlbfill", "", 0, 0, 0, 0 }, + { 0x06483800, 0xffffffff, "ertn", "", 0, 0, 0, 0 }, + { 0x06488000, 0xffff8000, "idle", "u0:15", 0, 0, 0, 0 }, + { 0x06498000, 0xffff8000, "invtlb", "u0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_4opt_single_float_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x08100000, 0xfff00000, "fmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x08500000, 0xfff00000, "fmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x08900000, 0xfff00000, "fnmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x08d00000, 0xfff00000, "fnmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x0c100000, 0xffff8018, "fcmp.caf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c108000, 0xffff8018, "fcmp.saf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c110000, 0xffff8018, "fcmp.clt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c118000, 0xffff8018, "fcmp.slt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c118000, 0xffff8018, "fcmp.sgt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c120000, 0xffff8018, "fcmp.ceq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c128000, 0xffff8018, "fcmp.seq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c130000, 0xffff8018, "fcmp.cle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c138000, 0xffff8018, "fcmp.sle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c138000, 0xffff8018, "fcmp.sge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c140000, 0xffff8018, "fcmp.cun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c148000, 0xffff8018, "fcmp.sun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c150000, 0xffff8018, "fcmp.cult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c150000, 0xffff8018, "fcmp.cugt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c158000, 0xffff8018, "fcmp.sult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c160000, 0xffff8018, "fcmp.cueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c168000, 0xffff8018, "fcmp.sueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c170000, 0xffff8018, "fcmp.cule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c170000, 0xffff8018, "fcmp.cuge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c178000, 0xffff8018, "fcmp.sule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c180000, 0xffff8018, "fcmp.cne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c188000, 0xffff8018, "fcmp.sne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c1a0000, 0xffff8018, "fcmp.cor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c1a8000, 0xffff8018, "fcmp.sor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c1c0000, 0xffff8018, "fcmp.cune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c1c8000, 0xffff8018, "fcmp.sune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0d000000, 0xfffc0000, "fsel", "f0:5,f5:5,f10:5,c15:3", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x08200000, 0xfff00000, "fmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x08600000, 0xfff00000, "fmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x08a00000, 0xfff00000, "fnmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x08e00000, 0xfff00000, "fnmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, + { 0x0c200000, 0xffff8018, "fcmp.caf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c208000, 0xffff8018, "fcmp.saf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c210000, 0xffff8018, "fcmp.clt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c218000, 0xffff8018, "fcmp.slt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c218000, 0xffff8018, "fcmp.sgt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c220000, 0xffff8018, "fcmp.ceq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c228000, 0xffff8018, "fcmp.seq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c230000, 0xffff8018, "fcmp.cle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c238000, 0xffff8018, "fcmp.sle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c238000, 0xffff8018, "fcmp.sge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c240000, 0xffff8018, "fcmp.cun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c248000, 0xffff8018, "fcmp.sun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c250000, 0xffff8018, "fcmp.cult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c250000, 0xffff8018, "fcmp.cugt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c258000, 0xffff8018, "fcmp.sult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c260000, 0xffff8018, "fcmp.cueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c268000, 0xffff8018, "fcmp.sueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c270000, 0xffff8018, "fcmp.cule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c270000, 0xffff8018, "fcmp.cuge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, + { 0x0c278000, 0xffff8018, "fcmp.sule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c280000, 0xffff8018, "fcmp.cne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c288000, 0xffff8018, "fcmp.sne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c2a0000, 0xffff8018, "fcmp.cor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c2a8000, 0xffff8018, "fcmp.sor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c2c0000, 0xffff8018, "fcmp.cune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0x0c2c8000, 0xffff8018, "fcmp.sune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_load_store_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x20000000, 0xff000000, "ll.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x21000000, 0xff000000, "sc.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x22000000, 0xff000000, "ll.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x23000000, 0xff000000, "sc.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x24000000, 0xff000000, "ldptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x25000000, 0xff000000, "stptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x26000000, 0xff000000, "ldptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x27000000, 0xff000000, "stptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 }, + { 0x28000000, 0xffc00000, "ld.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x28400000, 0xffc00000, "ld.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x28800000, 0xffc00000, "ld.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x28c00000, 0xffc00000, "ld.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x29000000, 0xffc00000, "st.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x29400000, 0xffc00000, "st.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x29800000, 0xffc00000, "st.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x29c00000, 0xffc00000, "st.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x2a000000, 0xffc00000, "ld.bu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x2a400000, 0xffc00000, "ld.hu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x2a800000, 0xffc00000, "ld.wu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x2ac00000, 0xffc00000, "preld", "u0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x38000000, 0xffff8000, "ldx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38040000, 0xffff8000, "ldx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38080000, 0xffff8000, "ldx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x380c0000, 0xffff8000, "ldx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38100000, 0xffff8000, "stx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38140000, 0xffff8000, "stx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38180000, 0xffff8000, "stx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x381c0000, 0xffff8000, "stx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38200000, 0xffff8000, "ldx.bu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0 }, + { 0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0 }, + { 0x38608000, 0xffff8000, "amswap.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amadd.w", "r,r,r,u0:0", "amadd.w %1,%2,%3", 0, 0, 0 }, + { 0x38610000, 0xffff8000, "amadd.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amadd.d", "r,r,r,u0:0", "amadd.d %1,%2,%3", 0, 0, 0 }, + { 0x38618000, 0xffff8000, "amadd.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amand.w", "r,r,r,u0:0", "amand.w %1,%2,%3", 0, 0, 0 }, + { 0x38620000, 0xffff8000, "amand.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amand.d", "r,r,r,u0:0", "amand.d %1,%2,%3", 0, 0, 0 }, + { 0x38628000, 0xffff8000, "amand.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amor.w", "r,r,r,u0:0", "amor.w %1,%2,%3", 0, 0, 0 }, + { 0x38630000, 0xffff8000, "amor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amor.d", "r,r,r,u0:0", "amor.d %1,%2,%3", 0, 0, 0 }, + { 0x38638000, 0xffff8000, "amor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amxor.w", "r,r,r,u0:0", "amxor.w %1,%2,%3", 0, 0, 0 }, + { 0x38640000, 0xffff8000, "amxor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amxor.d", "r,r,r,u0:0", "amxor.d %1,%2,%3", 0, 0, 0 }, + { 0x38648000, 0xffff8000, "amxor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax.w", "r,r,r,u0:0", "ammax.w %1,%2,%3", 0, 0, 0 }, + { 0x38650000, 0xffff8000, "ammax.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax.d", "r,r,r,u0:0", "ammax.d %1,%2,%3", 0, 0, 0 }, + { 0x38658000, 0xffff8000, "ammax.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin.w", "r,r,r,u0:0", "ammin.w %1,%2,%3", 0, 0, 0 }, + { 0x38660000, 0xffff8000, "ammin.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin.d", "r,r,r,u0:0", "ammin.d %1,%2,%3", 0, 0, 0 }, + { 0x38668000, 0xffff8000, "ammin.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax.wu", "r,r,r,u0:0", "ammax.wu %1,%2,%3", 0, 0, 0 }, + { 0x38670000, 0xffff8000, "ammax.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax.du", "r,r,r,u0:0", "ammax.du %1,%2,%3", 0, 0, 0 }, + { 0x38678000, 0xffff8000, "ammax.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin.wu", "r,r,r,u0:0", "ammin.wu %1,%2,%3", 0, 0, 0 }, + { 0x38680000, 0xffff8000, "ammin.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin.du", "r,r,r,u0:0", "ammin.du %1,%2,%3", 0, 0, 0 }, + { 0x38688000, 0xffff8000, "ammin.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amswap_db.w", "r,r,r,u0:0", "amswap_db.w %1,%2,%3", 0, 0, 0 }, + { 0x38690000, 0xffff8000, "amswap_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amswap_db.d", "r,r,r,u0:0", "amswap_db.d %1,%2,%3", 0, 0, 0 }, + { 0x38698000, 0xffff8000, "amswap_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amadd_db.w", "r,r,r,u0:0", "amadd_db.w %1,%2,%3", 0, 0, 0 }, + { 0x386a0000, 0xffff8000, "amadd_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amadd_db.d", "r,r,r,u0:0", "amadd_db.d %1,%2,%3", 0, 0, 0 }, + { 0x386a8000, 0xffff8000, "amadd_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amand_db.w", "r,r,r,u0:0", "amand_db.w %1,%2,%3", 0, 0, 0 }, + { 0x386b0000, 0xffff8000, "amand_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amand_db.d", "r,r,r,u0:0", "amand_db.d %1,%2,%3", 0, 0, 0 }, + { 0x386b8000, 0xffff8000, "amand_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amor_db.w", "r,r,r,u0:0", "amor_db.w %1,%2,%3", 0, 0, 0 }, + { 0x386c0000, 0xffff8000, "amor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amor_db.d", "r,r,r,u0:0", "amor_db.d %1,%2,%3", 0, 0, 0 }, + { 0x386c8000, 0xffff8000, "amor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amxor_db.w", "r,r,r,u0:0", "amxor_db.w %1,%2,%3", 0, 0, 0 }, + { 0x386d0000, 0xffff8000, "amxor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "amxor_db.d", "r,r,r,u0:0", "amxor_db.d %1,%2,%3", 0, 0, 0 }, + { 0x386d8000, 0xffff8000, "amxor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax_db.w", "r,r,r,u0:0", "ammax_db.w %1,%2,%3", 0, 0, 0 }, + { 0x386e0000, 0xffff8000, "ammax_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax_db.d", "r,r,r,u0:0", "ammax_db.d %1,%2,%3", 0, 0, 0 }, + { 0x386e8000, 0xffff8000, "ammax_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin_db.w", "r,r,r,u0:0", "ammin_db.w %1,%2,%3", 0, 0, 0 }, + { 0x386f0000, 0xffff8000, "ammin_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin_db.d", "r,r,r,u0:0", "ammin_db.d %1,%2,%3", 0, 0, 0 }, + { 0x386f8000, 0xffff8000, "ammin_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax_db.wu", "r,r,r,u0:0", "ammax_db.wu %1,%2,%3", 0, 0, 0 }, + { 0x38700000, 0xffff8000, "ammax_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammax_db.du", "r,r,r,u0:0", "ammax_db.du %1,%2,%3", 0, 0, 0 }, + { 0x38708000, 0xffff8000, "ammax_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin_db.wu", "r,r,r,u0:0", "ammin_db.wu %1,%2,%3", 0, 0, 0 }, + { 0x38710000, 0xffff8000, "ammin_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x0, 0x0, "ammin_db.du", "r,r,r,u0:0", "ammin_db.du %1,%2,%3", 0, 0, 0 }, + { 0x38718000, 0xffff8000, "ammin_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, + { 0x38720000, 0xffff8000, "dbar", "u0:15", 0, 0, 0, 0 }, + { 0x38728000, 0xffff8000, "ibar", "u0:15", 0, 0, 0, 0 }, + { 0x38780000, 0xffff8000, "ldgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38788000, 0xffff8000, "ldgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38790000, 0xffff8000, "ldgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x38798000, 0xffff8000, "ldgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387a0000, 0xffff8000, "ldle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387a8000, 0xffff8000, "ldle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387b0000, 0xffff8000, "ldle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387b8000, 0xffff8000, "ldle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387c0000, 0xffff8000, "stgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387c8000, 0xffff8000, "stgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387d0000, 0xffff8000, "stgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387d8000, 0xffff8000, "stgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387e0000, 0xffff8000, "stle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387e8000, 0xffff8000, "stle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387f0000, 0xffff8000, "stle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0x387f8000, 0xffff8000, "stle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x2b000000, 0xffc00000, "fld.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x2b400000, 0xffc00000, "fst.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x38300000, 0xffff8000, "fldx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38380000, 0xffff8000, "fstx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38740000, 0xffff8000, "fldgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38750000, 0xffff8000, "fldle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38760000, 0xffff8000, "fstgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38770000, 0xffff8000, "fstle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_double_float_load_store_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x2b800000, 0xffc00000, "fld.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x2bc00000, 0xffc00000, "fst.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0 }, + { 0x38340000, 0xffff8000, "fldx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x383c0000, 0xffff8000, "fstx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38748000, 0xffff8000, "fldgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38758000, 0xffff8000, "fldle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38768000, 0xffff8000, "fstgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0x38778000, 0xffff8000, "fstle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_float_jmp_opcodes[] = +{ + { 0x0, 0x0, "bceqz", "c,la", "bceqz %1,%%b21(%2)", 0, 0, 0 }, + { 0x48000000, 0xfc000300, "bceqz", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bcnez", "c,la", "bcnez %1,%%b21(%2)", 0, 0, 0 }, + { 0x48000100, 0xfc000300, "bcnez", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +static struct loongarch_opcode loongarch_jmp_opcodes[] = +{ + /* match, mask, name, format, macro, include, exclude, pinfo. */ + { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%b16(%2)", 0, 0, 0 }, + { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%b16(%2)", 0, 0, 0 }, + { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%b16(%2)", 0, 0, 0 }, + { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "blez", "r,la", "blez %1,%%b16(%2)", 0, 0, 0 }, + { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, + { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, + { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, + { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, + { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x58000000, 0xfc000000, "beq", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bne", "r,r,la", "bne %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%b16(%3)", 0, 0, 0 }, + { 0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, + { 0 } /* Terminate the list. */ +}; + +struct loongarch_ase loongarch_ASEs[] = +{ + { &LARCH_opts.ase_ilp32, loongarch_macro_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_ilp32, loongarch_imm_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_ilp32, loongarch_privilege_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_ilp32, loongarch_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_ilp32, loongarch_fix_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_ilp32, loongarch_jmp_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_sf, loongarch_float_jmp_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_sf, loongarch_single_float_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_df, loongarch_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_sf, loongarch_4opt_single_float_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_df, loongarch_4opt_double_float_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_sf, loongarch_single_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, + { &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 }, + { 0 }, +}; diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in index 0659b99b..b1037a47 100644 --- a/opcodes/po/POTFILES.in +++ b/opcodes/po/POTFILES.in @@ -111,6 +111,9 @@ lm32-ibld.c lm32-opc.c lm32-opc.h lm32-opinst.c +loongarch-coder.c +loongarch-dis.c +loongarch-opc.c m10200-dis.c m10200-opc.c m10300-dis.c -- 2.38.1