binutils/aarch64-add-l4-instruction.patch
2024-05-29 14:28:25 +08:00

61 lines
1.6 KiB
Diff

From 0bd604ffdd24e40144db5e60ada7658645f9d276 Mon Sep 17 00:00:00 2001
From: z00562913 <zhaoshujian@huawei.com>
Date: Fri, 1 Mar 2024 09:58:23 +0800
Subject: [PATCH] add llc L4 instrcution
---
opcodes/aarch64-opc.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index dea4b8e6..00ebbb11 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -86,8 +86,8 @@ const char *const aarch64_sve_prfop_array[16] = {
"pldl2strm",
"pldl3keep",
"pldl3strm",
- 0,
- 0,
+ "pldl4keep",
+ "pldl4strm",
/* 8-15. */
"pstl1keep",
"pstl1strm",
@@ -95,8 +95,8 @@ const char *const aarch64_sve_prfop_array[16] = {
"pstl2strm",
"pstl3keep",
"pstl3strm",
- 0,
- 0
+ "pstl4keep",
+ "pstl4strm"
};
/* Helper functions to determine which operand to be used to encode/decode
@@ -501,8 +501,8 @@ const struct aarch64_name_value_pair aarch64_prfops[32] =
{ "pldl2strm", B(0, 2, 1) },
{ "pldl3keep", B(0, 3, 0) },
{ "pldl3strm", B(0, 3, 1) },
- { NULL, 0x06 },
- { NULL, 0x07 },
+ { "pldl4keep", B(0, 4, 0) },
+ { "pldl4strm", B(0, 4, 1) },
{ "plil1keep", B(1, 1, 0) },
{ "plil1strm", B(1, 1, 1) },
{ "plil2keep", B(1, 2, 0) },
@@ -517,8 +517,8 @@ const struct aarch64_name_value_pair aarch64_prfops[32] =
{ "pstl2strm", B(2, 2, 1) },
{ "pstl3keep", B(2, 3, 0) },
{ "pstl3strm", B(2, 3, 1) },
- { NULL, 0x16 },
- { NULL, 0x17 },
+ { "pstl4keep", B(2, 4, 0) },
+ { "pstl4strm", B(2, 4, 1) },
{ NULL, 0x18 },
{ NULL, 0x19 },
{ NULL, 0x1a },
--
2.33.0