From af30b78f204788a5a82cc637b813a3b8bb66ae6b Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Fri, 7 Jul 2023 18:40:53 +0800
Subject: [PATCH 352/366] net/hns3: fix non-zero weight for disabled TC

[ upstream commit 1abcdb3f247393a04703071452b560a77ab23c04 ]

hns3 PF driver enables one TC, allocates to 100% weight for this
TC and 0% for other disabled TC by default. But driver modifies
the weight to 1% for disabled TC and then set to hardware to make
all TC work in DWRR mode. As a result, the total percent of all TC
is more than 100%. Actually, this operation is also redundant,
because these disabled TC will never be used. So this patch sets
the weight of all TC based on user's configuration.

Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
Cc: stable@dpdk.org

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
 drivers/net/hns3/hns3_dcb.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index af045b2..07b8c46 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -237,9 +237,9 @@ hns3_dcb_qs_weight_cfg(struct hns3_hw *hw, uint16_t qs_id, uint8_t dwrr)
 static int
 hns3_dcb_ets_tc_dwrr_cfg(struct hns3_hw *hw)
 {
-#define DEFAULT_TC_WEIGHT	1
 #define DEFAULT_TC_OFFSET	14
 	struct hns3_ets_tc_weight_cmd *ets_weight;
+	struct hns3_pg_info *pg_info;
 	struct hns3_cmd_desc desc;
 	uint8_t i;
 
@@ -247,13 +247,6 @@ hns3_dcb_ets_tc_dwrr_cfg(struct hns3_hw *hw)
 	ets_weight = (struct hns3_ets_tc_weight_cmd *)desc.data;
 
 	for (i = 0; i < HNS3_MAX_TC_NUM; i++) {
-		struct hns3_pg_info *pg_info;
-
-		ets_weight->tc_weight[i] = DEFAULT_TC_WEIGHT;
-
-		if (!(hw->hw_tc_map & BIT(i)))
-			continue;
-
 		pg_info = &hw->dcb_info.pg_info[hw->dcb_info.tc_info[i].pgid];
 		ets_weight->tc_weight[i] = pg_info->tc_dwrr[i];
 	}
-- 
2.41.0.windows.2

