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!117 Add bugfixes for hns3 PMD

Browse Source 
From: @speech_white
Reviewed-by: @MrRlu,@wu-changsheng
Signed-off-by: @MrRlu
This commit is contained in:
openeuler-ci-bot 2021-07-28 12:32:13 +00:00 committed by Gitee
commit 02609dbc5e
25 changed files with 3085 additions and 1 deletions
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39
0189-config-arm-check-SVE-CPU-flag.patch Normal file
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@ -0,0 +1,39 @@
From 5108d77df4a599d04d378368247e0d234d01766e Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Fri, 21 May 2021 11:33:54 +0800
Subject: [PATCH 01/26] config/arm: check SVE CPU flag
If compiled with SVE feature (e.g. "-march=armv8.2-a+sve'), the binary
could not run on non-SVE platform else it will encounter illegal
instruction [1].
This patch fixes it by adding 'RTE_CPUFLAG_SVE' to compile_time_cpuflags,
so that rte_cpu_is_supported() will print meaningful log under above
situation.
[1] http://mails.dpdk.org/archives/dev/2021-May/209124.html
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
config/arm/meson.build | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 42b4e43..b18acea 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -214,6 +214,10 @@ if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
+if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
+ compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
+endif
+
if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
--
2.7.4

46
0190-net-hns3-increase-VF-reset-retry-maximum.patch Normal file
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From ef9a1fa57d0e364793481727fecc3833b5a82918 Mon Sep 17 00:00:00 2001
From: Hongbo Zheng <zhenghongbo3@huawei.com>
Date: Sun, 13 Jun 2021 10:31:51 +0800
Subject: [PATCH 02/26] net/hns3: increase VF reset retry maximum
When the device is very busy, VF reset may have to be
retried many times to succeed, leading to the current
max reset fail retry count not enough.
Modify max reset fail retry count to 30 to enhance
the reliability of reset function.
Fixes: 2790c6464725 ("net/hns3: support device reset")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_intr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
index 854cb1d..e8ca6d5 100644
--- a/drivers/net/hns3/hns3_intr.c
+++ b/drivers/net/hns3/hns3_intr.c
@@ -2582,7 +2582,7 @@ hns3_clear_reset_level(struct hns3_hw *hw, uint64_t *levels)
static bool
hns3_reset_err_handle(struct hns3_adapter *hns)
{
-#define MAX_RESET_FAIL_CNT 5
+#define MAX_RESET_FAIL_CNT 30
struct hns3_hw *hw = &hns->hw;
@@ -2676,7 +2676,7 @@ hns3_reset_pre(struct hns3_adapter *hns)
static int
hns3_reset_post(struct hns3_adapter *hns)
{
-#define TIMEOUT_RETRIES_CNT 5
+#define TIMEOUT_RETRIES_CNT 30
struct hns3_hw *hw = &hns->hw;
struct timeval tv_delta;
struct timeval tv;
--
2.7.4

69
0191-net-hns3-fix-delay-for-waiting-to-stop-Rx-Tx.patch Normal file
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@ -0,0 +1,69 @@
From 00276e9b4577158de8d920dd58e486a00d6fe27d Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sun, 13 Jun 2021 10:31:52 +0800
Subject: [PATCH 03/26] net/hns3: fix delay for waiting to stop Rx/Tx
When the primary process executes dev_stop or is being reset, the packet
sending and receiving functions is changed. In this moment, the primary
process requests secondary processes to change their Rx/Tx functions, and
delays a period of time in case of crashes when queues are still in use.
The delay time depends on the number of queues actually used, instead of
the maximum number of queues supported by the device.
Fixes: 23d4b61fee5d ("net/hns3: support multiple process")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 4 ++--
drivers/net/hns3/hns3_ethdev_vf.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 351dc59..f34e117 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -5892,7 +5892,7 @@ hns3_dev_stop(struct rte_eth_dev *dev)
/* Disable datapath on secondary process. */
hns3_mp_req_stop_rxtx(dev);
/* Prevent crashes when queues are still in use. */
- rte_delay_ms(hw->tqps_num);
+ rte_delay_ms(hw->cfg_max_queues);
rte_spinlock_lock(&hw->lock);
if (__atomic_load_n(&hw->reset.resetting, __ATOMIC_RELAXED) == 0) {
@@ -6508,7 +6508,7 @@ hns3_stop_service(struct hns3_adapter *hns)
rte_wmb();
/* Disable datapath on secondary process. */
hns3_mp_req_stop_rxtx(eth_dev);
- rte_delay_ms(hw->tqps_num);
+ rte_delay_ms(hw->cfg_max_queues);
rte_spinlock_lock(&hw->lock);
if (hns->hw.adapter_state == HNS3_NIC_STARTED ||
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 030d63a..1819677 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -2107,7 +2107,7 @@ hns3vf_dev_stop(struct rte_eth_dev *dev)
/* Disable datapath on secondary process. */
hns3_mp_req_stop_rxtx(dev);
/* Prevent crashes when queues are still in use. */
- rte_delay_ms(hw->tqps_num);
+ rte_delay_ms(hw->cfg_max_queues);
rte_spinlock_lock(&hw->lock);
if (__atomic_load_n(&hw->reset.resetting, __ATOMIC_RELAXED) == 0) {
@@ -2555,7 +2555,7 @@ hns3vf_stop_service(struct hns3_adapter *hns)
rte_wmb();
/* Disable datapath on secondary process. */
hns3_mp_req_stop_rxtx(eth_dev);
- rte_delay_ms(hw->tqps_num);
+ rte_delay_ms(hw->cfg_max_queues);
rte_spinlock_lock(&hw->lock);
if (hw->adapter_state == HNS3_NIC_STARTED ||
--
2.7.4

84
0192-net-hns3-fix-fake-queue-rollback.patch Normal file
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@ -0,0 +1,84 @@
From f56028fd10925831f3a0e092d317aef165ef9989 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sun, 13 Jun 2021 10:31:53 +0800
Subject: [PATCH 04/26] net/hns3: fix fake queue rollback
When the device supports independent Rx/Tx queues, fake queues do not need
to be created in unequal Rx/Tx queues case. However, dev_configure fails
to be executed on the device supported independent Rx/Tx queues, the
current rollback code logic contains the fake queue. As a result, the fake
queue is created. When dev_configure is successfully called again, these
fake queues still exists and are configured to the hardware.
Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 11 ++++-------
drivers/net/hns3/hns3_ethdev_vf.c | 11 ++++-------
drivers/net/hns3/hns3_rxtx.c | 3 +++
3 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index f34e117..54a2bc7 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2497,13 +2497,10 @@ hns3_dev_configure(struct rte_eth_dev *dev)
* work as usual. But these fake queues are imperceptible, and can not
* be used by upper applications.
*/
- if (!hns3_dev_indep_txrx_supported(hw)) {
- ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
- if (ret) {
- hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.",
- ret);
- return ret;
- }
+ ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
+ if (ret) {
+ hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.", ret);
+ return ret;
}
hw->adapter_state = HNS3_NIC_CONFIGURING;
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 1819677..3631022 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -801,13 +801,10 @@ hns3vf_dev_configure(struct rte_eth_dev *dev)
* work as usual. But these fake queues are imperceptible, and can not
* be used by upper applications.
*/
- if (!hns3_dev_indep_txrx_supported(hw)) {
- ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
- if (ret) {
- hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.",
- ret);
- return ret;
- }
+ ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
+ if (ret) {
+ hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.", ret);
+ return ret;
}
hw->adapter_state = HNS3_NIC_CONFIGURING;
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 6aa2887..3c645b3 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -1617,6 +1617,9 @@ hns3_set_fake_rx_or_tx_queues(struct rte_eth_dev *dev, uint16_t nb_rx_q,
uint16_t q;
int ret;
+ if (hns3_dev_indep_txrx_supported(hw))
+ return 0;
+
/* Setup new number of fake RX/TX queues and reconfigure device. */
rx_need_add_nb_q = hw->cfg_max_queues - nb_rx_q;
tx_need_add_nb_q = hw->cfg_max_queues - nb_tx_q;
--
2.7.4

49
0193-net-hns3-fix-VLAN-strip-log.patch Normal file
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@ -0,0 +1,49 @@
From dabf2fc6e1ae8d1a4b87f9b8603d5666a8b05efb Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Sun, 13 Jun 2021 10:31:54 +0800
Subject: [PATCH 05/26] net/hns3: fix VLAN strip log
When the current VLAN stripping is set, the log print always prompts
that the enabling fails, bug if may actually be the disabling failure.
Fixes: 411d23b9eafb ("net/hns3: support VLAN")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 3 ++-
drivers/net/hns3/hns3_ethdev_vf.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 54a2bc7..3ecdd68 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -640,7 +640,8 @@ hns3_en_hw_strip_rxvtag(struct hns3_adapter *hns, bool enable)
ret = hns3_set_vlan_rx_offload_cfg(hns, &rxvlan_cfg);
if (ret) {
- hns3_err(hw, "enable strip rx vtag failed, ret =%d", ret);
+ hns3_err(hw, "%s strip rx vtag failed, ret = %d.",
+ enable ? "enable" : "disable", ret);
return ret;
}
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 3631022..cd59ae2 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1606,7 +1606,8 @@ hns3vf_en_hw_strip_rxvtag(struct hns3_hw *hw, bool enable)
ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_RX_OFF_CFG,
&msg_data, sizeof(msg_data), false, NULL, 0);
if (ret)
- hns3_err(hw, "vf enable strip failed, ret =%d", ret);
+ hns3_err(hw, "vf %s strip failed, ret = %d.",
+ enable ? "enable" : "disable", ret);
return ret;
}
--
2.7.4

71
0194-net-hns3-fix-maximum-queues-on-configuration-failure.patch Normal file
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@ -0,0 +1,71 @@
From 592de3eb443016be571a13fd90cb7cc35bd98679 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sun, 13 Jun 2021 10:31:55 +0800
Subject: [PATCH 06/26] net/hns3: fix maximum queues on configuration failure
The "cfg_max_queues" maintains configured max queue numbers from user,
and is equal to the maximum of "nb_rx_queues" and "nb_tx_queues" in
"dev->data".
From the ethdev layer framework, "nb_rx/tx_queues" in "dev->data" were set
to zero in rte_eth_dev_configure() if ops.dev_configure in PMD fails to be
executed, In addition, if ops.dev_configure in HNS3 PMD failed, the fake
queues are also cleared on a device that does not support independent Rx/Tx
queues.
Therefore, the "cfg_max_queues" should be also set to zero when
dev_configure fails.
Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 2 ++
drivers/net/hns3/hns3_ethdev_vf.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 3ecdd68..45ce54c 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2501,6 +2501,7 @@ hns3_dev_configure(struct rte_eth_dev *dev)
ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
if (ret) {
hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.", ret);
+ hw->cfg_max_queues = 0;
return ret;
}
@@ -2549,6 +2550,7 @@ hns3_dev_configure(struct rte_eth_dev *dev)
return 0;
cfg_err:
+ hw->cfg_max_queues = 0;
(void)hns3_set_fake_rx_or_tx_queues(dev, 0, 0);
hw->adapter_state = HNS3_NIC_INITIALIZED;
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index cd59ae2..cbc3456 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -804,6 +804,7 @@ hns3vf_dev_configure(struct rte_eth_dev *dev)
ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
if (ret) {
hns3_err(hw, "fail to set Rx/Tx fake queues, ret = %d.", ret);
+ hw->cfg_max_queues = 0;
return ret;
}
@@ -863,6 +864,7 @@ hns3vf_dev_configure(struct rte_eth_dev *dev)
return 0;
cfg_err:
+ hw->cfg_max_queues = 0;
(void)hns3_set_fake_rx_or_tx_queues(dev, 0, 0);
hw->adapter_state = HNS3_NIC_INITIALIZED;
--
2.7.4

64
0195-net-hns3-remove-unnecessary-blank-lines.patch Normal file
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@ -0,0 +1,64 @@
From c30146c22a93c86c1dcd296eddd99c620b741b8e Mon Sep 17 00:00:00 2001
From: Hongbo Zheng <zhenghongbo3@huawei.com>
Date: Sun, 13 Jun 2021 10:31:56 +0800
Subject: [PATCH 07/26] net/hns3: remove unnecessary blank lines
Delete redundant blank lines to make:
1.Return value judgment follow the function call.
2.No blank lines at the end of a code block defined by braces.
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 45ce54c..a80bc56 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -253,8 +253,8 @@ static void
hns3_clear_all_event_cause(struct hns3_hw *hw)
{
uint32_t vector0_int_stats;
- vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
+ vector0_int_stats = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_int_stats)
hns3_warn(hw, "Probe during IMP reset interrupt");
@@ -3124,7 +3124,6 @@ hns3_parse_cfg(struct hns3_cfg *cfg, struct hns3_cmd_desc *desc)
ext_rss_size_max = hns3_get_field(rte_le_to_cpu_32(req->param[2]),
HNS3_CFG_EXT_RSS_SIZE_M,
HNS3_CFG_EXT_RSS_SIZE_S);
-
/*
* Field ext_rss_size_max obtained from firmware will be more flexible
* for future changes and expansions, which is an exponent of 2, instead
@@ -3843,7 +3842,6 @@ hns3_drop_nopfc_buf_till_fit(struct hns3_hw *hw,
for (i = HNS3_MAX_TC_NUM - 1; i >= 0; i--) {
priv = &buf_alloc->priv_buf[i];
mask = BIT((uint8_t)i);
-
if (hw->hw_tc_map & mask &&
!(hw->dcb_info.hw_pfc_map & mask)) {
/* Clear the no pfc TC private buffer */
@@ -3929,7 +3927,6 @@ hns3_only_alloc_priv_buff(struct hns3_hw *hw,
COMPENSATE_HALF_MPS_NUM * half_mps;
min_rx_priv = roundup(min_rx_priv, HNS3_BUF_SIZE_UNIT);
rx_priv = rounddown(rx_priv, HNS3_BUF_SIZE_UNIT);
-
if (rx_priv < min_rx_priv)
return false;
@@ -6294,7 +6291,6 @@ hns3_is_reset_pending(struct hns3_adapter *hns)
hns3_check_event_cause(hns, NULL);
reset = hns3_get_reset_level(hns, &hw->reset.pending);
-
if (reset != HNS3_NONE_RESET && hw->reset.level != HNS3_NONE_RESET &&
hw->reset.level < reset) {
hns3_warn(hw, "High level reset %d is pending", reset);
--
2.7.4

277
0196-net-hns3-support-Tx-push-quick-doorbell-for-performa.patch Normal file
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@ -0,0 +1,277 @@
From 4c96351a025f35434d6d3e01a31072866cf826d6 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Tue, 15 Jun 2021 09:34:29 +0800
Subject: [PATCH 08/26] net/hns3: support Tx push quick doorbell for
performance
Kunpeng 930 support Tx push mode which could improve performance.
It works like below:
1. Add PCIe bar45 which support driver direct write the Tx descriptor
or tail reg to it.
2. Support three operations: a) direct write one Tx descriptor, b)
direct write two Tx descriptors, c) direct write tail reg.
3. The original tail reg located at bar23, the above bar45 tail reg
could provide better bandwidth from the hardware perspective.
The hns3 driver only support direct write tail reg (also have the name
of quick doorbell), the detail:
Considering compatibility, firmware will report Tx push capa if the
hardware support it.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 4 +-
drivers/net/hns3/hns3_ethdev.h | 4 ++
drivers/net/hns3/hns3_ethdev_vf.c | 4 +-
drivers/net/hns3/hns3_rxtx.c | 73 ++++++++++++++++++++++++++++++++++-
drivers/net/hns3/hns3_rxtx.h | 19 +++++++++
drivers/net/hns3/hns3_rxtx_vec_neon.h | 2 +-
drivers/net/hns3/hns3_rxtx_vec_sve.c | 2 +-
7 files changed, 102 insertions(+), 6 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index a80bc56..7283364 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -5171,6 +5171,8 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)
goto err_cmd_init;
}
+ hns3_tx_push_init(eth_dev);
+
/*
* To ensure that the hardware environment is clean during
* initialization, the driver actively clear the hardware environment
@@ -7415,8 +7417,8 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
"process, ret = %d", ret);
goto err_mp_init_secondary;
}
-
hw->secondary_cnt++;
+ hns3_tx_push_init(eth_dev);
return 0;
}
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 53dc498..f3bc60e 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -862,6 +862,7 @@ enum {
HNS3_DEV_SUPPORT_COPPER_B,
HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B,
HNS3_DEV_SUPPORT_PTP_B,
+ HNS3_DEV_SUPPORT_TX_PUSH_B,
HNS3_DEV_SUPPORT_INDEP_TXRX_B,
HNS3_DEV_SUPPORT_STASH_B,
HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
@@ -900,6 +901,9 @@ enum {
#define hns3_dev_ras_imp_supported(hw) \
hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RAS_IMP_B)
+#define hns3_dev_tx_push_supported(hw) \
+ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TX_PUSH_B)
+
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
#define HNS3_DEV_PRIVATE_TO_PF(adapter) \
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index cbc3456..2085a29 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1921,6 +1921,8 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)
goto err_cmd_init;
}
+ hns3_tx_push_init(eth_dev);
+
/* Get VF resource */
ret = hns3_query_vf_resource(hw);
if (ret)
@@ -2925,8 +2927,8 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev)
"process, ret = %d", ret);
goto err_mp_init_secondary;
}
-
hw->secondary_cnt++;
+ hns3_tx_push_init(eth_dev);
return 0;
}
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 3c645b3..51b727f 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -2895,6 +2895,69 @@ hns3_tx_queue_conf_check(struct hns3_hw *hw, const struct rte_eth_txconf *conf,
return 0;
}
+static void *
+hns3_tx_push_get_queue_tail_reg(struct rte_eth_dev *dev, uint16_t queue_id)
+{
+#define HNS3_TX_PUSH_TQP_REGION_SIZE 0x10000
+#define HNS3_TX_PUSH_QUICK_DOORBELL_OFFSET 64
+#define HNS3_TX_PUSH_PCI_BAR_INDEX 4
+
+ struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
+ uint8_t bar_id = HNS3_TX_PUSH_PCI_BAR_INDEX;
+
+ /*
+ * If device support Tx push then its PCIe bar45 must exist, and DPDK
+ * framework will mmap the bar45 default in PCI probe stage.
+ *
+ * In the bar45, the first half is for RoCE (RDMA over Converged
+ * Ethernet), and the second half is for NIC, every TQP occupy 64KB.
+ *
+ * The quick doorbell located at 64B offset in the TQP region.
+ */
+ return (char *)pci_dev->mem_resource[bar_id].addr +
+ (pci_dev->mem_resource[bar_id].len >> 1) +
+ HNS3_TX_PUSH_TQP_REGION_SIZE * queue_id +
+ HNS3_TX_PUSH_QUICK_DOORBELL_OFFSET;
+}
+
+void
+hns3_tx_push_init(struct rte_eth_dev *dev)
+{
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ volatile uint32_t *reg;
+ uint32_t val;
+
+ if (!hns3_dev_tx_push_supported(hw))
+ return;
+
+ reg = (volatile uint32_t *)hns3_tx_push_get_queue_tail_reg(dev, 0);
+ /*
+ * Because the size of bar45 is about 8GB size, it may take a long time
+ * to do the page fault in Tx process when work with vfio-pci, so use
+ * one read operation to make kernel setup page table mapping for bar45
+ * in the init stage.
+ * Note: the bar45 is readable but the result is all 1.
+ */
+ val = *reg;
+ RTE_SET_USED(val);
+}
+
+static void
+hns3_tx_push_queue_init(struct rte_eth_dev *dev,
+ uint16_t queue_id,
+ struct hns3_tx_queue *txq)
+{
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ if (!hns3_dev_tx_push_supported(hw)) {
+ txq->tx_push_enable = false;
+ return;
+ }
+
+ txq->io_tail_reg = (volatile void *)hns3_tx_push_get_queue_tail_reg(dev,
+ queue_id);
+ txq->tx_push_enable = true;
+}
+
int
hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,
unsigned int socket_id, const struct rte_eth_txconf *conf)
@@ -2986,6 +3049,12 @@ hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,
memset(&txq->basic_stats, 0, sizeof(struct hns3_tx_basic_stats));
memset(&txq->dfx_stats, 0, sizeof(struct hns3_tx_dfx_stats));
+ /*
+ * Call hns3_tx_push_queue_init after assigned io_tail_reg field because
+ * it may overwrite the io_tail_reg field.
+ */
+ hns3_tx_push_queue_init(dev, idx, txq);
+
rte_spinlock_lock(&hw->lock);
dev->data->tx_queues[idx] = txq;
rte_spinlock_unlock(&hw->lock);
@@ -4032,7 +4101,7 @@ hns3_xmit_pkts_simple(void *tx_queue,
hns3_tx_fill_hw_ring(txq, tx_pkts + nb_tx, nb_pkts - nb_tx);
txq->next_to_use += nb_pkts - nb_tx;
- hns3_write_reg_opt(txq->io_tail_reg, nb_pkts);
+ hns3_write_txq_tail_reg(txq, nb_pkts);
return nb_pkts;
}
@@ -4149,7 +4218,7 @@ hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
end_of_tx:
if (likely(nb_tx))
- hns3_write_reg_opt(txq->io_tail_reg, nb_hold);
+ hns3_write_txq_tail_reg(txq, nb_hold);
return nb_tx;
}
diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index a42ab71..e01e582 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -419,6 +419,7 @@ struct hns3_tx_dfx_stats {
};
struct hns3_tx_queue {
+ /* The io_tail_reg is write-only if working in tx push mode */
volatile void *io_tail_reg;
struct hns3_desc *tx_ring;
struct hns3_entry *sw_ring;
@@ -659,6 +660,23 @@ hns3_rx_calc_ptype(struct hns3_rx_queue *rxq, const uint32_t l234_info,
return ptype_tbl->l3table[l3id] | ptype_tbl->l4table[l4id];
}
+/*
+ * If enable using Tx push feature and also device support it, then use quick
+ * doorbell (bar45) to inform the hardware.
+ *
+ * The other cases (such as: device don't support or user don't enable using)
+ * then use normal doorbell (bar23) to inform the hardware.
+ */
+static inline void
+hns3_write_txq_tail_reg(struct hns3_tx_queue *txq, uint32_t value)
+{
+ rte_io_wmb();
+ if (txq->tx_push_enable)
+ rte_write64_relaxed(rte_cpu_to_le_32(value), txq->io_tail_reg);
+ else
+ rte_write32_relaxed(rte_cpu_to_le_32(value), txq->io_tail_reg);
+}
+
void hns3_dev_rx_queue_release(void *queue);
void hns3_dev_tx_queue_release(void *queue);
void hns3_free_all_queues(struct rte_eth_dev *dev);
@@ -741,5 +759,6 @@ int hns3_tx_done_cleanup(void *txq, uint32_t free_cnt);
void hns3_enable_rxd_adv_layout(struct hns3_hw *hw);
int hns3_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
int hns3_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
+void hns3_tx_push_init(struct rte_eth_dev *dev);
#endif /* _HNS3_RXTX_H_ */
diff --git a/drivers/net/hns3/hns3_rxtx_vec_neon.h b/drivers/net/hns3/hns3_rxtx_vec_neon.h
index 35fef12..30a7d70 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_neon.h
+++ b/drivers/net/hns3/hns3_rxtx_vec_neon.h
@@ -84,7 +84,7 @@ hns3_xmit_fixed_burst_vec(void *__restrict tx_queue,
txq->next_to_use = next_to_use;
txq->tx_bd_ready -= nb_tx;
- hns3_write_reg_opt(txq->io_tail_reg, nb_tx);
+ hns3_write_txq_tail_reg(txq, nb_tx);
return nb_tx;
}
diff --git a/drivers/net/hns3/hns3_rxtx_vec_sve.c b/drivers/net/hns3/hns3_rxtx_vec_sve.c
index be9a4ff..c861887 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_sve.c
+++ b/drivers/net/hns3/hns3_rxtx_vec_sve.c
@@ -475,7 +475,7 @@ hns3_xmit_fixed_burst_vec_sve(void *__restrict tx_queue,
txq->next_to_use += nb_pkts - nb_tx;
txq->tx_bd_ready -= nb_pkts;
- hns3_write_reg_opt(txq->io_tail_reg, nb_pkts);
+ hns3_write_txq_tail_reg(txq, nb_pkts);
return nb_pkts;
}
--
2.7.4

311
0197-net-hns3-fix-traffic-management.patch Normal file
View File

@ -0,0 +1,311 @@
From 78db1dbe9adf7ed0fedd6331dcd3a2c1ee0b85c4 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Mon, 21 Jun 2021 15:38:45 +0800
Subject: [PATCH 09/26] net/hns3: fix traffic management
In a multi-TC scenario, if the length of packets destined for different
TCs is different, for example, 64B and 1500B packets destined for TC0 and
TC1 respectively. There is a problem that the bandwidth of the TC to which
large packets are sent is preempted by the TC to which small packets are
sent on the Kunpeng 920 network engine. As a result, the TC bandwidth
accuracy is inaccurate.
To solve this problem, this patch made the following adjustments:
1/ During initialization, firmware reports the capability bit indicating
whether the TM function is supported.
2/ The command word for configuring TC and port rate limiting is added,
instead of reusing the existing command word. And firmware configured
to the correct module.
3/ When the PF driver is loaded, firmware completes the default
initialization of the TC and port.
Fixes: c09c7847d892 ("net/hns3: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 5 ++-
drivers/net/hns3/hns3_cmd.h | 4 +++
drivers/net/hns3/hns3_dcb.c | 4 +--
drivers/net/hns3/hns3_dcb.h | 2 --
drivers/net/hns3/hns3_ethdev.h | 4 +++
drivers/net/hns3/hns3_tm.c | 69 +++++++++++++++++++++++++++++-------------
drivers/net/hns3/hns3_tm.h | 12 ++++++++
7 files changed, 74 insertions(+), 26 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 5f4d74d..ab92240 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -431,7 +431,8 @@ hns3_get_caps_name(uint32_t caps_id)
{ HNS3_CAPS_STASH_B, "stash" },
{ HNS3_CAPS_UDP_TUNNEL_CSUM_B, "udp_tunnel_csum" },
{ HNS3_CAPS_RAS_IMP_B, "ras_imp" },
- { HNS3_CAPS_RXD_ADV_LAYOUT_B, "rxd_adv_layout" }
+ { HNS3_CAPS_RXD_ADV_LAYOUT_B, "rxd_adv_layout" },
+ { HNS3_CAPS_TM_B, "tm_capability" }
};
uint32_t i;
@@ -507,6 +508,8 @@ hns3_parse_capability(struct hns3_hw *hw,
HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B, 1);
if (hns3_get_bit(caps, HNS3_CAPS_RAS_IMP_B))
hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_RAS_IMP_B, 1);
+ if (hns3_get_bit(caps, HNS3_CAPS_TM_B))
+ hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_TM_B, 1);
}
static uint32_t
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index a249a7a..cd58303 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -162,6 +162,9 @@ enum hns3_opcode_type {
HNS3_OPC_TM_INTERNAL_CNT = 0x0851,
HNS3_OPC_TM_INTERNAL_STS_1 = 0x0852,
+ HNS3_OPC_TM_PORT_LIMIT_RATE = 0x0870,
+ HNS3_OPC_TM_TC_LIMIT_RATE = 0x0871,
+
/* Mailbox cmd */
HNS3_OPC_MBX_VF_TO_PF = 0x2001,
@@ -319,6 +322,7 @@ enum HNS3_CAPS_BITS {
HNS3_CAPS_UDP_TUNNEL_CSUM_B,
HNS3_CAPS_RAS_IMP_B,
HNS3_CAPS_RXD_ADV_LAYOUT_B = 15,
+ HNS3_CAPS_TM_B = 17,
};
enum HNS3_API_CAP_BITS {
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index 8778452..61a2404 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -415,7 +415,7 @@ hns3_dcb_pg_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
return hns3_cmd_send(hw, &desc, 1);
}
-int
+static int
hns3_pg_shaper_rate_cfg(struct hns3_hw *hw, uint8_t pg_id, uint32_t rate)
{
struct hns3_shaper_parameter shaper_parameter;
@@ -551,7 +551,7 @@ hns3_dcb_pri_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
return hns3_cmd_send(hw, &desc, 1);
}
-int
+static int
hns3_pri_shaper_rate_cfg(struct hns3_hw *hw, uint8_t tc_no, uint32_t rate)
{
struct hns3_shaper_parameter shaper_parameter;
diff --git a/drivers/net/hns3/hns3_dcb.h b/drivers/net/hns3/hns3_dcb.h
index 279f163..1abe649 100644
--- a/drivers/net/hns3/hns3_dcb.h
+++ b/drivers/net/hns3/hns3_dcb.h
@@ -209,8 +209,6 @@ int hns3_queue_to_tc_mapping(struct hns3_hw *hw, uint16_t nb_rx_q,
int hns3_update_queue_map_configure(struct hns3_adapter *hns);
int hns3_port_shaper_update(struct hns3_hw *hw, uint32_t speed);
-int hns3_pg_shaper_rate_cfg(struct hns3_hw *hw, uint8_t pg_id, uint32_t rate);
-int hns3_pri_shaper_rate_cfg(struct hns3_hw *hw, uint8_t tc_no, uint32_t rate);
uint8_t hns3_txq_mapped_tc_get(struct hns3_hw *hw, uint16_t txq_no);
#endif /* _HNS3_DCB_H_ */
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index f3bc60e..31379fd 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -868,6 +868,7 @@ enum {
HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B,
HNS3_DEV_SUPPORT_RAS_IMP_B,
+ HNS3_DEV_SUPPORT_TM_B,
};
#define hns3_dev_dcb_supported(hw) \
@@ -904,6 +905,9 @@ enum {
#define hns3_dev_tx_push_supported(hw) \
hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TX_PUSH_B)
+#define hns3_dev_tm_supported(hw) \
+ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TM_B)
+
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
#define HNS3_DEV_PRIVATE_TO_PF(adapter) \
diff --git a/drivers/net/hns3/hns3_tm.c b/drivers/net/hns3/hns3_tm.c
index f7bfc25..81c61ad 100644
--- a/drivers/net/hns3/hns3_tm.c
+++ b/drivers/net/hns3/hns3_tm.c
@@ -28,8 +28,12 @@ void
hns3_tm_conf_init(struct rte_eth_dev *dev)
{
struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint32_t max_tx_queues = hns3_tm_max_tx_queues_get(dev);
+ if (!hns3_dev_tm_supported(hw))
+ return;
+
pf->tm_conf.nb_leaf_nodes_max = max_tx_queues;
pf->tm_conf.nb_nodes_max = 1 + HNS3_MAX_TC_NUM + max_tx_queues;
pf->tm_conf.nb_shaper_profile_max = 1 + HNS3_MAX_TC_NUM;
@@ -50,9 +54,13 @@ void
hns3_tm_conf_uninit(struct rte_eth_dev *dev)
{
struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct hns3_tm_shaper_profile *shaper_profile;
struct hns3_tm_node *tm_node;
+ if (!hns3_dev_tm_supported(hw))
+ return;
+
if (pf->tm_conf.nb_queue_node > 0) {
while ((tm_node = TAILQ_FIRST(&pf->tm_conf.queue_list))) {
TAILQ_REMOVE(&pf->tm_conf.queue_list, tm_node, node);
@@ -912,40 +920,39 @@ static int
hns3_tm_config_port_rate(struct hns3_hw *hw,
struct hns3_tm_shaper_profile *shaper_profile)
{
+ struct hns3_port_limit_rate_cmd *cfg;
+ struct hns3_cmd_desc desc;
uint32_t firmware_rate;
uint64_t rate;
+ int ret;
if (shaper_profile) {
rate = shaper_profile->profile.peak.rate;
firmware_rate = hns3_tm_rate_convert_tm2firmware(rate);
} else {
- firmware_rate = hw->dcb_info.pg_info[0].bw_limit;
+ firmware_rate = hw->max_tm_rate;
}
- /*
- * The TM shaper topology after device inited:
- * pri0 shaper --->|
- * pri1 shaper --->|
- * ... |----> pg0 shaper ----> port shaper
- * ... |
- * priX shaper --->|
- *
- * Because port shaper rate maybe changed by firmware, to avoid
- * concurrent configure, driver use pg0 shaper to achieve the rate limit
- * of port.
- *
- * The finally port rate = MIN(pg0 shaper rate, port shaper rate)
- */
- return hns3_pg_shaper_rate_cfg(hw, 0, firmware_rate);
+ hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_PORT_LIMIT_RATE, false);
+ cfg = (struct hns3_port_limit_rate_cmd *)desc.data;
+ cfg->speed = rte_cpu_to_le_32(firmware_rate);
+
+ ret = hns3_cmd_send(hw, &desc, 1);
+ if (ret)
+ hns3_err(hw, "failed to config port rate, ret = %d", ret);
+
+ return ret;
}
static int
-hns3_tm_config_tc_rate(struct hns3_hw *hw,
- uint8_t tc_no,
+hns3_tm_config_tc_rate(struct hns3_hw *hw, uint8_t tc_no,
struct hns3_tm_shaper_profile *shaper_profile)
{
+ struct hns3_tc_limit_rate_cmd *cfg;
+ struct hns3_cmd_desc desc;
uint32_t firmware_rate;
uint64_t rate;
+ int ret;
if (shaper_profile) {
rate = shaper_profile->profile.peak.rate;
@@ -954,7 +961,17 @@ hns3_tm_config_tc_rate(struct hns3_hw *hw,
firmware_rate = hw->dcb_info.tc_info[tc_no].bw_limit;
}
- return hns3_pri_shaper_rate_cfg(hw, tc_no, firmware_rate);
+ hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_TC_LIMIT_RATE, false);
+ cfg = (struct hns3_tc_limit_rate_cmd *)desc.data;
+ cfg->speed = rte_cpu_to_le_32(firmware_rate);
+ cfg->tc_id = tc_no;
+
+ ret = hns3_cmd_send(hw, &desc, 1);
+ if (ret)
+ hns3_err(hw, "failed to config tc (%u) rate, ret = %d",
+ tc_no, ret);
+
+ return ret;
}
static bool
@@ -1227,12 +1244,16 @@ static const struct rte_tm_ops hns3_tm_ops = {
};
int
-hns3_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
- void *arg)
+hns3_tm_ops_get(struct rte_eth_dev *dev, void *arg)
{
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
if (arg == NULL)
return -EINVAL;
+ if (!hns3_dev_tm_supported(hw))
+ return -EOPNOTSUPP;
+
*(const void **)arg = &hns3_tm_ops;
return 0;
@@ -1243,6 +1264,9 @@ hns3_tm_dev_start_proc(struct hns3_hw *hw)
{
struct hns3_pf *pf = HNS3_DEV_HW_TO_PF(hw);
+ if (!hns3_dev_tm_supported(hw))
+ return;
+
if (pf->tm_conf.root && !pf->tm_conf.committed)
hns3_warn(hw,
"please call hierarchy_commit() before starting the port.");
@@ -1289,6 +1313,9 @@ hns3_tm_conf_update(struct hns3_hw *hw)
struct hns3_pf *pf = HNS3_DEV_HW_TO_PF(hw);
struct rte_tm_error error;
+ if (!hns3_dev_tm_supported(hw))
+ return 0;
+
if (pf->tm_conf.root == NULL || !pf->tm_conf.committed)
return 0;
diff --git a/drivers/net/hns3/hns3_tm.h b/drivers/net/hns3/hns3_tm.h
index d8de3e4..2286d0e 100644
--- a/drivers/net/hns3/hns3_tm.h
+++ b/drivers/net/hns3/hns3_tm.h
@@ -9,6 +9,18 @@
#include <rte_tailq.h>
#include <rte_tm_driver.h>
+struct hns3_port_limit_rate_cmd {
+ uint32_t speed; /* Unit Mbps */
+ uint32_t rsvd[5];
+};
+
+struct hns3_tc_limit_rate_cmd {
+ uint32_t speed; /* Unit Mbps */
+ uint8_t tc_id;
+ uint8_t rsvd[3];
+ uint32_t rsvd1[4];
+};
+
enum hns3_tm_node_type {
HNS3_TM_NODE_TYPE_PORT,
HNS3_TM_NODE_TYPE_TC,
--
2.7.4

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From 8ae253ae5053753fd8225cc78d34ab5d2c449b5f Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Mon, 28 Jun 2021 10:57:50 +0800
Subject: [PATCH 12/26] config/arm: fix SVE build with GCC 8.3
If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
and the compiler is gcc-8.3, it will produce this error:
In file included from lib/eal/common/eal_common_options.c:38:
lib/eal/arm/include/rte_vect.h:13:10: fatal error:
arm_sve.h: No such file or directory
#include <arm_sve.h>
^~~~~~~~~~~
The root cause is that gcc-8.3 supports SVE (the macro
__ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1].
The solution:
a) Detect compiler whether support SVE ACLE, if support then define
RTE_HAS_SVE_ACLE macro.
b) Use the RTE_HAS_SVE_ACLE macro to include SVE header file.
[1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
<arm_sve.h>, user should include it when writing ACLE SVE code.
Fixes: 67b68824a82d ("lpm/arm: support SVE")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
config/arm/meson.build | 3 +++
lib/librte_eal/arm/include/rte_vect.h | 3 +++
lib/librte_lpm/rte_lpm.h | 4 ++++
3 files changed, 10 insertions(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index b18acea..06ecaf3 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -216,6 +216,9 @@ endif
if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
+ if (cc.check_header('arm_sve.h'))
+ dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)
+ endif
endif
if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h
index a739e6e..4b705ba 100644
--- a/lib/librte_eal/arm/include/rte_vect.h
+++ b/lib/librte_eal/arm/include/rte_vect.h
@@ -9,6 +9,9 @@
#include "generic/rte_vect.h"
#include "rte_debug.h"
#include "arm_neon.h"
+#ifdef RTE_HAS_SVE_ACLE
+#include <arm_sve.h>
+#endif
#ifdef __cplusplus
extern "C" {
diff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h
index 1afe55c..5eb14c1 100644
--- a/lib/librte_lpm/rte_lpm.h
+++ b/lib/librte_lpm/rte_lpm.h
@@ -402,7 +402,11 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
uint32_t defv);
#if defined(RTE_ARCH_ARM)
+#ifdef RTE_HAS_SVE_ACLE
+#include "rte_lpm_sve.h"
+#else
#include "rte_lpm_neon.h"
+#endif
#elif defined(RTE_ARCH_PPC_64)
#include "rte_lpm_altivec.h"
#else
--
2.7.4

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From 54cda7e32e96a2217e39de257c2dec42bb13a272 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Mon, 28 Jun 2021 10:57:51 +0800
Subject: [PATCH 13/26] net/hns3: fix Arm SVE build with GCC 8.3
If the target machine has SVE feature (e.g. '-march=armv8.2-a+sve'),
and compiler is gcc-8.3, it will fail, the error is arm_sve.h:
no such file or directory.
The solution:
a. If RTE_HAS_SVE_ACLE defined (it means the minimum instruction set
support SVE ACLE) then compiles it.
b. Else if the compiler support SVE ACLE then compiles it.
c. Otherwise don't compile it.
Fixes: 8c25b02b082a ("net/hns3: fix enabling SVE Rx/Tx")
Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
drivers/net/hns3/hns3_rxtx.c | 2 +-
drivers/net/hns3/meson.build | 26 ++++++++++++++++++++++----
2 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 51b727f..d8b79c3 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -2811,7 +2811,7 @@ hns3_get_default_vec_support(void)
static bool
hns3_get_sve_support(void)
{
-#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)
+#if defined(RTE_HAS_SVE_ACLE)
if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_256)
return false;
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE))
diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
index 6d78c33..bf602af 100644
--- a/drivers/net/hns3/meson.build
+++ b/drivers/net/hns3/meson.build
@@ -32,8 +32,26 @@ sources = files('hns3_cmd.c',
deps += ['hash']
if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
- sources += files('hns3_rxtx_vec.c')
- if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
- sources += files('hns3_rxtx_vec_sve.c')
- endif
+ sources += files('hns3_rxtx_vec.c')
+
+ # compile SVE when:
+ # a. support SVE in minimum instruction set baseline
+ # b. it's not minimum instruction set, but compiler support
+ if dpdk_conf.has('RTE_HAS_SVE_ACLE')
+ sources += files('hns3_rxtx_vec_sve.c')
+ elif cc.has_argument('-march=armv8.2-a+sve') and cc.check_header('arm_sve.h')
+ cflags += ['-DRTE_HAS_SVE_ACLE=1']
+ sve_cflags = []
+ foreach flag: cflags
+ if not (flag.startswith('-march=') or flag.startswith('-mcpu=') or flag.startswith('-mtune='))
+ sve_cflags += flag
+ endif
+ endforeach
+ hns3_sve_lib = static_library('hns3_sve_lib',
+ 'hns3_rxtx_vec_sve.c',
+ dependencies: [static_rte_ethdev],
+ include_directories: includes,
+ c_args: [sve_cflags, '-march=armv8.2-a+sve'])
+ objs += hns3_sve_lib.extract_objects('hns3_rxtx_vec_sve.c')
+ endif
endif
--
2.7.4

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@ -0,0 +1,146 @@
From ad113e20b6f776719d5abbb8b1635639a0998c68 Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Sat, 10 Jul 2021 09:58:32 +0800
Subject: [PATCH 14/26] net/hns3: query basic info for VF
There are some features of VF depend on PF, so it's necessary for VF
to know whether current PF supports. Therefore, the final capability
set of VF will be composed of the capability set of hardware and the
capability set of PF.
For compatibility reasons, the mailbox HNS3_MBX_GET_TCINFO has been
modified to obatin more basic information about the current PF, including
the communication interface version and current PF capabilities set.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.h | 1 +
drivers/net/hns3/hns3_ethdev_vf.c | 48 ++++++++++++++++++++++++---------------
drivers/net/hns3/hns3_mbx.h | 10 +++++++-
3 files changed, 40 insertions(+), 19 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 31379fd..0ecf812 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -488,6 +488,7 @@ struct hns3_hw {
struct hns3_rx_missed_stats imissed_stats;
uint64_t oerror_stats;
uint32_t fw_version;
+ uint16_t pf_vf_if_version; /* version of communication interface */
uint16_t num_msi;
uint16_t total_tqps_num; /* total task queue pairs of this PF */
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 2085a29..bb351be 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1409,26 +1409,38 @@ hns3vf_get_queue_depth(struct hns3_hw *hw)
}
static int
-hns3vf_get_tc_info(struct hns3_hw *hw)
+hns3vf_get_num_tc(struct hns3_hw *hw)
{
- uint8_t resp_msg;
- int ret;
+ uint8_t num_tc = 0;
uint32_t i;
- ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0,
- true, &resp_msg, sizeof(resp_msg));
+ for (i = 0; i < HNS3_MAX_TC_NUM; i++) {
+ if (hw->hw_tc_map & BIT(i))
+ num_tc++;
+ }
+ return num_tc;
+}
+
+static int
+hns3vf_get_basic_info(struct hns3_hw *hw)
+{
+ uint8_t resp_msg[HNS3_MBX_MAX_RESP_DATA_SIZE];
+ struct hns3_basic_info *basic_info;
+ int ret;
+
+ ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_BASIC_INFO, 0, NULL, 0,
+ true, resp_msg, sizeof(resp_msg));
if (ret) {
- hns3_err(hw, "VF request to get TC info from PF failed %d",
- ret);
+ hns3_err(hw, "failed to get basic info from PF, ret = %d.",
+ ret);
return ret;
}
- hw->hw_tc_map = resp_msg;
+ basic_info = (struct hns3_basic_info *)resp_msg;
+ hw->hw_tc_map = basic_info->hw_tc_map;
+ hw->num_tc = hns3vf_get_num_tc(hw);
+ hw->pf_vf_if_version = basic_info->pf_vf_if_version;
- for (i = 0; i < HNS3_MAX_TC_NUM; i++) {
- if (hw->hw_tc_map & BIT(i))
- hw->num_tc++;
- }
return 0;
}
@@ -1468,6 +1480,11 @@ hns3vf_get_configuration(struct hns3_hw *hw)
hns3vf_get_push_lsc_cap(hw);
+ /* Get basic info from PF */
+ ret = hns3vf_get_basic_info(hw);
+ if (ret)
+ return ret;
+
/* Get queue configuration from PF */
ret = hns3vf_get_queue_info(hw);
if (ret)
@@ -1483,12 +1500,7 @@ hns3vf_get_configuration(struct hns3_hw *hw)
if (ret)
return ret;
- ret = hns3vf_get_port_base_vlan_filter_state(hw);
- if (ret)
- return ret;
-
- /* Get tc configuration from PF */
- return hns3vf_get_tc_info(hw);
+ return hns3vf_get_port_base_vlan_filter_state(hw);
}
static int
diff --git a/drivers/net/hns3/hns3_mbx.h b/drivers/net/hns3/hns3_mbx.h
index e84ef6d..f6482cc 100644
--- a/drivers/net/hns3/hns3_mbx.h
+++ b/drivers/net/hns3/hns3_mbx.h
@@ -18,7 +18,7 @@ enum HNS3_MBX_OPCODE {
HNS3_MBX_API_NEGOTIATE, /* (VF -> PF) negotiate API version */
HNS3_MBX_GET_QINFO, /* (VF -> PF) get queue config */
HNS3_MBX_GET_QDEPTH, /* (VF -> PF) get queue depth */
- HNS3_MBX_GET_TCINFO, /* (VF -> PF) get TC config */
+ HNS3_MBX_GET_BASIC_INFO, /* (VF -> PF) get basic info */
HNS3_MBX_GET_RETA, /* (VF -> PF) get RETA */
HNS3_MBX_GET_RSS_KEY, /* (VF -> PF) get RSS key */
HNS3_MBX_GET_MAC_ADDR, /* (VF -> PF) get MAC addr */
@@ -47,6 +47,14 @@ enum HNS3_MBX_OPCODE {
HNS3_MBX_PUSH_LINK_STATUS = 201, /* (IMP -> PF) get port link status */
};
+struct hns3_basic_info {
+ uint8_t hw_tc_map;
+ uint8_t rsv;
+ uint16_t pf_vf_if_version;
+ /* capabilities of VF dependent on PF */
+ uint32_t caps;
+};
+
/* below are per-VF mac-vlan subcodes */
enum hns3_mbx_mac_vlan_subcode {
HNS3_MBX_MAC_VLAN_UC_MODIFY = 0, /* modify UC mac addr */
--
2.7.4

169
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@ -0,0 +1,169 @@
From 7e819e49263e3195e3b04f9a6c32113a6835d76c Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Sat, 10 Jul 2021 09:58:33 +0800
Subject: [PATCH 15/26] net/hns3: support VLAN filter state modify for VF
Since the HW limitation for VF, the VLAN filter is default enabled, and
is not allowed to be closed. Now, the limitation has been removed in
Kunpeng930 network engine, so this patch add support for VF to modify the
VLAN filter state.
A capabilities bit is added to differentiate between different platforms
and achieve compatibility. When the VF runs on an incomatible platform or
an incompatible kernel-mode driver version is used, the VF behavior is
the same as that before.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_cmd.h | 9 ++++++++
drivers/net/hns3/hns3_ethdev.h | 4 ++++
drivers/net/hns3/hns3_ethdev_vf.c | 48 ++++++++++++++++++++++++++++++++++++---
drivers/net/hns3/hns3_mbx.h | 1 +
4 files changed, 59 insertions(+), 3 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index cd58303..780ab0f 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -325,6 +325,15 @@ enum HNS3_CAPS_BITS {
HNS3_CAPS_TM_B = 17,
};
+/* Capabilities of VF dependent on the PF */
+enum HNS3VF_CAPS_BITS {
+ /*
+ * The following capability index definitions must be the same as those
+ * in kernel side PF.
+ */
+ HNS3VF_CAPS_VLAN_FLT_MOD_B = 0,
+};
+
enum HNS3_API_CAP_BITS {
HNS3_API_CAP_FLEX_RSS_TBL_B,
};
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 0ecf812..9a59483 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -870,6 +870,7 @@ enum {
HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B,
HNS3_DEV_SUPPORT_RAS_IMP_B,
HNS3_DEV_SUPPORT_TM_B,
+ HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B,
};
#define hns3_dev_dcb_supported(hw) \
@@ -909,6 +910,9 @@ enum {
#define hns3_dev_tm_supported(hw) \
hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TM_B)
+#define hns3_dev_vf_vlan_flt_supported(hw) \
+ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B)
+
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
#define HNS3_DEV_PRIVATE_TO_PF(adapter) \
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index bb351be..b62b059 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1408,6 +1408,14 @@ hns3vf_get_queue_depth(struct hns3_hw *hw)
return 0;
}
+static void
+hns3vf_update_caps(struct hns3_hw *hw, uint32_t caps)
+{
+ if (hns3_get_bit(caps, HNS3VF_CAPS_VLAN_FLT_MOD_B))
+ hns3_set_bit(hw->capability,
+ HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, 1);
+}
+
static int
hns3vf_get_num_tc(struct hns3_hw *hw)
{
@@ -1440,7 +1448,7 @@ hns3vf_get_basic_info(struct hns3_hw *hw)
hw->hw_tc_map = basic_info->hw_tc_map;
hw->num_tc = hns3vf_get_num_tc(hw);
hw->pf_vf_if_version = basic_info->pf_vf_if_version;
-
+ hns3vf_update_caps(hw, basic_info->caps);
return 0;
}
@@ -1611,6 +1619,26 @@ hns3vf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
}
static int
+hns3vf_en_vlan_filter(struct hns3_hw *hw, bool enable)
+{
+ uint8_t msg_data;
+ int ret;
+
+ if (!hns3_dev_vf_vlan_flt_supported(hw))
+ return 0;
+
+ msg_data = enable ? 1 : 0;
+ ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN,
+ HNS3_MBX_ENABLE_VLAN_FILTER, &msg_data,
+ sizeof(msg_data), true, NULL, 0);
+ if (ret)
+ hns3_err(hw, "%s vlan filter failed, ret = %d.",
+ enable ? "enable" : "disable", ret);
+
+ return ret;
+}
+
+static int
hns3vf_en_hw_strip_rxvtag(struct hns3_hw *hw, bool enable)
{
uint8_t msg_data;
@@ -1641,6 +1669,19 @@ hns3vf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
}
tmp_mask = (unsigned int)mask;
+
+ if (tmp_mask & ETH_VLAN_FILTER_MASK) {
+ rte_spinlock_lock(&hw->lock);
+ /* Enable or disable VLAN filter */
+ if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
+ ret = hns3vf_en_vlan_filter(hw, true);
+ else
+ ret = hns3vf_en_vlan_filter(hw, false);
+ rte_spinlock_unlock(&hw->lock);
+ if (ret)
+ return ret;
+ }
+
/* Vlan stripping setting */
if (tmp_mask & ETH_VLAN_STRIP_MASK) {
rte_spinlock_lock(&hw->lock);
@@ -1738,9 +1779,10 @@ hns3vf_dev_configure_vlan(struct rte_eth_dev *dev)
}
/* Apply vlan offload setting */
- ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
+ ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK |
+ ETH_VLAN_FILTER_MASK);
if (ret)
- hns3_err(hw, "dev config vlan offload failed, ret =%d", ret);
+ hns3_err(hw, "dev config vlan offload failed, ret = %d.", ret);
return ret;
}
diff --git a/drivers/net/hns3/hns3_mbx.h b/drivers/net/hns3/hns3_mbx.h
index f6482cc..2154c04 100644
--- a/drivers/net/hns3/hns3_mbx.h
+++ b/drivers/net/hns3/hns3_mbx.h
@@ -71,6 +71,7 @@ enum hns3_mbx_vlan_cfg_subcode {
HNS3_MBX_VLAN_TX_OFF_CFG, /* set tx side vlan offload */
HNS3_MBX_VLAN_RX_OFF_CFG, /* set rx side vlan offload */
HNS3_MBX_GET_PORT_BASE_VLAN_STATE = 4, /* get port based vlan state */
+ HNS3_MBX_ENABLE_VLAN_FILTER, /* set vlan filter state */
};
enum hns3_mbx_tbl_cfg_subcode {
--
2.7.4

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@ -0,0 +1,69 @@
From ec5421783ce5243f8bbad0f28db3d05e31e000d8 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sat, 10 Jul 2021 09:58:34 +0800
Subject: [PATCH 16/26] net/hns3: support multiple TC MAC pause
MAC PAUSE can take effect on a single TC or multiple TCs, depending on the
hardware. For example, the Kunpeng 920 supports MAC pause in a single TC,
and the Kunpeng 930 supports MAC pause in multiple TCs. This patch
supports MAC PAUSE in multiple TC for some hardware.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 5 ++++-
drivers/net/hns3/hns3_ethdev.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 7283364..b2ee831 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -3314,6 +3314,7 @@ hns3_get_capability(struct hns3_hw *hw)
pf->tqp_config_mode = HNS3_FIXED_MAX_TQP_NUM_MODE;
hw->rss_info.ipv6_sctp_offload_supported = false;
hw->udp_cksum_mode = HNS3_SPECIAL_PORT_SW_CKSUM_MODE;
+ pf->support_multi_tc_pause = false;
return 0;
}
@@ -3334,6 +3335,7 @@ hns3_get_capability(struct hns3_hw *hw)
pf->tqp_config_mode = HNS3_FLEX_MAX_TQP_NUM_MODE;
hw->rss_info.ipv6_sctp_offload_supported = true;
hw->udp_cksum_mode = HNS3_SPECIAL_PORT_HW_CKSUM_MODE;
+ pf->support_multi_tc_pause = true;
return 0;
}
@@ -6100,6 +6102,7 @@ static int
hns3_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
{
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct hns3_pf *pf = HNS3_DEV_PRIVATE_TO_PF(dev->data->dev_private);
int ret;
if (fc_conf->high_water || fc_conf->low_water ||
@@ -6129,7 +6132,7 @@ hns3_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
return -EOPNOTSUPP;
}
- if (hw->num_tc > 1) {
+ if (hw->num_tc > 1 && !pf->support_multi_tc_pause) {
hns3_err(hw, "in multi-TC scenarios, MAC pause is not supported.");
return -EOPNOTSUPP;
}
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 9a59483..bdad384 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -783,6 +783,7 @@ struct hns3_pf {
uint8_t prio_tc[HNS3_MAX_USER_PRIO]; /* TC indexed by prio */
uint16_t pause_time;
bool support_fc_autoneg; /* support FC autonegotiate */
+ bool support_multi_tc_pause;
uint16_t wanted_umv_size;
uint16_t max_umv_size;
--
2.7.4

74
0203-net-hns3-fix-residual-MAC-address-entry.patch Normal file
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@ -0,0 +1,74 @@
From 203d961619952ef99fda300b73c3a3c1edd725d3 Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Sat, 17 Jul 2021 10:02:49 +0800
Subject: [PATCH 17/26] net/hns3: fix residual MAC address entry
Currently, even if we fail to remove the origin MAC address from the HW,
the set_default_mac will go on, and add the new MAC address to the HW.
Eventually cause the original MAC address entry to remain in the HW, and
users may receive unexpected packets.
This patch make set_default_mac return directly to failure if deleting
the original MAC address fails, simplifying the behavior of the driver
and solving the problem of residual MAC address entry.
Fixes: 7d7f9f80bbfb ("net/hns3: support MAC address related operations")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 22 +++++++++-------------
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index b2ee831..ce7aa95 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -1748,7 +1748,6 @@ hns3_set_default_mac_addr(struct rte_eth_dev *dev,
struct rte_ether_addr *oaddr;
char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
bool default_addr_setted;
- bool rm_succes = false;
int ret, ret_val;
/*
@@ -1768,9 +1767,10 @@ hns3_set_default_mac_addr(struct rte_eth_dev *dev,
oaddr);
hns3_warn(hw, "Remove old uc mac address(%s) fail: %d",
mac_str, ret);
- rm_succes = false;
- } else
- rm_succes = true;
+
+ rte_spinlock_unlock(&hw->lock);
+ return ret;
+ }
}
ret = hns3_add_uc_addr_common(hw, mac_addr);
@@ -1805,16 +1805,12 @@ hns3_set_default_mac_addr(struct rte_eth_dev *dev,
}
err_add_uc_addr:
- if (rm_succes) {
- ret_val = hns3_add_uc_addr_common(hw, oaddr);
- if (ret_val) {
- hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
- oaddr);
- hns3_warn(hw,
- "Failed to restore old uc mac addr(%s): %d",
+ ret_val = hns3_add_uc_addr_common(hw, oaddr);
+ if (ret_val) {
+ hns3_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, oaddr);
+ hns3_warn(hw, "Failed to restore old uc mac addr(%s): %d",
mac_str, ret_val);
- hw->mac.default_addr_setted = false;
- }
+ hw->mac.default_addr_setted = false;
}
rte_spinlock_unlock(&hw->lock);
--
2.7.4

58
0204-net-hns3-remove-unnecessary-zero-assignments.patch Normal file
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@ -0,0 +1,58 @@
From 679b37031b1e747b5e03bdd74cd18cd885cb1f9e Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Sat, 17 Jul 2021 10:02:50 +0800
Subject: [PATCH 18/26] net/hns3: remove unnecessary zero assignments
The output parameter 'cap' was cleared at the function entry, the
latter zero assignment 'cap' fields was unnecessary, so delete them.
Fixes: c09c7847d892 ("net/hns3: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_tm.c | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/drivers/net/hns3/hns3_tm.c b/drivers/net/hns3/hns3_tm.c
index 81c61ad..cd32664 100644
--- a/drivers/net/hns3/hns3_tm.c
+++ b/drivers/net/hns3/hns3_tm.c
@@ -134,33 +134,15 @@ hns3_tm_capabilities_get(struct rte_eth_dev *dev,
cap->leaf_nodes_identical = 1;
cap->shaper_n_max = 1 + HNS3_MAX_TC_NUM;
cap->shaper_private_n_max = 1 + HNS3_MAX_TC_NUM;
- cap->shaper_private_dual_rate_n_max = 0;
- cap->shaper_private_rate_min = 0;
cap->shaper_private_rate_max =
hns3_tm_rate_convert_firmware2tm(hw->max_tm_rate);
- cap->shaper_shared_n_max = 0;
- cap->shaper_shared_n_nodes_per_shaper_max = 0;
- cap->shaper_shared_n_shapers_per_node_max = 0;
- cap->shaper_shared_dual_rate_n_max = 0;
- cap->shaper_shared_rate_min = 0;
- cap->shaper_shared_rate_max = 0;
cap->sched_n_children_max = max_tx_queues;
cap->sched_sp_n_priorities_max = 1;
- cap->sched_wfq_n_children_per_group_max = 0;
- cap->sched_wfq_n_groups_max = 0;
cap->sched_wfq_weight_max = 1;
- cap->cman_head_drop_supported = 0;
- cap->dynamic_update_mask = 0;
cap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;
cap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;
- cap->cman_wred_context_n_max = 0;
- cap->cman_wred_context_private_n_max = 0;
- cap->cman_wred_context_shared_n_max = 0;
- cap->cman_wred_context_shared_n_nodes_per_context_max = 0;
- cap->cman_wred_context_shared_n_contexts_per_node_max = 0;
- cap->stats_mask = 0;
return 0;
}
--
2.7.4

89
0205-net-hns3-fix-filter-parsing-comment.patch Normal file
View File

@ -0,0 +1,89 @@
From 4d98ab6b259c37da13ef2ecba882b39883478b04 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Sat, 17 Jul 2021 10:02:51 +0800
Subject: [PATCH 19/26] net/hns3: fix filter parsing comment
This patch fixed incorrect comment of hns3_parse_fdir_filter().
Fixes: fcba820d9b9e ("net/hns3: support flow director")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_flow.c | 59 +++++++++++++++++---------------------------
1 file changed, 23 insertions(+), 36 deletions(-)
diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c
index d405820..a38bb68 100644
--- a/drivers/net/hns3/hns3_flow.c
+++ b/drivers/net/hns3/hns3_flow.c
@@ -1134,42 +1134,29 @@ is_tunnel_packet(enum rte_flow_item_type type)
}
/*
- * Parse the rule to see if it is a IP or MAC VLAN flow director rule.
- * And get the flow director filter info BTW.
- * UDP/TCP/SCTP PATTERN:
- * The first not void item can be ETH or IPV4 or IPV6
- * The second not void item must be IPV4 or IPV6 if the first one is ETH.
- * The next not void item could be UDP or TCP or SCTP (optional)
- * The next not void item could be RAW (for flexbyte, optional)
- * The next not void item must be END.
- * A Fuzzy Match pattern can appear at any place before END.
- * Fuzzy Match is optional for IPV4 but is required for IPV6
- * MAC VLAN PATTERN:
- * The first not void item must be ETH.
- * The second not void item must be MAC VLAN.
- * The next not void item must be END.
- * ACTION:
- * The first not void action should be QUEUE or DROP.
- * The second not void optional action should be MARK,
- * mark_id is a uint32_t number.
- * The next not void action should be END.
- * UDP/TCP/SCTP pattern example:
- * ITEM Spec Mask
- * ETH NULL NULL
- * IPV4 src_addr 192.168.1.20 0xFFFFFFFF
- * dst_addr 192.167.3.50 0xFFFFFFFF
- * UDP/TCP/SCTP src_port 80 0xFFFF
- * dst_port 80 0xFFFF
- * END
- * MAC VLAN pattern example:
- * ITEM Spec Mask
- * ETH dst_addr
- {0xAC, 0x7B, 0xA1, {0xFF, 0xFF, 0xFF,
- 0x2C, 0x6D, 0x36} 0xFF, 0xFF, 0xFF}
- * MAC VLAN tci 0x2016 0xEFFF
- * END
- * Other members in mask and spec should set to 0x00.
- * Item->last should be NULL.
+ * Parse the flow director rule.
+ * The supported PATTERN:
+ * case: non-tunnel packet:
+ * ETH : src-mac, dst-mac, ethertype
+ * VLAN: tag1, tag2
+ * IPv4: src-ip, dst-ip, tos, proto
+ * IPv6: src-ip(last 32 bit addr), dst-ip(last 32 bit addr), proto
+ * UDP : src-port, dst-port
+ * TCP : src-port, dst-port
+ * SCTP: src-port, dst-port, tag
+ * case: tunnel packet:
+ * OUTER-ETH: ethertype
+ * OUTER-L3 : proto
+ * OUTER-L4 : src-port, dst-port
+ * TUNNEL : vni, flow-id(only valid when NVGRE)
+ * INNER-ETH/VLAN/IPv4/IPv6/UDP/TCP/SCTP: same as non-tunnel packet
+ * The supported ACTION:
+ * QUEUE
+ * DROP
+ * COUNT
+ * MARK: the id range [0, 4094]
+ * FLAG
+ * RSS: only valid if firmware support FD_QUEUE_REGION.
*/
static int
hns3_parse_fdir_filter(struct rte_eth_dev *dev,
--
2.7.4

77
0206-net-hns3-fix-timing-of-clearing-interrupt-source.patch Normal file
View File

@ -0,0 +1,77 @@
From ddd874645976918320694f9095f9a3892eaf4a4c Mon Sep 17 00:00:00 2001
From: Hongbo Zheng <zhenghongbo3@huawei.com>
Date: Sat, 17 Jul 2021 10:02:52 +0800
Subject: [PATCH 20/26] net/hns3: fix timing of clearing interrupt source
Currently, the PF/VF does not clear the interrupt source immediately
after receiving the interrupt. As a result, if the second interrupt
task is triggered when processing the first interrupt task, clearing
the interrupt source before exiting will clear the interrupt sources
of the two tasks at the same time. As a result, no interrupt is
triggered for the second task.
Clearing interrupt source immediately after checking event cause
ensures that:
1. Even if two interrupt tasks are triggered at the same time, they can
be processed.
2. If the second task is triggered during the processing of the first
task and the interrupt source is not cleared, the interrupt is reported
after vector0 is enabled.
Fixes: a5475d61fa34 ("net/hns3: support VF")
Fixes: 3988ab0eee52 ("net/hns3: add abnormal interrupt process")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 2 +-
drivers/net/hns3/hns3_ethdev_vf.c | 5 ++---
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index ce7aa95..f658e74 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -317,6 +317,7 @@ hns3_interrupt_handler(void *param)
vector0_int = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG);
ras_int = hns3_read_dev(hw, HNS3_RAS_PF_OTHER_INT_STS_REG);
cmdq_int = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG);
+ hns3_clear_event_cause(hw, event_cause, clearval);
/* vector 0 interrupt is shared with reset and mailbox source events. */
if (event_cause == HNS3_VECTOR0_EVENT_ERR) {
hns3_warn(hw, "received interrupt: vector0_int_stat:0x%x "
@@ -335,7 +336,6 @@ hns3_interrupt_handler(void *param)
vector0_int, ras_int, cmdq_int);
}
- hns3_clear_event_cause(hw, event_cause, clearval);
/* Enable interrupt if it is not cause by reset */
hns3_pf_enable_irq0(hw);
}
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index b62b059..9e3b31e 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1116,6 +1116,8 @@ hns3vf_interrupt_handler(void *param)
/* Read out interrupt causes */
event_cause = hns3vf_check_event_cause(hns, &clearval);
+ /* Clear interrupt causes */
+ hns3vf_clear_event_cause(hw, clearval);
switch (event_cause) {
case HNS3VF_VECTOR0_EVENT_RST:
@@ -1128,9 +1130,6 @@ hns3vf_interrupt_handler(void *param)
break;
}
- /* Clear interrupt causes */
- hns3vf_clear_event_cause(hw, clearval);
-
/* Enable interrupt */
hns3vf_enable_irq0(hw);
}
--
2.7.4

41
0207-net-hns3-remove-duplicate-compile-time-check.patch Normal file
View File

@ -0,0 +1,41 @@
From 41c5bde109b81c37c50d407e9d82eebdd4253b79 Mon Sep 17 00:00:00 2001
From: Chengchang Tang <tangchengchang@huawei.com>
Date: Sat, 17 Jul 2021 10:02:53 +0800
Subject: [PATCH 21/26] net/hns3: remove duplicate compile-time check
This patch delete duplicate compile-time check.
Fixes: cb12e988f35f ("net/hns3: add compile-time verification on Rx vector")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_rxtx_vec.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/net/hns3/hns3_rxtx_vec.c b/drivers/net/hns3/hns3_rxtx_vec.c
index 5fdc1d5..e37e858 100644
--- a/drivers/net/hns3/hns3_rxtx_vec.c
+++ b/drivers/net/hns3/hns3_rxtx_vec.c
@@ -172,8 +172,6 @@ hns3_rxq_vec_setup_rearm_data(struct hns3_rx_queue *rxq)
offsetof(struct rte_mbuf, rearm_data));
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) <
offsetof(struct rte_mbuf, rearm_data));
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) <
- offsetof(struct rte_mbuf, rearm_data));
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, nb_segs) <
offsetof(struct rte_mbuf, rearm_data));
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, port) <
@@ -182,8 +180,6 @@ hns3_rxq_vec_setup_rearm_data(struct hns3_rx_queue *rxq)
offsetof(struct rte_mbuf, rearm_data) > 6);
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) -
offsetof(struct rte_mbuf, rearm_data) > 6);
- RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) -
- offsetof(struct rte_mbuf, rearm_data) > 6);
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, nb_segs) -
offsetof(struct rte_mbuf, rearm_data) > 6);
RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, port) -
--
2.7.4

62
0208-net-hns3-move-speed-auto-negotiation-warning.patch Normal file
View File

@ -0,0 +1,62 @@
From 7c10ec3ea203c6190df96a72f5169a4674b8ea74 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sat, 17 Jul 2021 10:02:54 +0800
Subject: [PATCH 22/26] net/hns3: move speed auto-negotiation warning
PF driver prints a warning on device that does not support auto-negotiation
when user does not configure "link_speeds" (default 0), which means
auto-negotiation. Currently, this warning information is printed in
dev_configure stage and a success is returned. Perhaps the user may call
dev_configure multiple times before dev_start for some reason or purpose.
In this case, this message may be printed multiple times. So this patch
moves it to dev_start stage.
Fixes: cfc9fe48c4d4 ("net/hns3: move link speeds check to configure")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index f658e74..c8f283c 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2437,14 +2437,11 @@ hns3_check_link_speed(struct hns3_hw *hw, uint32_t link_speeds)
/*
* Some hardware doesn't support auto-negotiation, but users may not
* configure link_speeds (default 0), which means auto-negotiation.
- * In this case, a warning message need to be printed, instead of
- * an error.
+ * In this case, it should return success.
*/
if (link_speeds == ETH_LINK_SPEED_AUTONEG &&
- hw->mac.support_autoneg == 0) {
- hns3_warn(hw, "auto-negotiation is not supported, use default fixed speed!");
+ hw->mac.support_autoneg == 0)
return 0;
- }
if (link_speeds != ETH_LINK_SPEED_AUTONEG) {
ret = hns3_check_port_speed(hw, link_speeds);
@@ -5512,10 +5509,13 @@ hns3_set_fiber_port_link_speed(struct hns3_hw *hw,
/*
* Some hardware doesn't support auto-negotiation, but users may not
* configure link_speeds (default 0), which means auto-negotiation.
- * In this case, it should return success.
+ * In this case, a warning message need to be printed, instead of
+ * an error.
*/
- if (cfg->autoneg)
+ if (cfg->autoneg) {
+ hns3_warn(hw, "auto-negotiation is not supported, use default fixed speed!");
return 0;
+ }
return hns3_cfg_mac_speed_dup(hw, cfg->speed, cfg->duplex);
}
--
2.7.4

454
0209-net-hns3-fix-flow-rule-list-in-multi-process.patch Normal file
View File

@ -0,0 +1,454 @@
From a1caa97a8ece52a98a5c1d06b397e3e370a65501 Mon Sep 17 00:00:00 2001
From: Chengwen Feng <fengchengwen@huawei.com>
Date: Sat, 17 Jul 2021 10:02:55 +0800
Subject: [PATCH 23/26] net/hns3: fix flow rule list in multi-process
Currently, hns3 driver saves rte_flow list into the
rte_eth_dev.process_private field, it may cause following problem:
The FDIR/RSS rules cannot be managed in a unified manner because
the management structure is not visible between processes.
This patch fixes it by moving rte_flow list to struct hns3_hw which is
visible between processes.
Fixes: fcba820d9b9e ("net/hns3: support flow director")
Fixes: c37ca66f2b27 ("net/hns3: support RSS")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 24 ++-------
drivers/net/hns3/hns3_ethdev.h | 3 ++
drivers/net/hns3/hns3_ethdev_vf.c | 24 ++-------
drivers/net/hns3/hns3_fdir.h | 7 +--
drivers/net/hns3/hns3_flow.c | 101 +++++++++++++++++++-------------------
5 files changed, 60 insertions(+), 99 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index c8f283c..4c2dcee 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -5289,6 +5289,7 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev)
hns3_rss_uninit(hns);
(void)hns3_config_gro(hw, false);
hns3_promisc_uninit(hw);
+ hns3_flow_uninit(eth_dev);
hns3_fdir_filter_uninit(hns);
hns3_uninit_umv_space(hw);
hns3_tqp_stats_uninit(hw);
@@ -5915,11 +5916,8 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
struct hns3_hw *hw = &hns->hw;
int ret = 0;
- if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- }
if (hw->adapter_state == HNS3_NIC_STARTED)
ret = hns3_dev_stop(eth_dev);
@@ -5934,8 +5932,6 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
hns3_uninit_pf(eth_dev);
hns3_free_all_queues(eth_dev);
rte_free(hw->reset.wait_data);
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
hns3_mp_uninit_primary();
hns3_warn(hw, "Close port %u finished", hw->data->port_id);
@@ -7395,15 +7391,6 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
- eth_dev->process_private = (struct hns3_process_private *)
- rte_zmalloc_socket("hns3_filter_list",
- sizeof(struct hns3_process_private),
- RTE_CACHE_LINE_SIZE, eth_dev->device->numa_node);
- if (eth_dev->process_private == NULL) {
- PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
- return -ENOMEM;
- }
-
hns3_flow_init(eth_dev);
hns3_set_rxtx_function(eth_dev);
@@ -7507,8 +7494,6 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->tx_pkt_burst = NULL;
eth_dev->tx_pkt_prepare = NULL;
eth_dev->tx_descriptor_status = NULL;
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
return ret;
}
@@ -7520,11 +7505,8 @@ hns3_dev_uninit(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
- if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- }
if (hw->adapter_state < HNS3_NIC_CLOSING)
hns3_dev_close(eth_dev);
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index bdad384..0b5d102 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -630,6 +630,9 @@ struct hns3_hw {
struct hns3_port_base_vlan_config port_base_vlan_cfg;
pthread_mutex_t flows_lock; /* rte_flow ops lock */
+ struct hns3_fdir_rule_list flow_fdir_list; /* flow fdir rule list */
+ struct hns3_rss_filter_list flow_rss_list; /* flow RSS rule list */
+ struct hns3_flow_mem_list flow_list;
/*
* PMD setup and configuration is not thread safe. Since it is not
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 9e3b31e..fc088f8 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -2071,6 +2071,7 @@ hns3vf_uninit_vf(struct rte_eth_dev *eth_dev)
(void)hns3_config_gro(hw, false);
(void)hns3vf_set_alive(hw, false);
(void)hns3vf_set_promisc_mode(hw, false, false, false);
+ hns3_flow_uninit(eth_dev);
hns3_tqp_stats_uninit(hw);
hns3vf_disable_irq0(hw);
rte_intr_disable(&pci_dev->intr_handle);
@@ -2186,11 +2187,8 @@ hns3vf_dev_close(struct rte_eth_dev *eth_dev)
struct hns3_hw *hw = &hns->hw;
int ret = 0;
- if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- }
if (hw->adapter_state == HNS3_NIC_STARTED)
ret = hns3vf_dev_stop(eth_dev);
@@ -2204,8 +2202,6 @@ hns3vf_dev_close(struct rte_eth_dev *eth_dev)
hns3vf_uninit_vf(eth_dev);
hns3_free_all_queues(eth_dev);
rte_free(hw->reset.wait_data);
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
hns3_mp_uninit_primary();
hns3_warn(hw, "Close port %u finished", hw->data->port_id);
@@ -2959,15 +2955,6 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
- eth_dev->process_private = (struct hns3_process_private *)
- rte_zmalloc_socket("hns3_filter_list",
- sizeof(struct hns3_process_private),
- RTE_CACHE_LINE_SIZE, eth_dev->device->numa_node);
- if (eth_dev->process_private == NULL) {
- PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
- return -ENOMEM;
- }
-
hns3_flow_init(eth_dev);
hns3_set_rxtx_function(eth_dev);
@@ -3069,8 +3056,6 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->tx_pkt_burst = NULL;
eth_dev->tx_pkt_prepare = NULL;
eth_dev->tx_descriptor_status = NULL;
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
return ret;
}
@@ -3083,11 +3068,8 @@ hns3vf_dev_uninit(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE();
- if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
- rte_free(eth_dev->process_private);
- eth_dev->process_private = NULL;
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- }
if (hw->adapter_state < HNS3_NIC_CLOSING)
hns3vf_dev_close(eth_dev);
diff --git a/drivers/net/hns3/hns3_fdir.h b/drivers/net/hns3/hns3_fdir.h
index d64af85..d7b31d8 100644
--- a/drivers/net/hns3/hns3_fdir.h
+++ b/drivers/net/hns3/hns3_fdir.h
@@ -189,12 +189,6 @@ TAILQ_HEAD(hns3_fdir_rule_list, hns3_fdir_rule_ele);
TAILQ_HEAD(hns3_rss_filter_list, hns3_rss_conf_ele);
TAILQ_HEAD(hns3_flow_mem_list, hns3_flow_mem);
-struct hns3_process_private {
- struct hns3_fdir_rule_list fdir_list;
- struct hns3_rss_filter_list filter_rss_list;
- struct hns3_flow_mem_list flow_list;
-};
-
/*
* A structure used to define fields of a FDIR related info.
*/
@@ -220,6 +214,7 @@ int hns3_fdir_filter_program(struct hns3_adapter *hns,
int hns3_clear_all_fdir_filter(struct hns3_adapter *hns);
int hns3_get_count(struct hns3_hw *hw, uint32_t id, uint64_t *value);
void hns3_flow_init(struct rte_eth_dev *dev);
+void hns3_flow_uninit(struct rte_eth_dev *dev);
int hns3_restore_all_fdir_filter(struct hns3_adapter *hns);
#endif /* _HNS3_FDIR_H_ */
diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c
index a38bb68..6c1e727 100644
--- a/drivers/net/hns3/hns3_flow.c
+++ b/drivers/net/hns3/hns3_flow.c
@@ -1202,54 +1202,34 @@ hns3_parse_fdir_filter(struct rte_eth_dev *dev,
return hns3_handle_actions(dev, actions, rule, error);
}
-void
-hns3_flow_init(struct rte_eth_dev *dev)
-{
- struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- struct hns3_process_private *process_list = dev->process_private;
- pthread_mutexattr_t attr;
-
- if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
- pthread_mutexattr_init(&attr);
- pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED);
- pthread_mutex_init(&hw->flows_lock, &attr);
- dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
- }
-
- TAILQ_INIT(&process_list->fdir_list);
- TAILQ_INIT(&process_list->filter_rss_list);
- TAILQ_INIT(&process_list->flow_list);
-}
-
static void
hns3_filterlist_flush(struct rte_eth_dev *dev)
{
- struct hns3_process_private *process_list = dev->process_private;
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct hns3_fdir_rule_ele *fdir_rule_ptr;
struct hns3_rss_conf_ele *rss_filter_ptr;
struct hns3_flow_mem *flow_node;
- fdir_rule_ptr = TAILQ_FIRST(&process_list->fdir_list);
+ fdir_rule_ptr = TAILQ_FIRST(&hw->flow_fdir_list);
while (fdir_rule_ptr) {
- TAILQ_REMOVE(&process_list->fdir_list, fdir_rule_ptr, entries);
+ TAILQ_REMOVE(&hw->flow_fdir_list, fdir_rule_ptr, entries);
rte_free(fdir_rule_ptr);
- fdir_rule_ptr = TAILQ_FIRST(&process_list->fdir_list);
+ fdir_rule_ptr = TAILQ_FIRST(&hw->flow_fdir_list);
}
- rss_filter_ptr = TAILQ_FIRST(&process_list->filter_rss_list);
+ rss_filter_ptr = TAILQ_FIRST(&hw->flow_rss_list);
while (rss_filter_ptr) {
- TAILQ_REMOVE(&process_list->filter_rss_list, rss_filter_ptr,
- entries);
+ TAILQ_REMOVE(&hw->flow_rss_list, rss_filter_ptr, entries);
rte_free(rss_filter_ptr);
- rss_filter_ptr = TAILQ_FIRST(&process_list->filter_rss_list);
+ rss_filter_ptr = TAILQ_FIRST(&hw->flow_rss_list);
}
- flow_node = TAILQ_FIRST(&process_list->flow_list);
+ flow_node = TAILQ_FIRST(&hw->flow_list);
while (flow_node) {
- TAILQ_REMOVE(&process_list->flow_list, flow_node, entries);
+ TAILQ_REMOVE(&hw->flow_list, flow_node, entries);
rte_free(flow_node->flow);
rte_free(flow_node);
- flow_node = TAILQ_FIRST(&process_list->flow_list);
+ flow_node = TAILQ_FIRST(&hw->flow_list);
}
}
@@ -1519,7 +1499,6 @@ static int
hns3_config_rss_filter(struct rte_eth_dev *dev,
const struct hns3_rss_conf *conf, bool add)
{
- struct hns3_process_private *process_list = dev->process_private;
struct hns3_adapter *hns = dev->data->dev_private;
struct hns3_rss_conf_ele *rss_filter_ptr;
struct hns3_hw *hw = &hns->hw;
@@ -1604,7 +1583,7 @@ hns3_config_rss_filter(struct rte_eth_dev *dev,
* When create a new RSS rule, the old rule will be overlaid and set
* invalid.
*/
- TAILQ_FOREACH(rss_filter_ptr, &process_list->filter_rss_list, entries)
+ TAILQ_FOREACH(rss_filter_ptr, &hw->flow_rss_list, entries)
rss_filter_ptr->filter_info.valid = false;
rss_config_err:
@@ -1616,7 +1595,6 @@ hns3_config_rss_filter(struct rte_eth_dev *dev,
static int
hns3_clear_rss_filter(struct rte_eth_dev *dev)
{
- struct hns3_process_private *process_list = dev->process_private;
struct hns3_adapter *hns = dev->data->dev_private;
struct hns3_rss_conf_ele *rss_filter_ptr;
struct hns3_hw *hw = &hns->hw;
@@ -1624,10 +1602,9 @@ hns3_clear_rss_filter(struct rte_eth_dev *dev)
int rss_rule_fail_cnt = 0; /* count for failure of clearing RSS rules */
int ret = 0;
- rss_filter_ptr = TAILQ_FIRST(&process_list->filter_rss_list);
+ rss_filter_ptr = TAILQ_FIRST(&hw->flow_rss_list);
while (rss_filter_ptr) {
- TAILQ_REMOVE(&process_list->filter_rss_list, rss_filter_ptr,
- entries);
+ TAILQ_REMOVE(&hw->flow_rss_list, rss_filter_ptr, entries);
ret = hns3_config_rss_filter(dev, &rss_filter_ptr->filter_info,
false);
if (ret)
@@ -1635,7 +1612,7 @@ hns3_clear_rss_filter(struct rte_eth_dev *dev)
else
rss_rule_succ_cnt++;
rte_free(rss_filter_ptr);
- rss_filter_ptr = TAILQ_FIRST(&process_list->filter_rss_list);
+ rss_filter_ptr = TAILQ_FIRST(&hw->flow_rss_list);
}
if (rss_rule_fail_cnt) {
@@ -1739,7 +1716,6 @@ hns3_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
const struct rte_flow_action actions[],
struct rte_flow_error *error)
{
- struct hns3_process_private *process_list = dev->process_private;
struct hns3_adapter *hns = dev->data->dev_private;
struct hns3_hw *hw = &hns->hw;
const struct hns3_rss_conf *rss_conf;
@@ -1771,7 +1747,7 @@ hns3_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
}
flow_node->flow = flow;
- TAILQ_INSERT_TAIL(&process_list->flow_list, flow_node, entries);
+ TAILQ_INSERT_TAIL(&hw->flow_list, flow_node, entries);
act = hns3_find_rss_general_action(pattern, actions);
if (act) {
@@ -1793,8 +1769,7 @@ hns3_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
hns3_rss_conf_copy(&rss_filter_ptr->filter_info,
&rss_conf->conf);
rss_filter_ptr->filter_info.valid = true;
- TAILQ_INSERT_TAIL(&process_list->filter_rss_list,
- rss_filter_ptr, entries);
+ TAILQ_INSERT_TAIL(&hw->flow_rss_list, rss_filter_ptr, entries);
flow->rule = rss_filter_ptr;
flow->filter_type = RTE_ETH_FILTER_HASH;
@@ -1828,8 +1803,7 @@ hns3_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
if (!ret) {
memcpy(&fdir_rule_ptr->fdir_conf, &fdir_rule,
sizeof(struct hns3_fdir_rule));
- TAILQ_INSERT_TAIL(&process_list->fdir_list,
- fdir_rule_ptr, entries);
+ TAILQ_INSERT_TAIL(&hw->flow_fdir_list, fdir_rule_ptr, entries);
flow->rule = fdir_rule_ptr;
flow->filter_type = RTE_ETH_FILTER_FDIR;
@@ -1844,7 +1818,7 @@ hns3_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
rte_flow_error_set(error, -ret, RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
"Failed to create flow");
out:
- TAILQ_REMOVE(&process_list->flow_list, flow_node, entries);
+ TAILQ_REMOVE(&hw->flow_list, flow_node, entries);
rte_free(flow_node);
rte_free(flow);
return NULL;
@@ -1855,13 +1829,13 @@ static int
hns3_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,
struct rte_flow_error *error)
{
- struct hns3_process_private *process_list = dev->process_private;
struct hns3_adapter *hns = dev->data->dev_private;
struct hns3_fdir_rule_ele *fdir_rule_ptr;
struct hns3_rss_conf_ele *rss_filter_ptr;
struct hns3_flow_mem *flow_node;
enum rte_filter_type filter_type;
struct hns3_fdir_rule fdir_rule;
+ struct hns3_hw *hw = &hns->hw;
int ret;
if (flow == NULL)
@@ -1884,7 +1858,7 @@ hns3_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,
"Destroy FDIR fail.Try again");
if (fdir_rule.flags & HNS3_RULE_FLAG_COUNTER)
hns3_counter_release(dev, fdir_rule.act_cnt.id);
- TAILQ_REMOVE(&process_list->fdir_list, fdir_rule_ptr, entries);
+ TAILQ_REMOVE(&hw->flow_fdir_list, fdir_rule_ptr, entries);
rte_free(fdir_rule_ptr);
fdir_rule_ptr = NULL;
break;
@@ -1897,8 +1871,7 @@ hns3_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,
RTE_FLOW_ERROR_TYPE_HANDLE,
flow,
"Destroy RSS fail.Try again");
- TAILQ_REMOVE(&process_list->filter_rss_list, rss_filter_ptr,
- entries);
+ TAILQ_REMOVE(&hw->flow_rss_list, rss_filter_ptr, entries);
rte_free(rss_filter_ptr);
rss_filter_ptr = NULL;
break;
@@ -1908,10 +1881,9 @@ hns3_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,
"Unsupported filter type");
}
- TAILQ_FOREACH(flow_node, &process_list->flow_list, entries) {
+ TAILQ_FOREACH(flow_node, &hw->flow_list, entries) {
if (flow_node->flow == flow) {
- TAILQ_REMOVE(&process_list->flow_list, flow_node,
- entries);
+ TAILQ_REMOVE(&hw->flow_list, flow_node, entries);
rte_free(flow_node);
flow_node = NULL;
break;
@@ -2115,3 +2087,30 @@ hns3_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
return ret;
}
+
+void
+hns3_flow_init(struct rte_eth_dev *dev)
+{
+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ pthread_mutexattr_t attr;
+
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return;
+
+ pthread_mutexattr_init(&attr);
+ pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED);
+ pthread_mutex_init(&hw->flows_lock, &attr);
+ dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
+
+ TAILQ_INIT(&hw->flow_fdir_list);
+ TAILQ_INIT(&hw->flow_rss_list);
+ TAILQ_INIT(&hw->flow_list);
+}
+
+void
+hns3_flow_uninit(struct rte_eth_dev *dev)
+{
+ struct rte_flow_error error;
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+ hns3_flow_flush_wrap(dev, &error);
+}
\ No newline at end of file
--
2.7.4

39
0210-net-hns3-fix-Tx-prepare-after-stop.patch Normal file
View File

@ -0,0 +1,39 @@
From c0e77e78921b2b7de78738c8d023bf5a4dac5383 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sat, 17 Jul 2021 10:02:56 +0800
Subject: [PATCH 24/26] net/hns3: fix Tx prepare after stop
In some special scenarios, such as TSO scenarios, the user layer may need
to call the tx_pkt_prepare(), and then call tx_pkt_burst() to send packets.
If the return value of tx_pkt_parepare() isn't equal to the numbers of
packets requested to send, warning message may be printed at the user
layer. Currently, tx_pkt_prepare() is assigned to dummy function when
dev_stop() is called in hns3 PMD. At this moment, if user layer continues
to send packets, the warning message will always be printed. So this patch
modifies the address to NULL.
Fixes: 2790c6464725 ("net/hns3: support device reset")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_rxtx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index d8b79c3..d50cfc6 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -4386,7 +4386,7 @@ void hns3_set_rxtx_function(struct rte_eth_dev *eth_dev)
} else {
eth_dev->rx_pkt_burst = hns3_dummy_rxtx_burst;
eth_dev->tx_pkt_burst = hns3_dummy_rxtx_burst;
- eth_dev->tx_pkt_prepare = hns3_dummy_rxtx_burst;
+ eth_dev->tx_pkt_prepare = NULL;
}
}
--
2.7.4

197
0211-net-hns3-disable-PFC-if-not-configured.patch Normal file
View File

@ -0,0 +1,197 @@
From adcff6f726ed3345c9d4ad0182de22d2e57459d8 Mon Sep 17 00:00:00 2001
From: Huisong Li <lihuisong@huawei.com>
Date: Sat, 17 Jul 2021 09:04:19 +0800
Subject: [PATCH 25/26] net/hns3: disable PFC if not configured
If "dcb_capability_en" in "data->dev_conf" delivered from the dev_configure
does not have the ETH_DCB_PFC_SUPPORT flag, the user wants to disable PFC,
and only enable ETS. Therefore, this patch supports the function of
disabling PFC by the field. In addition, this patch updates
"current_fc_status" of the driver based on the flow control mode requested
by user so as to enable the flow control mode in multi-TC scenarios.
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_dcb.c | 112 ++++++++++++++++++--------------------------
1 file changed, 45 insertions(+), 67 deletions(-)
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index 61a2404..4d5b00b 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -1400,42 +1400,22 @@ hns3_dcb_undrop_tc_map(struct hns3_hw *hw, uint8_t pfc_en)
return pfc_map;
}
-static void
-hns3_dcb_cfg_validate(struct hns3_adapter *hns, uint8_t *tc, bool *changed)
+static uint8_t
+hns3_dcb_parse_num_tc(struct hns3_adapter *hns)
{
struct rte_eth_dcb_rx_conf *dcb_rx_conf;
struct hns3_hw *hw = &hns->hw;
- uint16_t nb_rx_q = hw->data->nb_rx_queues;
- uint16_t nb_tx_q = hw->data->nb_tx_queues;
- uint8_t max_tc = 0;
- uint8_t pfc_en;
+ uint8_t max_tc_id = 0;
int i;
dcb_rx_conf = &hw->data->dev_conf.rx_adv_conf.dcb_rx_conf;
for (i = 0; i < HNS3_MAX_USER_PRIO; i++) {
- if (dcb_rx_conf->dcb_tc[i] != hw->dcb_info.prio_tc[i])
- *changed = true;
-
- if (dcb_rx_conf->dcb_tc[i] > max_tc)
- max_tc = dcb_rx_conf->dcb_tc[i];
+ if (dcb_rx_conf->dcb_tc[i] > max_tc_id)
+ max_tc_id = dcb_rx_conf->dcb_tc[i];
}
- *tc = max_tc + 1;
- if (*tc != hw->dcb_info.num_tc)
- *changed = true;
-
- /*
- * We ensure that dcb information can be reconfigured
- * after the hns3_priority_flow_ctrl_set function called.
- */
- if (hw->requested_fc_mode != HNS3_FC_FULL)
- *changed = true;
- pfc_en = RTE_LEN2MASK((uint8_t)dcb_rx_conf->nb_tcs, uint8_t);
- if (hw->dcb_info.pfc_en != pfc_en)
- *changed = true;
- /* tx/rx queue number is reconfigured. */
- if (nb_rx_q != hw->used_rx_queues || nb_tx_q != hw->used_tx_queues)
- *changed = true;
+ /* Number of TC is equal to max_tc_id plus 1. */
+ return max_tc_id + 1;
}
static int
@@ -1567,36 +1547,30 @@ hns3_dcb_hw_configure(struct hns3_adapter *hns)
hw->dcb_info.hw_pfc_map =
hns3_dcb_undrop_tc_map(hw, hw->dcb_info.pfc_en);
- ret = hns3_buffer_alloc(hw);
- if (ret)
- goto buffer_alloc_fail;
-
hw->current_fc_status = HNS3_FC_STATUS_PFC;
hw->requested_fc_mode = HNS3_FC_FULL;
- ret = hns3_dcb_pause_setup_hw(hw);
- if (ret) {
- hns3_err(hw, "setup pfc failed! ret = %d", ret);
- goto pfc_setup_fail;
- }
} else {
- /*
- * Although dcb_capability_en is lack of ETH_DCB_PFC_SUPPORT
- * flag, the DCB information is configured, such as tc numbers.
- * Therefore, refreshing the allocation of packet buffer is
- * necessary.
- */
- ret = hns3_buffer_alloc(hw);
- if (ret)
- return ret;
+ hw->current_fc_status = HNS3_FC_STATUS_NONE;
+ hw->requested_fc_mode = HNS3_FC_NONE;
+ hw->dcb_info.pfc_en = 0;
+ hw->dcb_info.hw_pfc_map = 0;
+ }
+
+ ret = hns3_buffer_alloc(hw);
+ if (ret)
+ goto cfg_fail;
+
+ ret = hns3_dcb_pause_setup_hw(hw);
+ if (ret) {
+ hns3_err(hw, "setup pfc failed! ret = %d", ret);
+ goto cfg_fail;
}
return 0;
-pfc_setup_fail:
+cfg_fail:
hw->requested_fc_mode = requested_fc_mode;
hw->current_fc_status = fc_status;
-
-buffer_alloc_fail:
hw->dcb_info.pfc_en = pfc_en;
hw->dcb_info.hw_pfc_map = hw_pfc_map;
@@ -1612,23 +1586,20 @@ int
hns3_dcb_configure(struct hns3_adapter *hns)
{
struct hns3_hw *hw = &hns->hw;
- bool map_changed = false;
- uint8_t num_tc = 0;
+ uint8_t num_tc;
int ret;
- hns3_dcb_cfg_validate(hns, &num_tc, &map_changed);
- if (map_changed) {
- ret = hns3_dcb_info_update(hns, num_tc);
- if (ret) {
- hns3_err(hw, "dcb info update failed: %d", ret);
- return ret;
- }
+ num_tc = hns3_dcb_parse_num_tc(hns);
+ ret = hns3_dcb_info_update(hns, num_tc);
+ if (ret) {
+ hns3_err(hw, "dcb info update failed: %d", ret);
+ return ret;
+ }
- ret = hns3_dcb_hw_configure(hns);
- if (ret) {
- hns3_err(hw, "dcb sw configure failed: %d", ret);
- return ret;
- }
+ ret = hns3_dcb_hw_configure(hns);
+ if (ret) {
+ hns3_err(hw, "dcb sw configure failed: %d", ret);
+ return ret;
}
return 0;
@@ -1781,15 +1752,21 @@ hns3_dcb_pfc_enable(struct rte_eth_dev *dev, struct rte_eth_pfc_conf *pfc_conf)
uint16_t pause_time = pf->pause_time;
int ret;
- pf->pause_time = pfc_conf->fc.pause_time;
- hns3_get_fc_mode(hw, pfc_conf->fc.mode);
- hw->current_fc_status = HNS3_FC_STATUS_PFC;
hw->dcb_info.pfc_en |= BIT(priority);
hw->dcb_info.hw_pfc_map =
hns3_dcb_undrop_tc_map(hw, hw->dcb_info.pfc_en);
ret = hns3_buffer_alloc(hw);
- if (ret)
- goto pfc_setup_fail;
+ if (ret) {
+ hns3_err(hw, "update packet buffer failed, ret = %d", ret);
+ goto buffer_alloc_fail;
+ }
+
+ pf->pause_time = pfc_conf->fc.pause_time;
+ hns3_get_fc_mode(hw, pfc_conf->fc.mode);
+ if (hw->requested_fc_mode == HNS3_FC_NONE)
+ hw->current_fc_status = HNS3_FC_STATUS_NONE;
+ else
+ hw->current_fc_status = HNS3_FC_STATUS_PFC;
/*
* The flow control mode of all UPs will be changed based on
@@ -1807,6 +1784,7 @@ hns3_dcb_pfc_enable(struct rte_eth_dev *dev, struct rte_eth_pfc_conf *pfc_conf)
hw->requested_fc_mode = old_fc_mode;
hw->current_fc_status = fc_status;
pf->pause_time = pause_time;
+buffer_alloc_fail:
hw->dcb_info.pfc_en = pfc_en;
hw->dcb_info.hw_pfc_map = hw_pfc_map;
--
2.7.4

412
0212-net-hns3-use-the-correct-HiSilicon-copyright.patch Normal file
View File

@ -0,0 +1,412 @@
From 7fcab57399496811e5167d475645f6cb4b67692a Mon Sep 17 00:00:00 2001
From: "Min Hu (Connor)" <humin29@huawei.com>
Date: Thu, 1 Apr 2021 16:24:52 +0800
Subject: [PATCH 26/26] net/hns3: use the correct HiSilicon copyright
According to the suggestion of our legal department,
to standardize the copyright license of our code to
avoid potential copyright risks, we make a unified
modification to the "Hisilicon", which was nonstandard,
in the main modules we maintain.
We change it to "HiSilicon", which is consistent with
the terms used on the following official website:
https://www.hisilicon.com/en/terms-of-use.
Fixes: 565829db8b8f ("net/hns3: add build and doc infrastructure")
Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx")
Fixes: e31f123db06b ("net/hns3: support NEON Tx")
Fixes: c09c7847d892 ("net/hns3: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 2 +-
drivers/net/hns3/hns3_cmd.h | 2 +-
drivers/net/hns3/hns3_dcb.c | 2 +-
drivers/net/hns3/hns3_dcb.h | 2 +-
drivers/net/hns3/hns3_ethdev.c | 2 +-
drivers/net/hns3/hns3_ethdev.h | 2 +-
drivers/net/hns3/hns3_ethdev_vf.c | 2 +-
drivers/net/hns3/hns3_fdir.c | 2 +-
drivers/net/hns3/hns3_fdir.h | 2 +-
drivers/net/hns3/hns3_flow.c | 2 +-
drivers/net/hns3/hns3_intr.c | 2 +-
drivers/net/hns3/hns3_intr.h | 2 +-
drivers/net/hns3/hns3_logs.h | 2 +-
drivers/net/hns3/hns3_mbx.c | 2 +-
drivers/net/hns3/hns3_mbx.h | 2 +-
drivers/net/hns3/hns3_mp.c | 2 +-
drivers/net/hns3/hns3_mp.h | 2 +-
drivers/net/hns3/hns3_regs.c | 2 +-
drivers/net/hns3/hns3_regs.h | 2 +-
drivers/net/hns3/hns3_rss.c | 2 +-
drivers/net/hns3/hns3_rss.h | 2 +-
drivers/net/hns3/hns3_rxtx.c | 2 +-
drivers/net/hns3/hns3_rxtx.h | 2 +-
drivers/net/hns3/hns3_rxtx_vec.c | 2 +-
drivers/net/hns3/hns3_rxtx_vec.h | 2 +-
drivers/net/hns3/hns3_rxtx_vec_neon.h | 2 +-
drivers/net/hns3/hns3_rxtx_vec_sve.c | 2 +-
drivers/net/hns3/hns3_stats.c | 2 +-
drivers/net/hns3/hns3_stats.h | 2 +-
drivers/net/hns3/hns3_tm.c | 2 +-
drivers/net/hns3/hns3_tm.h | 2 +-
drivers/net/hns3/meson.build | 2 +-
32 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index ab92240..0de1a53 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_ethdev_pci.h>
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index 780ab0f..88683df 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_CMD_H_
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index 4d5b00b..b71e2e9 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_io.h>
diff --git a/drivers/net/hns3/hns3_dcb.h b/drivers/net/hns3/hns3_dcb.h
index 1abe649..e06ec17 100644
--- a/drivers/net/hns3/hns3_dcb.h
+++ b/drivers/net/hns3/hns3_dcb.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_DCB_H_
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 4c2dcee..59260c6 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_alarm.h>
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 0b5d102..1b592c8 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_ETHDEV_H_
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index fc088f8..e07eb20 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <linux/pci_regs.h>
diff --git a/drivers/net/hns3/hns3_fdir.c b/drivers/net/hns3/hns3_fdir.c
index 8ab5fd6..40edd6c 100644
--- a/drivers/net/hns3/hns3_fdir.c
+++ b/drivers/net/hns3/hns3_fdir.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_ethdev_driver.h>
diff --git a/drivers/net/hns3/hns3_fdir.h b/drivers/net/hns3/hns3_fdir.h
index d7b31d8..3f610f7 100644
--- a/drivers/net/hns3/hns3_fdir.h
+++ b/drivers/net/hns3/hns3_fdir.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_FDIR_H_
diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c
index 6c1e727..42b1c70 100644
--- a/drivers/net/hns3/hns3_flow.c
+++ b/drivers/net/hns3/hns3_flow.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_flow_driver.h>
diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
index e8ca6d5..0b307fd 100644
--- a/drivers/net/hns3/hns3_intr.c
+++ b/drivers/net/hns3/hns3_intr.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_alarm.h>
diff --git a/drivers/net/hns3/hns3_intr.h b/drivers/net/hns3/hns3_intr.h
index 4dfc807..1a0f196 100644
--- a/drivers/net/hns3/hns3_intr.h
+++ b/drivers/net/hns3/hns3_intr.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_INTR_H_
diff --git a/drivers/net/hns3/hns3_logs.h b/drivers/net/hns3/hns3_logs.h
index f3fc7b5..072a53b 100644
--- a/drivers/net/hns3/hns3_logs.h
+++ b/drivers/net/hns3/hns3_logs.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_LOGS_H_
diff --git a/drivers/net/hns3/hns3_mbx.c b/drivers/net/hns3/hns3_mbx.c
index 0c2e03b..411c5eb 100644
--- a/drivers/net/hns3/hns3_mbx.c
+++ b/drivers/net/hns3/hns3_mbx.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_ethdev_driver.h>
diff --git a/drivers/net/hns3/hns3_mbx.h b/drivers/net/hns3/hns3_mbx.h
index 2154c04..f868e33 100644
--- a/drivers/net/hns3/hns3_mbx.h
+++ b/drivers/net/hns3/hns3_mbx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_MBX_H_
diff --git a/drivers/net/hns3/hns3_mp.c b/drivers/net/hns3/hns3_mp.c
index b5cd5b0..2a7654d 100644
--- a/drivers/net/hns3/hns3_mp.c
+++ b/drivers/net/hns3/hns3_mp.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_eal.h>
diff --git a/drivers/net/hns3/hns3_mp.h b/drivers/net/hns3/hns3_mp.h
index 036546a..1a73598 100644
--- a/drivers/net/hns3/hns3_mp.h
+++ b/drivers/net/hns3/hns3_mp.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_MP_H_
diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index 374b9ea..ee5bcdf 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_ethdev_pci.h>
diff --git a/drivers/net/hns3/hns3_regs.h b/drivers/net/hns3/hns3_regs.h
index c9e10be..5812eb3 100644
--- a/drivers/net/hns3/hns3_regs.h
+++ b/drivers/net/hns3/hns3_regs.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_REGS_H_
diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c
index 858e31a..3a81e90 100644
--- a/drivers/net/hns3/hns3_rss.c
+++ b/drivers/net/hns3/hns3_rss.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_ethdev.h>
diff --git a/drivers/net/hns3/hns3_rss.h b/drivers/net/hns3/hns3_rss.h
index 94668ed..996083b 100644
--- a/drivers/net/hns3/hns3_rss.h
+++ b/drivers/net/hns3/hns3_rss.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_RSS_H_
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index d50cfc6..13d9a31 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_bus_pci.h>
diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index e01e582..56c1b80 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_RXTX_H_
diff --git a/drivers/net/hns3/hns3_rxtx_vec.c b/drivers/net/hns3/hns3_rxtx_vec.c
index e37e858..15a0bd0 100644
--- a/drivers/net/hns3/hns3_rxtx_vec.c
+++ b/drivers/net/hns3/hns3_rxtx_vec.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
*/
#include <rte_io.h>
diff --git a/drivers/net/hns3/hns3_rxtx_vec.h b/drivers/net/hns3/hns3_rxtx_vec.h
index 872ba22..67c75e4 100644
--- a/drivers/net/hns3/hns3_rxtx_vec.h
+++ b/drivers/net/hns3/hns3_rxtx_vec.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
*/
#ifndef _HNS3_RXTX_VEC_H_
diff --git a/drivers/net/hns3/hns3_rxtx_vec_neon.h b/drivers/net/hns3/hns3_rxtx_vec_neon.h
index 30a7d70..74c848d 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_neon.h
+++ b/drivers/net/hns3/hns3_rxtx_vec_neon.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
*/
#ifndef _HNS3_RXTX_VEC_NEON_H_
diff --git a/drivers/net/hns3/hns3_rxtx_vec_sve.c b/drivers/net/hns3/hns3_rxtx_vec_sve.c
index c861887..84a31d8 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_sve.c
+++ b/drivers/net/hns3/hns3_rxtx_vec_sve.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
*/
#include <arm_sve.h>
diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c
index 464a33d..e09dc0d 100644
--- a/drivers/net/hns3/hns3_stats.c
+++ b/drivers/net/hns3/hns3_stats.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#include <rte_ethdev.h>
diff --git a/drivers/net/hns3/hns3_stats.h b/drivers/net/hns3/hns3_stats.h
index 273be42..de5c40d 100644
--- a/drivers/net/hns3/hns3_stats.h
+++ b/drivers/net/hns3/hns3_stats.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018-2019 Hisilicon Limited.
+ * Copyright(c) 2018-2021 HiSilicon Limited.
*/
#ifndef _HNS3_STATS_H_
diff --git a/drivers/net/hns3/hns3_tm.c b/drivers/net/hns3/hns3_tm.c
index cd32664..db5ac78 100644
--- a/drivers/net/hns3/hns3_tm.c
+++ b/drivers/net/hns3/hns3_tm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020-2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
*/
#include <rte_malloc.h>
diff --git a/drivers/net/hns3/hns3_tm.h b/drivers/net/hns3/hns3_tm.h
index 2286d0e..83e9cc8 100644
--- a/drivers/net/hns3/hns3_tm.h
+++ b/drivers/net/hns3/hns3_tm.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020-2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
*/
#ifndef _HNS3_TM_H_
diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
index bf602af..881aff6 100644
--- a/drivers/net/hns3/meson.build
+++ b/drivers/net/hns3/meson.build
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: BSD-3-Clause
-# Copyright(c) 2018-2019 Hisilicon Limited
+# Copyright(c) 2018-2021 Hisilicon Limited
if not is_linux
build = false
--
2.7.4

29
dpdk.spec
View File

@ -1,6 +1,6 @@
Name: dpdk
Version: 20.11
Release: 6
Release: 7
Packager: packaging@6wind.com
URL: http://dpdk.org
%global source_version 20.11
@ -195,6 +195,30 @@ Patch185: 0186-app-testpmd-verify-DCB-config-during-forward-config.patch
Patch186: 0187-app-testpmd-add-forwarding-configuration-to-DCB-conf.patch
Patch187: 0188-app-testpmd-remove-redundant-forwarding-initializati.patch
Patch188: 0189-net-fix-compiling-bug-for-20.11-merge.patch
Patch189: 0189-config-arm-check-SVE-CPU-flag.patch
Patch190: 0190-net-hns3-increase-VF-reset-retry-maximum.patch
Patch191: 0191-net-hns3-fix-delay-for-waiting-to-stop-Rx-Tx.patch
Patch192: 0192-net-hns3-fix-fake-queue-rollback.patch
Patch193: 0193-net-hns3-fix-VLAN-strip-log.patch
Patch194: 0194-net-hns3-fix-maximum-queues-on-configuration-failure.patch
Patch195: 0195-net-hns3-remove-unnecessary-blank-lines.patch
Patch196: 0196-net-hns3-support-Tx-push-quick-doorbell-for-performa.patch
Patch197: 0197-net-hns3-fix-traffic-management.patch
Patch198: 0198-config-arm-fix-SVE-build-with-GCC-8.3.patch
Patch199: 0199-net-hns3-fix-Arm-SVE-build-with-GCC-8.3.patch
Patch200: 0200-net-hns3-query-basic-info-for-VF.patch
Patch201: 0201-net-hns3-support-VLAN-filter-state-modify-for-VF.patch
Patch202: 0202-net-hns3-support-multiple-TC-MAC-pause.patch
Patch203: 0203-net-hns3-fix-residual-MAC-address-entry.patch
Patch204: 0204-net-hns3-remove-unnecessary-zero-assignments.patch
Patch205: 0205-net-hns3-fix-filter-parsing-comment.patch
Patch206: 0206-net-hns3-fix-timing-of-clearing-interrupt-source.patch
Patch207: 0207-net-hns3-remove-duplicate-compile-time-check.patch
Patch208: 0208-net-hns3-move-speed-auto-negotiation-warning.patch
Patch209: 0209-net-hns3-fix-flow-rule-list-in-multi-process.patch
Patch210: 0210-net-hns3-fix-Tx-prepare-after-stop.patch
Patch211: 0211-net-hns3-disable-PFC-if-not-configured.patch
Patch212: 0212-net-hns3-use-the-correct-HiSilicon-copyright.patch
Summary: Data Plane Development Kit core
Group: System Environment/Libraries
@ -320,6 +344,9 @@ strip -g $RPM_BUILD_ROOT/lib/modules/${namer}/extra/dpdk/rte_kni.ko
/usr/sbin/depmod
%changelog
* Tue Jul 27 2021 Min Hu <humin29@huawei.com> - 20.11-7
- add bugfixes for hns3 PMD and sync upstream
* Mon Jul 19 2021 Min Hu <humin29@huawei.com> - 20.11-6
- keep in accordance with dpdk 19.11 version package arrangement