sync some patches from upstream about bugfix
Sync some patches from upstream about bugfix, modifies are as follow: - net/hns3: support new device - dma/hisilicon: remove support for HIP09 platform
This commit is contained in:
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182
0431-dma-hisilicon-remove-support-for-HIP09-platform.patch
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182
0431-dma-hisilicon-remove-support-for-HIP09-platform.patch
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@ -0,0 +1,182 @@
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From 105935aea2804a338160d5828735e1bdb9668d78 Mon Sep 17 00:00:00 2001
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From: Chengwen Feng <fengchengwen@huawei.com>
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Date: Mon, 29 Apr 2024 15:15:31 +0800
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Subject: [PATCH 431/432] dma/hisilicon: remove support for HIP09 platform
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The DMA for HIP09 is no longer available, so delete it.
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Cc: stable@dpdk.org
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Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
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Signed-off-by: chenyi <chenyi211@huawei.com>
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---
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doc/guides/dmadevs/hisilicon.rst | 1 -
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drivers/dma/hisilicon/hisi_dmadev.c | 40 +----------------------------
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drivers/dma/hisilicon/hisi_dmadev.h | 35 +------------------------
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3 files changed, 2 insertions(+), 74 deletions(-)
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diff --git a/doc/guides/dmadevs/hisilicon.rst b/doc/guides/dmadevs/hisilicon.rst
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index 8c1f0f8886..974bc49376 100644
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--- a/doc/guides/dmadevs/hisilicon.rst
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+++ b/doc/guides/dmadevs/hisilicon.rst
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@@ -13,7 +13,6 @@ Supported Kunpeng SoCs
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----------------------
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* Kunpeng 920
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-* Kunpeng 930
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Device Setup
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diff --git a/drivers/dma/hisilicon/hisi_dmadev.c b/drivers/dma/hisilicon/hisi_dmadev.c
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index 9494b60779..9ea85c86a7 100644
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--- a/drivers/dma/hisilicon/hisi_dmadev.c
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+++ b/drivers/dma/hisilicon/hisi_dmadev.c
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@@ -39,8 +39,6 @@ hisi_dma_queue_base(struct hisi_dma_dev *hw)
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{
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if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP08)
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return HISI_DMA_HIP08_QUEUE_BASE;
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- else if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09)
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- return HISI_DMA_HIP09_QUEUE_BASE;
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else
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return 0;
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}
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@@ -216,25 +214,6 @@ hisi_dma_init_hw(struct hisi_dma_dev *hw)
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HISI_DMA_HIP08_QUEUE_INT_MASK_M, true);
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hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_MASK_REG,
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HISI_DMA_HIP08_QUEUE_INT_MASK_M, true);
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- } else if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09) {
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- hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_CTRL0_REG,
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- HISI_DMA_HIP09_QUEUE_CTRL0_ERR_ABORT_M, false);
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- hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_STATUS_REG,
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- HISI_DMA_HIP09_QUEUE_INT_MASK_M, true);
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- hisi_dma_update_queue_mbit(hw, HISI_DMA_QUEUE_INT_MASK_REG,
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- HISI_DMA_HIP09_QUEUE_INT_MASK_M, true);
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- hisi_dma_update_queue_mbit(hw,
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- HISI_DMA_HIP09_QUEUE_ERR_INT_STATUS_REG,
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- HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M, true);
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- hisi_dma_update_queue_mbit(hw,
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- HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_REG,
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- HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M, true);
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- hisi_dma_update_queue_bit(hw, HISI_DMA_QUEUE_CTRL1_REG,
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- HISI_DMA_HIP09_QUEUE_CTRL1_VA_ENABLE_B, true);
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- hisi_dma_update_bit(hw,
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- HISI_DMA_HIP09_QUEUE_CFG_REG(hw->queue_id),
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- HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B,
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- true);
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}
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}
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@@ -256,8 +235,6 @@ hisi_dma_reg_layout(uint8_t revision)
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{
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if (revision == HISI_DMA_REVISION_HIP08B)
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return HISI_DMA_REG_LAYOUT_HIP08;
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- else if (revision >= HISI_DMA_REVISION_HIP09A)
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- return HISI_DMA_REG_LAYOUT_HIP09;
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else
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return HISI_DMA_REG_LAYOUT_INVALID;
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}
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@@ -328,14 +305,11 @@ hisi_dma_info_get(const struct rte_dma_dev *dev,
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struct rte_dma_info *dev_info,
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uint32_t info_sz)
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{
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- struct hisi_dma_dev *hw = dev->data->dev_private;
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+ RTE_SET_USED(dev);
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RTE_SET_USED(info_sz);
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dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
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RTE_DMA_CAPA_OPS_COPY;
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- if (hw->reg_layout == HISI_DMA_REG_LAYOUT_HIP09)
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- dev_info->dev_capa |= RTE_DMA_CAPA_HANDLES_ERRORS;
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-
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dev_info->max_vchans = 1;
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dev_info->max_desc = HISI_DMA_MAX_DESC_NUM;
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dev_info->min_desc = HISI_DMA_MIN_DESC_NUM;
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@@ -514,18 +488,6 @@ hisi_dma_dump_common(struct hisi_dma_dev *hw, FILE *f)
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{ HISI_DMA_REG_LAYOUT_HIP08,
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HISI_DMA_HIP08_DUMP_START_REG,
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HISI_DMA_HIP08_DUMP_END_REG },
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- { HISI_DMA_REG_LAYOUT_HIP09,
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- HISI_DMA_HIP09_DUMP_REGION_A_START_REG,
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- HISI_DMA_HIP09_DUMP_REGION_A_END_REG },
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- { HISI_DMA_REG_LAYOUT_HIP09,
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- HISI_DMA_HIP09_DUMP_REGION_B_START_REG,
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- HISI_DMA_HIP09_DUMP_REGION_B_END_REG },
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- { HISI_DMA_REG_LAYOUT_HIP09,
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- HISI_DMA_HIP09_DUMP_REGION_C_START_REG,
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- HISI_DMA_HIP09_DUMP_REGION_C_END_REG },
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- { HISI_DMA_REG_LAYOUT_HIP09,
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- HISI_DMA_HIP09_DUMP_REGION_D_START_REG,
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- HISI_DMA_HIP09_DUMP_REGION_D_END_REG },
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};
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uint32_t i;
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diff --git a/drivers/dma/hisilicon/hisi_dmadev.h b/drivers/dma/hisilicon/hisi_dmadev.h
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index deb1357eea..9638823b7b 100644
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--- a/drivers/dma/hisilicon/hisi_dmadev.h
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+++ b/drivers/dma/hisilicon/hisi_dmadev.h
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@@ -23,22 +23,14 @@
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#define HISI_DMA_DEVICE_ID 0xA122
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#define HISI_DMA_PCI_REVISION_ID_REG 0x08
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#define HISI_DMA_REVISION_HIP08B 0x21
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-#define HISI_DMA_REVISION_HIP09A 0x30
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#define HISI_DMA_MAX_HW_QUEUES 4
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#define HISI_DMA_MAX_DESC_NUM 8192
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#define HISI_DMA_MIN_DESC_NUM 32
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-/**
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- * The HIP08B(HiSilicon IP08) and HIP09B(HiSilicon IP09) are DMA iEPs, they
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- * have the same pci device id but different pci revision.
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- * Unfortunately, they have different register layouts, so two layout
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- * enumerations are defined.
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- */
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enum {
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HISI_DMA_REG_LAYOUT_INVALID = 0,
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- HISI_DMA_REG_LAYOUT_HIP08,
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- HISI_DMA_REG_LAYOUT_HIP09
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+ HISI_DMA_REG_LAYOUT_HIP08
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};
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/**
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@@ -67,9 +59,6 @@ enum {
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* length of queue-region. The global offset for a single queue register is
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* calculated by:
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* offset = queue-base + (queue-id * queue-region) + reg-offset-in-region.
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- *
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- * The first part of queue region is basically the same for HIP08 and HIP09
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- * register layouts, therefore, HISI_QUEUE_* registers are defined for it.
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*/
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#define HISI_DMA_QUEUE_SQ_BASE_L_REG 0x0
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#define HISI_DMA_QUEUE_SQ_BASE_H_REG 0x4
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@@ -108,28 +97,6 @@ enum {
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#define HISI_DMA_HIP08_DUMP_START_REG 0x2000
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#define HISI_DMA_HIP08_DUMP_END_REG 0x2280
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-/**
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- * HiSilicon IP09 DMA register and field define:
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- */
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-#define HISI_DMA_HIP09_QUEUE_BASE 0x2000
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-#define HISI_DMA_HIP09_QUEUE_CTRL0_ERR_ABORT_M GENMASK(31, 28)
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-#define HISI_DMA_HIP09_QUEUE_CTRL1_VA_ENABLE_B 2
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-#define HISI_DMA_HIP09_QUEUE_INT_MASK_M 0x1
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-#define HISI_DMA_HIP09_QUEUE_ERR_INT_STATUS_REG 0x48
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-#define HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_REG 0x4C
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-#define HISI_DMA_HIP09_QUEUE_ERR_INT_MASK_M GENMASK(18, 1)
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-#define HISI_DMA_HIP09_QUEUE_CFG_REG(queue_id) (0x800 + \
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- (queue_id) * 0x20)
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-#define HISI_DMA_HIP09_QUEUE_CFG_LINK_DOWN_MASK_B 16
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-#define HISI_DMA_HIP09_DUMP_REGION_A_START_REG 0x0
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-#define HISI_DMA_HIP09_DUMP_REGION_A_END_REG 0x368
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-#define HISI_DMA_HIP09_DUMP_REGION_B_START_REG 0x800
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-#define HISI_DMA_HIP09_DUMP_REGION_B_END_REG 0xA08
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-#define HISI_DMA_HIP09_DUMP_REGION_C_START_REG 0x1800
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-#define HISI_DMA_HIP09_DUMP_REGION_C_END_REG 0x1A4C
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-#define HISI_DMA_HIP09_DUMP_REGION_D_START_REG 0x1C00
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-#define HISI_DMA_HIP09_DUMP_REGION_D_END_REG 0x1CC4
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-
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/**
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* In fact, there are multiple states, but it need to pay attention to
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* the following three states for the driver:
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--
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2.33.0
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80
0432-net-hns3-support-new-device.patch
Normal file
80
0432-net-hns3-support-new-device.patch
Normal file
@ -0,0 +1,80 @@
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From 14314efc4ecdaff54334303e21b73ef434726a1d Mon Sep 17 00:00:00 2001
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From: Jie Hai <haijie1@huawei.com>
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Date: Fri, 15 Mar 2024 10:54:48 +0800
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Subject: [PATCH 432/432] net/hns3: support new device
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[ upstream commit 3f1436d7006c2659232305ef2b8b186796319041 ]
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This patch introduces the new devices, which are on-chip network
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interface controllers with RDMA/DCB/ROH supporting. One is 100GE
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and the other is 200GE. Both can be found on HIP09/HIP10 SoCs.
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Cc: stable@dpdk.org
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Signed-off-by: Jie Hai <haijie1@huawei.com>
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Signed-off-by: chenyi <chenyi211@huawei.com>
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---
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doc/guides/nics/hns3.rst | 2 +-
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drivers/net/hns3/hns3_cmd.c | 4 +++-
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drivers/net/hns3/hns3_ethdev.c | 2 ++
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drivers/net/hns3/hns3_ethdev.h | 2 ++
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4 files changed, 8 insertions(+), 2 deletions(-)
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diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst
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index 5ac64495a6..ebe3f7f7dd 100644
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--- a/doc/guides/nics/hns3.rst
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+++ b/doc/guides/nics/hns3.rst
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@@ -6,7 +6,7 @@ HNS3 Poll Mode Driver
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The hns3 PMD (**librte_net_hns3**) provides poll mode driver support
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for the inbuilt HiSilicon Network Subsystem(HNS) network engine
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-found in the HiSilicon Kunpeng 920 SoC and Kunpeng 930 SoC .
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+found in the HiSilicon Kunpeng 920 SoC (HIP08) and Kunpeng 930 SoC (HIP09/HIP10).
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Features
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--------
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diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
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index 2c1664485b..001ff49b36 100644
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--- a/drivers/net/hns3/hns3_cmd.c
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+++ b/drivers/net/hns3/hns3_cmd.c
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@@ -545,7 +545,9 @@ hns3_set_dcb_capability(struct hns3_hw *hw)
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if (device_id == HNS3_DEV_ID_25GE_RDMA ||
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device_id == HNS3_DEV_ID_50GE_RDMA ||
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device_id == HNS3_DEV_ID_100G_RDMA_MACSEC ||
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- device_id == HNS3_DEV_ID_200G_RDMA)
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+ device_id == HNS3_DEV_ID_200G_RDMA ||
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+ device_id == HNS3_DEV_ID_100G_ROH ||
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+ device_id == HNS3_DEV_ID_200G_ROH)
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hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1);
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}
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diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
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index 0e1ca1b314..325e745797 100644
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--- a/drivers/net/hns3/hns3_ethdev.c
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+++ b/drivers/net/hns3/hns3_ethdev.c
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@@ -6649,6 +6649,8 @@ static const struct rte_pci_id pci_id_hns3_map[] = {
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{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_50GE_RDMA) },
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{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_MACSEC) },
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{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_200G_RDMA) },
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+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_ROH) },
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+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_200G_ROH) },
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{ .vendor_id = 0, }, /* sentinel */
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};
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diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
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index 12d8299def..e70c5fff2a 100644
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--- a/drivers/net/hns3/hns3_ethdev.h
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+++ b/drivers/net/hns3/hns3_ethdev.h
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@@ -28,7 +28,9 @@
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#define HNS3_DEV_ID_25GE_RDMA 0xA222
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#define HNS3_DEV_ID_50GE_RDMA 0xA224
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#define HNS3_DEV_ID_100G_RDMA_MACSEC 0xA226
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+#define HNS3_DEV_ID_100G_ROH 0xA227
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#define HNS3_DEV_ID_200G_RDMA 0xA228
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+#define HNS3_DEV_ID_200G_ROH 0xA22C
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#define HNS3_DEV_ID_100G_VF 0xA22E
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#define HNS3_DEV_ID_100G_RDMA_PFC_VF 0xA22F
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--
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2.33.0
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11
dpdk.spec
11
dpdk.spec
@ -1,6 +1,6 @@
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Name: dpdk
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Version: 21.11
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Release: 66
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Release: 67
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Packager: packaging@6wind.com
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URL: http://dpdk.org
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%global source_version 21.11
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@ -464,6 +464,9 @@ Patch6427: 0428-net-hns3-fix-read-Rx-timestamp-handle.patch
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Patch6428: 0429-net-hns3-fix-offload-flag-of-IEEE-1588.patch
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Patch6429: 0430-app-testpmd-fix-crash-in-multi-process-forwarding.patch
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Patch6430: 0431-dma-hisilicon-remove-support-for-HIP09-platform.patch
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Patch6431: 0432-net-hns3-support-new-device.patch
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Summary: Data Plane Development Kit core
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Group: System Environment/Libraries
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License: BSD and LGPLv2 and GPLv2
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@ -619,6 +622,12 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko
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/usr/sbin/depmod
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%changelog
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* Mon Jun 3 2024 chenyi <chenyi211@huawei.com> - 21.11-67
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Sync some patches from upstream about bugfix, modifies
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are as follow:
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- net/hns3: support new device
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- dma/hisilicon: remove support for HIP09 platform
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* Tue May 28 2024 chenyi <chenyi211@huawei.com> - 21.11-66
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Sync some patches from upstream about bugfix, modifies
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are as follow:
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