3c37f75e18
Sync some patchs from upstreaming about FEC feature. Patchs are as follow: - net/hns3: fix FEC mode for 200G ports - net/hns3: fix FEC mode check error - net/hns3: fix missing FEC capability - ethdev: introduce low latency RS FEC - app/testpmd: add setting and querying of LLRS FEC mode - net/hns3: add LLRS FEC mode support for 200G ports - net/hns3: get current FEC capability from firmware (cherry picked from commit 9266c3e618cf38cde9cd630c88a1a571064f825f)
109 lines
3.1 KiB
Diff
109 lines
3.1 KiB
Diff
From be516a78df6de13d6e87aaae19dad374819fca19 Mon Sep 17 00:00:00 2001
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From: Jie Hai <haijie1@huawei.com>
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Date: Sat, 8 Apr 2023 10:27:34 +0800
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Subject: net/hns3: fix FEC mode check error
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[ upstream commit 5aba4e41d02222c5cf414b48876cff829f0b6a6f ]
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The function is_fec_mode_one_bit_set() is used to check whether
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the binary of the mode from user only contains one '1'. But it
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uses the bytes number this mode variable occupied to calculate
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the count. So this patch uses __builtin_popcount() to replace it.
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This patch also extracts the code for verifying mode parameter into
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a function.
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Fixes: 9bf2ea8dbc65 ("net/hns3: support FEC")
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Cc: stable@dpdk.org
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Signed-off-by: Jie Hai <haijie1@huawei.com>
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Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
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---
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drivers/net/hns3/hns3_ethdev.c | 50 ++++++++++++++++------------------
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1 file changed, 24 insertions(+), 26 deletions(-)
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diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
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index 06d4752ab1..74e785c0cf 100644
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--- a/drivers/net/hns3/hns3_ethdev.c
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+++ b/drivers/net/hns3/hns3_ethdev.c
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@@ -6139,52 +6139,50 @@ get_current_speed_fec_cap(struct hns3_hw *hw, struct rte_eth_fec_capa *fec_capa)
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return cur_capa;
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}
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-static bool
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-is_fec_mode_one_bit_set(uint32_t mode)
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-{
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- int cnt = 0;
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- uint8_t i;
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-
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- for (i = 0; i < sizeof(mode); i++)
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- if (mode >> i & 0x1)
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- cnt++;
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-
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- return cnt == 1 ? true : false;
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-}
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-
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static int
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-hns3_fec_set(struct rte_eth_dev *dev, uint32_t mode)
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+hns3_fec_mode_valid(struct rte_eth_dev *dev, uint32_t mode)
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{
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#define FEC_CAPA_NUM 2
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struct hns3_adapter *hns = dev->data->dev_private;
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struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(hns);
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- struct hns3_pf *pf = &hns->pf;
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struct rte_eth_fec_capa fec_capa[FEC_CAPA_NUM];
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- uint32_t cur_capa;
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uint32_t num = FEC_CAPA_NUM;
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+ uint32_t cur_capa;
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int ret;
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- ret = hns3_fec_get_capability(dev, fec_capa, num);
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- if (ret < 0)
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- return ret;
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-
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- /* HNS3 PMD only support one bit set mode, e.g. 0x1, 0x4 */
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- if (!is_fec_mode_one_bit_set(mode)) {
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- hns3_err(hw, "FEC mode(0x%x) not supported in HNS3 PMD, "
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- "FEC mode should be only one bit set", mode);
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+ if (__builtin_popcount(mode) != 1) {
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+ hns3_err(hw, "FEC mode(0x%x) should be only one bit set", mode);
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return -EINVAL;
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}
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+ ret = hns3_fec_get_capability(dev, fec_capa, num);
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+ if (ret < 0)
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+ return ret;
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/*
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* Check whether the configured mode is within the FEC capability.
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* If not, the configured mode will not be supported.
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*/
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cur_capa = get_current_speed_fec_cap(hw, fec_capa);
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- if (!(cur_capa & mode)) {
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- hns3_err(hw, "unsupported FEC mode = 0x%x", mode);
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+ if ((cur_capa & mode) == 0) {
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+ hns3_err(hw, "unsupported FEC mode(0x%x)", mode);
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return -EINVAL;
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}
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+ return 0;
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+}
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+
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+static int
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+hns3_fec_set(struct rte_eth_dev *dev, uint32_t mode)
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+{
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+ struct hns3_adapter *hns = dev->data->dev_private;
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+ struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(hns);
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+ struct hns3_pf *pf = &hns->pf;
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+ int ret;
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+
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+ ret = hns3_fec_mode_valid(dev, mode);
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+ if (ret != 0)
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+ return ret;
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+
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rte_spinlock_lock(&hw->lock);
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ret = hns3_set_fec_hw(hw, mode);
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if (ret) {
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--
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2.23.0
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