Update DPDK version from 19.11 to 20.11 and also support hns3 PMD for Kunpeng 920 and Kunpeng 930. Signed-off-by: speech_white <humin29@huawei.com>
55 lines
1.8 KiB
Diff
55 lines
1.8 KiB
Diff
From dbeadbf0ac1368fa07822b025a3f1bf10a450b43 Mon Sep 17 00:00:00 2001
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From: Chengwen Feng <fengchengwen@huawei.com>
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Date: Sat, 8 May 2021 15:40:57 +0800
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Subject: [PATCH 161/189] net/hns3: fix TM QCN error event report by MSI-X
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The TM QCN error event should report by RAS other than MSIX.
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Also this patch adds fifo int enable configuration before the TM QCN
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error event is enabled.
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Fixes: f53a793bb7c2 ("net/hns3: add more hardware error types")
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Fixes: 3903c05382c5 ("net/hns3: remove read when enabling TM QCN error event")
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Cc: stable@dpdk.org
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Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
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Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
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---
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drivers/net/hns3/hns3_intr.c | 5 ++++-
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drivers/net/hns3/hns3_intr.h | 2 ++
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2 files changed, 6 insertions(+), 1 deletion(-)
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diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
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index 0140260..854cb1d 100644
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--- a/drivers/net/hns3/hns3_intr.c
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+++ b/drivers/net/hns3/hns3_intr.c
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@@ -1783,8 +1783,11 @@ enable_tm_err_intr(struct hns3_adapter *hns, bool en)
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/* configure TM QCN hw errors */
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hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_QCN_MEM_INT_CFG, false);
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- if (en)
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+ desc.data[0] = rte_cpu_to_le_32(HNS3_TM_QCN_ERR_INT_TYPE);
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+ if (en) {
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+ desc.data[0] |= rte_cpu_to_le_32(HNS3_TM_QCN_FIFO_INT_EN);
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desc.data[1] = rte_cpu_to_le_32(HNS3_TM_QCN_MEM_ERR_INT_EN);
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+ }
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ret = hns3_cmd_send(hw, &desc, 1);
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if (ret)
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diff --git a/drivers/net/hns3/hns3_intr.h b/drivers/net/hns3/hns3_intr.h
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index a140ca1..4dfc807 100644
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--- a/drivers/net/hns3/hns3_intr.h
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+++ b/drivers/net/hns3/hns3_intr.h
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@@ -77,6 +77,8 @@
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#define HNS3_NCSI_ERR_INT_EN 0x3
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#define HNS3_TM_SCH_ECC_ERR_INT_EN 0x3
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+#define HNS3_TM_QCN_ERR_INT_TYPE 0x29
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+#define HNS3_TM_QCN_FIFO_INT_EN 0xFFFF00
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#define HNS3_TM_QCN_MEM_ERR_INT_EN 0xFFFFFF
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#define HNS3_RESET_PROCESS_MS 200
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--
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2.7.4
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