b0dbcead43
Sync some patchs from upstreaming and modifies are as follow: - maintainers: update for hns3 driver - app/testpmd: add command to flush multicast MAC addresses - app/testpmd: fix help string - app/testpmd: fix multicast address pool leak - net/hns3: optimize SVE Rx performance - net/hns3: optimize rearm mbuf for SVE Rx - net/hns3: optimize free mbuf for SVE Tx - net/hns3: fix order in NEON Rx - net/hns3: fix traffic management dump text alignment - net/hns3: fix traffic management thread safety - net/hns3: fix flushing multicast MAC address - net/hns3: fix error code for multicast resource - net/hns3: fix VF default MAC modified when set failed - net/hns3: fix index to look up table in NEON Rx - net/hns3: fix non-zero weight for disabled TC - config/arm: add HiSilicon HIP10 Signed-off-by: Dengdui Huang <huangdengdui@huawei.com>
57 lines
1.9 KiB
Diff
57 lines
1.9 KiB
Diff
From af30b78f204788a5a82cc637b813a3b8bb66ae6b Mon Sep 17 00:00:00 2001
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From: Huisong Li <lihuisong@huawei.com>
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Date: Fri, 7 Jul 2023 18:40:53 +0800
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Subject: [PATCH 352/366] net/hns3: fix non-zero weight for disabled TC
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[ upstream commit 1abcdb3f247393a04703071452b560a77ab23c04 ]
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hns3 PF driver enables one TC, allocates to 100% weight for this
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TC and 0% for other disabled TC by default. But driver modifies
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the weight to 1% for disabled TC and then set to hardware to make
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all TC work in DWRR mode. As a result, the total percent of all TC
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is more than 100%. Actually, this operation is also redundant,
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because these disabled TC will never be used. So this patch sets
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the weight of all TC based on user's configuration.
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Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
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Cc: stable@dpdk.org
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Signed-off-by: Huisong Li <lihuisong@huawei.com>
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Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
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---
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drivers/net/hns3/hns3_dcb.c | 9 +--------
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1 file changed, 1 insertion(+), 8 deletions(-)
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diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
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index af045b2..07b8c46 100644
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--- a/drivers/net/hns3/hns3_dcb.c
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+++ b/drivers/net/hns3/hns3_dcb.c
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@@ -237,9 +237,9 @@ hns3_dcb_qs_weight_cfg(struct hns3_hw *hw, uint16_t qs_id, uint8_t dwrr)
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static int
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hns3_dcb_ets_tc_dwrr_cfg(struct hns3_hw *hw)
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{
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-#define DEFAULT_TC_WEIGHT 1
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#define DEFAULT_TC_OFFSET 14
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struct hns3_ets_tc_weight_cmd *ets_weight;
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+ struct hns3_pg_info *pg_info;
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struct hns3_cmd_desc desc;
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uint8_t i;
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@@ -247,13 +247,6 @@ hns3_dcb_ets_tc_dwrr_cfg(struct hns3_hw *hw)
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ets_weight = (struct hns3_ets_tc_weight_cmd *)desc.data;
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for (i = 0; i < HNS3_MAX_TC_NUM; i++) {
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- struct hns3_pg_info *pg_info;
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-
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- ets_weight->tc_weight[i] = DEFAULT_TC_WEIGHT;
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-
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- if (!(hw->hw_tc_map & BIT(i)))
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- continue;
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-
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pg_info = &hw->dcb_info.pg_info[hw->dcb_info.tc_info[i].pgid];
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ets_weight->tc_weight[i] = pg_info->tc_dwrr[i];
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}
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--
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2.41.0.windows.2
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