From bed123b58aaf435653e01692830def8d564cf51f Mon Sep 17 00:00:00 2001 From: Diachkov Ilia WX1215920 Date: Mon, 18 Dec 2023 22:49:54 +0300 Subject: [PATCH] [perm propagation][Bugfix] Fix shll/shll2 patterns for perm prop --- gcc/config/aarch64/aarch64-simd.md | 8 ++++---- gcc/config/aarch64/predicates.md | 7 +++++++ 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 66fcf0074..c7503561f 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -4791,10 +4791,10 @@ (vec_select:V4HI (match_operand:V8HI 1 "register_operand" "w") (match_operand:V8HI 2 "vect_par_cnst_lo_half" ""))) - (match_operand:V4SI 3 "aarch64_simd_rshift_imm" "Dr")))] + (match_operand:V4SI 3 "aarch64_simd_shift_imm_bitsize_v4si" "i")))] "TARGET_SIMD" "shll\t%0.4s, %1.4h, #%3" - [(set_attr "type" "neon_compare_zero")] + [(set_attr "type" "neon_shift_imm_long")] ) ;; vshll_high_n @@ -4821,10 +4821,10 @@ (vec_select:V4HI (match_operand:V8HI 1 "register_operand" "w") (match_operand:V8HI 2 "vect_par_cnst_hi_half" ""))) - (match_operand:V4SI 3 "aarch64_simd_rshift_imm" "Dr")))] + (match_operand:V4SI 3 "aarch64_simd_shift_imm_bitsize_v4si" "i")))] "TARGET_SIMD" "shll2\t%0.4s, %1.8h, #%3" - [(set_attr "type" "neon_compare_zero")] + [(set_attr "type" "neon_shift_imm_long")] ) ;; vrshr_n diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index b1b3cf82c..90db0efba 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -618,6 +618,13 @@ (and (match_code "const_int") (match_test "IN_RANGE (INTVAL (op), 0, 64)"))) +(define_predicate "aarch64_simd_shift_imm_bitsize_v4si" + (match_code "const_vector") +{ + HOST_WIDE_INT val = INTVAL (unwrap_const_vec_duplicate (op)); + return val == 8 || val == 16 || val == 32; +}) + (define_predicate "aarch64_constant_pool_symref" (and (match_code "symbol_ref") (match_test "CONSTANT_POOL_ADDRESS_P (op)"))) -- 2.33.0