leveldb/leveldb-1.20-sw.patch
wzx a5389d66f7 Add sw64 architecture
Signed-off-by: wzx <wuzx1226@qq.com>
(cherry picked from commit ec3d33ae31c14815dafa471a84b89249208b0703)
2022-10-29 14:45:48 +08:00

27 lines
845 B
Diff
Executable File

diff -Naur leveldb-1.20.org/port/atomic_pointer.h leveldb-1.20.sw/port/atomic_pointer.h
--- leveldb-1.20.org/port/atomic_pointer.h 2022-08-18 15:03:54.160000000 +0000
+++ leveldb-1.20.sw/port/atomic_pointer.h 2022-08-18 15:06:03.380000000 +0000
@@ -37,6 +37,8 @@
#define ARCH_CPU_ARM_FAMILY 1
#elif defined(__aarch64__)
#define ARCH_CPU_ARM64_FAMILY 1
+#elif defined(__sw_64__)
+#define ARCH_CPU_SW_64_FAMILY 1
#elif defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__)
#define ARCH_CPU_PPC_FAMILY 1
#elif defined(__mips__)
@@ -96,6 +98,13 @@
}
#define LEVELDB_HAVE_MEMORY_BARRIER
+// SW_64
+#elif defined(ARCH_CPU_SW_64_FAMILY)
+inline void MemoryBarrier() {
+ asm volatile("memb" : : : "memory");
+}
+#define LEVELDB_HAVE_MEMORY_BARRIER
+
// ARM64
#elif defined(ARCH_CPU_ARM64_FAMILY)
inline void MemoryBarrier() {