diff --git a/contrib/pgcrypto/crypt-blowfish.c b/contrib/pgcrypto/crypt-blowfish.c index a663852..626e917 100644 --- a/contrib/pgcrypto/crypt-blowfish.c +++ b/contrib/pgcrypto/crypt-blowfish.c @@ -41,7 +41,7 @@ #ifdef __i386__ #define BF_ASM 0 /* 1 */ #define BF_SCALE 1 -#elif defined(__x86_64__) || defined(__alpha__) || defined(__hppa__) +#elif defined(__x86_64__) || defined(__alpha__) || defined(__sw_64__) || defined(__hppa__) #define BF_ASM 0 #define BF_SCALE 1 #else diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h index 86e0e84..c2805a5 100644 --- a/src/include/storage/s_lock.h +++ b/src/include/storage/s_lock.h @@ -131,6 +131,55 @@ *---------- */ +#if defined(__sw_64) || defined(__sw_64__) /* sw_64 */ +/* + * Correct multi-processor locking methods are explained in section 5.5.3 + * of the sw_64 AXP Architecture Handbook, which at this writing can be + * found at ftp://ftp.netbsd.org/pub/NetBSD/misc/dec-docs/index.html. + * For gcc we implement the handbook's code directly with inline assembler. + */ +#define HAS_TEST_AND_SET + +typedef unsigned long slock_t; + +#define TAS(lock) tas(lock) + +static __inline__ int +tas(volatile slock_t *lock) +{ + register slock_t _res; + unsigned long tmp; + __asm__ __volatile__( + " ldl $0, %1 \n" + " bne $0, 2f \n" + " ldi %2, %1\n" + " lldl %0, 0(%2) \n" + " mov 1, $0 \n" + " wr_f $0 \n" + " memb \n" + " lstl $0, 0(%2) \n" + " rd_f $0 \n" + " bne %0, 2f \n" + " beq $0, 2f \n" + " memb \n" + " br 3f \n" + "2: mov 1, %0 \n" + "3: \n" +: "=&r"(_res), "+m"(*lock),"=r" (tmp) +: +: "memory", "0"); + return (int) _res; +} + +#define S_UNLOCK(lock) \ +do \ +{\ + __asm__ __volatile__ (" memb \n"); \ + *((volatile slock_t *) (lock)) = 0; \ +} while (0) + +#endif /* __sw_64 || __sw_64__ */ + #ifdef __i386__ /* 32-bit i386 */ #define HAS_TEST_AND_SET