add loongarch64 support for lxc
(cherry picked from commit 972e37f7a0df10f73406f62c0ac157b6e36327d1)
This commit is contained in:
Wenlong Zhang
openeuler-sync-bot
parent
f4d9a36213
commit
6e2c3ab02f
238
0058-add-loongarch64-support-for-lxc.patch
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238
0058-add-loongarch64-support-for-lxc.patch
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From 477ecc390bf4d62e8e02b98699b377b848b043de Mon Sep 17 00:00:00 2001
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From: Wenlong Zhang <zhangwenlong@loongson.cn>
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Date: Thu, 9 Feb 2023 08:18:35 +0000
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Subject: [PATCH] add loongarch64 support for lxc
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---
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src/lxc/seccomp.c | 51 +++++++++++++++++++++++++++++++++++++++
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src/lxc/syscall_numbers.h | 26 ++++++++++++++++++++
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2 files changed, 77 insertions(+)
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diff --git a/src/lxc/seccomp.c b/src/lxc/seccomp.c
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index ebbba80..94dc23a 100644
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--- a/src/lxc/seccomp.c
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+++ b/src/lxc/seccomp.c
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@@ -310,6 +310,7 @@ enum lxc_hostarch_t {
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lxc_seccomp_arch_ppc64,
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lxc_seccomp_arch_ppc64le,
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lxc_seccomp_arch_ppc,
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+ lxc_seccomp_arch_loongarch64,
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lxc_seccomp_arch_mips,
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lxc_seccomp_arch_mips64,
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lxc_seccomp_arch_mips64n32,
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@@ -344,6 +345,8 @@ int get_hostarch(void)
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return lxc_seccomp_arch_ppc64;
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else if (strncmp(uts.machine, "ppc", 3) == 0)
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return lxc_seccomp_arch_ppc;
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+ else if (strncmp(uts.machine, "loongarch64", 11) == 0)
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+ return lxc_seccomp_arch_loongarch64;
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else if (strncmp(uts.machine, "mips64", 6) == 0)
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return MIPS_ARCH_N64;
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else if (strncmp(uts.machine, "mips", 4) == 0)
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@@ -400,6 +403,11 @@ scmp_filter_ctx get_new_ctx(enum lxc_hostarch_t n_arch,
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arch = SCMP_ARCH_PPC;
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break;
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#endif
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+#ifdef SCMP_ARCH_LOONGARCH64
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+ case lxc_seccomp_arch_loongarch64:
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+ arch = SCMP_ARCH_LOONGARCH64;
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+ break;
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+#endif
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#ifdef SCMP_ARCH_MIPS
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case lxc_seccomp_arch_mips:
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arch = SCMP_ARCH_MIPS;
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@@ -738,6 +746,16 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
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goto bad;
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#endif
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#endif
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+#ifdef SCMP_ARCH_LOONGARCH64
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+ } else if (native_arch == lxc_seccomp_arch_loongarch64) {
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+ cur_rule_arch = lxc_seccomp_arch_all;
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+
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+ ctx.lxc_arch[0] = lxc_seccomp_arch_loongarch64;
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+ ctx.contexts[0] = get_new_ctx(lxc_seccomp_arch_loongarch64,
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+ default_policy_action, &ctx.architectures[0]);
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+ if (!ctx.contexts[0])
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+ goto bad;
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+#endif
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#ifdef SCMP_ARCH_MIPS
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} else if (native_arch == lxc_seccomp_arch_mips64) {
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cur_rule_arch = lxc_seccomp_arch_all;
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@@ -906,6 +924,17 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
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cur_rule_arch = lxc_seccomp_arch_ppc;
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}
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#endif
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+#ifdef SCMP_ARCH_LOONGARCH64
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+ else if (strcmp(line, "[loongarch64]") == 0 ||
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+ strcmp(line, "[LOONGARCH64]") == 0) {
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+ if (native_arch != lxc_seccomp_arch_loongarch64) {
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+ cur_rule_arch = lxc_seccomp_arch_unknown;
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+ continue;
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+ }
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+
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+ cur_rule_arch = lxc_seccomp_arch_loongarch64;
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+ }
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+#endif
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#ifdef SCMP_ARCH_MIPS
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else if (strcmp(line, "[mips64]") == 0 ||
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strcmp(line, "[MIPS64]") == 0) {
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@@ -1263,6 +1292,17 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
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goto bad;
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#endif
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#endif
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+#ifdef SCMP_ARCH_LOONGARCH64
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+ } else if (native_arch == lxc_seccomp_arch_loongarch64) {
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+ cur_rule_arch = lxc_seccomp_arch_all;
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+
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+ ctx.architectures[0] = SCMP_ARCH_LOONGARCH64;
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+ ctx.contexts[0] = get_new_ctx(lxc_seccomp_arch_loongarch64,
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+ default_policy_action,
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+ &ctx.needs_merge[0]);
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+ if (!ctx.contexts[0])
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+ goto bad;
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+#endif
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#ifdef SCMP_ARCH_MIPS
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} else if (native_arch == lxc_seccomp_arch_mips64) {
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cur_rule_arch = lxc_seccomp_arch_all;
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@@ -1434,6 +1474,17 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
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cur_rule_arch = lxc_seccomp_arch_ppc;
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}
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#endif
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+#ifdef SCMP_ARCH_LOONGRCH64
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+ else if (strcmp(line, "[loongarch64]") == 0 ||
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+ strcmp(line, "[LOONGARCH64]") == 0) {
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+ if (native_arch != lxc_seccomp_arch_loongarch64) {
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+ cur_rule_arch = lxc_seccomp_arch_unknown;
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+ continue;
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+ }
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+
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+ cur_rule_arch = lxc_seccomp_arch_loongarch64;
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+ }
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+#endif
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#ifdef SCMP_ARCH_MIPS
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else if (strcmp(line, "[mips64]") == 0 ||
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strcmp(line, "[MIPS64]") == 0) {
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diff --git a/src/lxc/syscall_numbers.h b/src/lxc/syscall_numbers.h
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index c68cf24..01aa68d 100644
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--- a/src/lxc/syscall_numbers.h
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+++ b/src/lxc/syscall_numbers.h
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@@ -49,6 +49,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_keyctl 5241
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_keyctl 219
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#else
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#define -1
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#warning "__NR_keyctl not defined for your architecture"
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@@ -84,6 +86,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64
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#define __NR_memfd_create 5314
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_memfd_create 279
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#else
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#define -1
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#warning "__NR_memfd_create not defined for your architecture"
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@@ -117,6 +121,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_pivot_root 5151
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_pivot_root 41
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#else
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#define -1
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#warning "__NR_pivot_root not defined for your architecture"
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@@ -150,6 +156,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_setns 5303
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_setns 268
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#else
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#define -1
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#warning "__NR_setns not defined for your architecture"
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@@ -183,6 +191,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_sethostname 5165
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_sethostname 161
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#else
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#define -1
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#warning "__NR_sethostname not defined for your architecture"
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@@ -216,6 +226,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_signalfd 5276
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_signalfd -1 /* doesn't exist in loongarch64 */
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#else
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#define -1
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#warning "__NR_signalfd not defined for your architecture"
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@@ -249,6 +261,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_signalfd4 5283
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_signalfd4 74
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#else
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#define -1
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#warning "__NR_signalfd4 not defined for your architecture"
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@@ -282,6 +296,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_unshare 5262
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_unshare 97
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#else
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#define -1
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#warning "__NR_unshare not defined for your architecture"
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@@ -315,6 +331,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_bpf 5315
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_bpf 280
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#else
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#define -1
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#warning "__NR_bpf not defined for your architecture"
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@@ -348,6 +366,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_faccessat 5259
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_faccessat 48
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#else
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#define -1
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#warning "__NR_faccessat not defined for your architecture"
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@@ -401,6 +421,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_seccomp 5312
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_seccomp 277
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#else
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#define -1
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#warning "__NR_seccomp not defined for your architecture"
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@@ -434,6 +456,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_gettid 5178
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_gettid 178
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#else
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#define -1
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#warning "__NR_gettid not defined for your architecture"
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@@ -471,6 +495,8 @@
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#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
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#define __NR_execveat 5316
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#endif
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+ #elif defined __loongarch64
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+ #define __NR_execveat 281
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#else
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#define -1
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#warning "__NR_execveat not defined for your architecture"
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--
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2.33.0
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9
lxc.spec
9
lxc.spec
@ -1,4 +1,4 @@
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%global _release 2022102409
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%global _release 2022102410
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Name: lxc
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Name: lxc
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Version: 4.0.3
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Version: 4.0.3
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@ -65,6 +65,7 @@ Patch0054: 0054-rollback-strprint-code-modified.patch
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Patch0055: 0055-add-sscanf-adapation-code-for-musl.patch
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Patch0055: 0055-add-sscanf-adapation-code-for-musl.patch
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Patch0056: 0056-fix-cve-CVE-2022-47952-log-leaks-root-information.patch
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Patch0056: 0056-fix-cve-CVE-2022-47952-log-leaks-root-information.patch
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Patch0057: 0057-fix-lxc-write-error-message.patch
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Patch0057: 0057-fix-lxc-write-error-message.patch
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Patch0058: 0058-add-loongarch64-support-for-lxc.patch
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BuildRequires: systemd-units git libtool graphviz docbook2X doxygen chrpath
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BuildRequires: systemd-units git libtool graphviz docbook2X doxygen chrpath
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BuildRequires: pkgconfig(libseccomp)
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BuildRequires: pkgconfig(libseccomp)
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@ -245,6 +246,12 @@ make check
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%endif
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%endif
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%changelog
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%changelog
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* Thu Feb 09 2023 Wenlong Zhang<zhangwenlong@loongson.cn> - 4.0.3-2022102410
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- Type:bugfix
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- ID:NA
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- SUG:NA
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- DESC: add loongarch64 support for lxc
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* Wed Feb 08 2023 huangsong<huangsong14@huawei.com> - 4.0.3-2022102409
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* Wed Feb 08 2023 huangsong<huangsong14@huawei.com> - 4.0.3-2022102409
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- Type:bugfix
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- Type:bugfix
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- ID:NA
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- ID:NA
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@ -55,3 +55,4 @@
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0055-add-sscanf-adapation-code-for-musl.patch
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0055-add-sscanf-adapation-code-for-musl.patch
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0056-fix-cve-CVE-2022-47952-log-leaks-root-information.patch
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0056-fix-cve-CVE-2022-47952-log-leaks-root-information.patch
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0057-fix-lxc-write-error-message.patch
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0057-fix-lxc-write-error-message.patch
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0058-add-loongarch64-support-for-lxc.patch
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