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lxc/0027-add-loongarch64-support-for-lxc.patch
zhangxiaoyu dbbcadfc9c codecheck fix 
Signed-off-by: zhangxiaoyu <zhangxiaoyu58@huawei.com>
(cherry picked from commit 7e6d92b3dce2cff7d06c4073cce6a4d27514b239)
2023-09-07 14:17:45 +08:00

239 lines
7.1 KiB
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From 477ecc390bf4d62e8e02b98699b377b848b043de Mon Sep 17 00:00:00 2001
From: Wenlong Zhang <zhangwenlong@loongson.cn>
Date: Thu, 9 Feb 2023 08:18:35 +0000
Subject: [PATCH] add loongarch64 support for lxc
---
src/lxc/seccomp.c | 51 +++++++++++++++++++++++++++++++++++++++
src/lxc/syscall_numbers.h | 26 ++++++++++++++++++++
2 files changed, 77 insertions(+)
diff --git a/src/lxc/seccomp.c b/src/lxc/seccomp.c
index a6e6d42..cba1031 100644
--- a/src/lxc/seccomp.c
+++ b/src/lxc/seccomp.c
@@ -306,6 +306,7 @@ enum lxc_hostarch_t {
lxc_seccomp_arch_ppc64,
lxc_seccomp_arch_ppc64le,
lxc_seccomp_arch_ppc,
+ lxc_seccomp_arch_loongarch64,
lxc_seccomp_arch_mips,
lxc_seccomp_arch_mips64,
lxc_seccomp_arch_mips64n32,
@@ -340,6 +341,8 @@ int get_hostarch(void)
return lxc_seccomp_arch_ppc64;
else if (strncmp(uts.machine, "ppc", 3) == 0)
return lxc_seccomp_arch_ppc;
+ else if (strncmp(uts.machine, "loongarch64", 11) == 0)
+ return lxc_seccomp_arch_loongarch64;
else if (strncmp(uts.machine, "mips64", 6) == 0)
return MIPS_ARCH_N64;
else if (strncmp(uts.machine, "mips", 4) == 0)
@@ -396,6 +399,11 @@ scmp_filter_ctx get_new_ctx(enum lxc_hostarch_t n_arch,
arch = SCMP_ARCH_PPC;
break;
#endif
+#ifdef SCMP_ARCH_LOONGARCH64
+ case lxc_seccomp_arch_loongarch64:
+ arch = SCMP_ARCH_LOONGARCH64;
+ break;
+#endif
#ifdef SCMP_ARCH_MIPS
case lxc_seccomp_arch_mips:
arch = SCMP_ARCH_MIPS;
@@ -739,6 +747,16 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
goto bad;
#endif
#endif
+#ifdef SCMP_ARCH_LOONGARCH64
+ } else if (native_arch == lxc_seccomp_arch_loongarch64) {
+ cur_rule_arch = lxc_seccomp_arch_all;
+
+ ctx.lxc_arch[0] = lxc_seccomp_arch_loongarch64;
+ ctx.contexts[0] = get_new_ctx(lxc_seccomp_arch_loongarch64,
+ default_policy_action, &ctx.architectures[0]);
+ if (!ctx.contexts[0])
+ goto bad;
+#endif
#ifdef SCMP_ARCH_MIPS
} else if (native_arch == lxc_seccomp_arch_mips64) {
cur_rule_arch = lxc_seccomp_arch_all;
@@ -904,6 +922,17 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
cur_rule_arch = lxc_seccomp_arch_ppc;
}
#endif
+#ifdef SCMP_ARCH_LOONGARCH64
+ else if (strcmp(line, "[loongarch64]") == 0 ||
+ strcmp(line, "[LOONGARCH64]") == 0) {
+ if (native_arch != lxc_seccomp_arch_loongarch64) {
+ cur_rule_arch = lxc_seccomp_arch_unknown;
+ continue;
+ }
+
+ cur_rule_arch = lxc_seccomp_arch_loongarch64;
+ }
+#endif
#ifdef SCMP_ARCH_MIPS
else if (strcmp(line, "[mips64]") == 0 ||
strcmp(line, "[MIPS64]") == 0) {
@@ -1237,6 +1266,17 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
goto bad;
#endif
#endif
+#ifdef SCMP_ARCH_LOONGARCH64
+ } else if (native_arch == lxc_seccomp_arch_loongarch64) {
+ cur_rule_arch = lxc_seccomp_arch_all;
+
+ ctx.architectures[0] = SCMP_ARCH_LOONGARCH64;
+ ctx.contexts[0] = get_new_ctx(lxc_seccomp_arch_loongarch64,
+ default_policy_action,
+ &ctx.needs_merge[0]);
+ if (!ctx.contexts[0])
+ goto bad;
+#endif
#ifdef SCMP_ARCH_MIPS
} else if (native_arch == lxc_seccomp_arch_mips64) {
cur_rule_arch = lxc_seccomp_arch_all;
@@ -1408,6 +1448,17 @@ static int parse_config_v2(FILE *f, char *line, size_t *line_bufsz, struct lxc_c
cur_rule_arch = lxc_seccomp_arch_ppc;
}
#endif
+#ifdef SCMP_ARCH_LOONGRCH64
+ else if (strcmp(line, "[loongarch64]") == 0 ||
+ strcmp(line, "[LOONGARCH64]") == 0) {
+ if (native_arch != lxc_seccomp_arch_loongarch64) {
+ cur_rule_arch = lxc_seccomp_arch_unknown;
+ continue;
+ }
+
+ cur_rule_arch = lxc_seccomp_arch_loongarch64;
+ }
+#endif
#ifdef SCMP_ARCH_MIPS
else if (strcmp(line, "[mips64]") == 0 ||
strcmp(line, "[MIPS64]") == 0) {
diff --git a/src/lxc/syscall_numbers.h b/src/lxc/syscall_numbers.h
index 803eab7..44a6494 100644
--- a/src/lxc/syscall_numbers.h
+++ b/src/lxc/syscall_numbers.h
@@ -51,6 +51,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_keyctl 5241
#endif
+ #elif defined __loongarch64
+ #define __NR_keyctl 219
#else
#define -1
#warning "__NR_keyctl not defined for your architecture"
@@ -88,6 +90,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64
#define __NR_memfd_create 5314
#endif
+ #elif defined __loongarch64
+ #define __NR_memfd_create 279
#else
#define -1
#warning "__NR_memfd_create not defined for your architecture"
@@ -123,6 +127,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_pivot_root 5151
#endif
+ #elif defined __loongarch64
+ #define __NR_pivot_root 41
#else
#define -1
#warning "__NR_pivot_root not defined for your architecture"
@@ -158,6 +164,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_setns 5303
#endif
+ #elif defined __loongarch64
+ #define __NR_setns 268
#else
#define -1
#warning "__NR_setns not defined for your architecture"
@@ -193,6 +201,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_sethostname 5165
#endif
+ #elif defined __loongarch64
+ #define __NR_sethostname 161
#else
#define -1
#warning "__NR_sethostname not defined for your architecture"
@@ -228,6 +238,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_signalfd 5276
#endif
+ #elif defined __loongarch64
+ #define __NR_signalfd -1 /* doesn't exist in loongarch64 */
#else
#define -1
#warning "__NR_signalfd not defined for your architecture"
@@ -263,6 +275,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_signalfd4 5283
#endif
+ #elif defined __loongarch64
+ #define __NR_signalfd4 74
#else
#define -1
#warning "__NR_signalfd4 not defined for your architecture"
@@ -298,6 +312,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_unshare 5262
#endif
+ #elif defined __loongarch64
+ #define __NR_unshare 97
#else
#define -1
#warning "__NR_unshare not defined for your architecture"
@@ -333,6 +349,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_bpf 5315
#endif
+ #elif defined __loongarch64
+ #define __NR_bpf 280
#else
#define -1
#warning "__NR_bpf not defined for your architecture"
@@ -368,6 +386,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_faccessat 5259
#endif
+ #elif defined __loongarch64
+ #define __NR_faccessat 48
#else
#define -1
#warning "__NR_faccessat not defined for your architecture"
@@ -425,6 +445,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_seccomp 5312
#endif
+ #elif defined __loongarch64
+ #define __NR_seccomp 277
#else
#define -1
#warning "__NR_seccomp not defined for your architecture"
@@ -460,6 +482,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_gettid 5178
#endif
+ #elif defined __loongarch64
+ #define __NR_gettid 178
#else
#define -1
#warning "__NR_gettid not defined for your architecture"
@@ -499,6 +523,8 @@
#if _MIPS_SIM == _MIPS_SIM_ABI64 /* n64 */
#define __NR_execveat 5316
#endif
+ #elif defined __loongarch64
+ #define __NR_execveat 281
#else
#define -1
#warning "__NR_execveat not defined for your architecture"
--
2.25.1
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