!29 [sync] PR-25: 增加龙芯 和申威架构支持
From: @openeuler-sync-bot Reviewed-by: @Charlie_li Signed-off-by: @Charlie_li
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90
add-loongarch-support.patch
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90
add-loongarch-support.patch
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@ -0,0 +1,90 @@
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diff -Nur a/src/linux-context.h b/src/linux-context.h
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--- a/src/linux-context.h 2023-02-13 17:13:46.695350258 +0800
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+++ b/src/linux-context.h 2023-02-13 17:12:54.094497176 +0800
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@@ -33,6 +33,8 @@
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.arm_pc
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#elif defined(__aarch64__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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+#elif defined(__loongarch__)
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+#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.__pc
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#elif defined(__mips__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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#elif defined(__hppa__)
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diff -Nur a/src/linux-lock.h b/src/linux-lock.h
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--- a/src/linux-lock.h 2019-03-05 03:56:23.000000000 +0800
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+++ b/src/linux-lock.h 2023-02-13 17:12:54.094497176 +0800
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@@ -223,6 +223,37 @@
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}
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#define _papi_hwd_lock(lck) __raw_spin_lock(&_papi_hwd_lock_data[lck]);
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#define _papi_hwd_unlock(lck) __raw_spin_unlock(&_papi_hwd_lock_data[lck])
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+#elif defined(__loongarch__)
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+static inline void __raw_spin_lock(volatile unsigned int *lock)
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+{
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+ unsigned int tmp;
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+ __asm__ __volatile__(
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+ "1: ll.w %1, %2 \n"
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+ " bnez %1, 1b \n"
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+ " li.w %1, 1 \n"
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+ " sc.w %1, %0 \n"
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+ " beqz %1, 1b \n"
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+ " nop \n"
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+ : "=m" (*lock), "=&r" (tmp)
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+ : "m" (*lock)
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+ : "memory");
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+}
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+
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+static inline void __raw_spin_unlock(volatile unsigned int *lock)
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+{
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+ unsigned int tmp;
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+ __asm__ __volatile__(
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+ " nop \n"
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+ " li.w %1, 0 \n"
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+ " st.w %1, %0 \n"
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+ : "=m" (*lock), "=&r" (tmp)
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+ : "m" (*lock)
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+ : "memory");
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+}
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+#define _papi_hwd_lock(lck) { rmb(); __raw_spin_lock(&_papi_hwd_lock_data[lck]); rmb(); }
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+#define _papi_hwd_unlock(lck) { rmb(); __raw_spin_unlock(&_papi_hwd_lock_data[lck]); rmb(); }
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+
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+
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#else
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#error "_papi_hwd_lock/unlock undefined!"
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diff -Nur a/src/linux-timer.c b/src/linux-timer.c
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--- a/src/linux-timer.c 2023-02-13 17:13:46.695350258 +0800
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+++ b/src/linux-timer.c 2023-02-13 17:12:54.094497176 +0800
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@@ -245,6 +245,20 @@
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return ret;
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}
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+/****************************/
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+/* loongarch64 get_cycles() */
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+/****************************/
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+#elif defined(__loongarch__)
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+static inline long long
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+get_cycles(void)
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+{
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+ register unsigned long ret = 0;
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+ int rID = 0;
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+ __asm__ __volatile__ ("ibar 0" ::: "memory");
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+ __asm__ __volatile__ ("rdtime.d %0, %1" :"=r"(ret),"=r"(rID));
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+ return ret;
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+}
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+
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/************************/
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/* POWER get_cycles() */
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/************************/
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diff -Nur a/src/mb.h b/src/mb.h
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--- a/src/mb.h 2023-02-13 17:13:46.695350258 +0800
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+++ b/src/mb.h 2023-02-13 17:12:54.098497240 +0800
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@@ -39,6 +39,9 @@
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#elif defined(__aarch64__)
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#define rmb() asm volatile("dmb ld" ::: "memory")
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+#elif defined(__loongarch__)
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+#define rmb() asm volatile("dbar 0" ::: "memory")
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+
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#elif defined(__riscv)
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#define rmb() asm volatile("fence ir, ir" ::: "memory")
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109
papi-5.7.0-sw.patch
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109
papi-5.7.0-sw.patch
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@ -0,0 +1,109 @@
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From 5152ebe60d70f212df8619313463ae08185cfc55 Mon Sep 17 00:00:00 2001
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From: panchenbo <panchenbo@kylinsec.com.cn>
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Date: Tue, 16 May 2023 20:03:44 +0800
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Subject: [PATCH] add sw_64 support
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---
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src/components/appio/tests/iozone/iozone.c | 2 +-
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src/configure | 2 +-
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src/configure.in | 2 +-
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src/linux-context.h | 2 ++
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src/linux-timer.c | 15 +++++++++++++++
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src/mb.h | 3 +++
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6 files changed, 23 insertions(+), 3 deletions(-)
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diff --git a/src/components/appio/tests/iozone/iozone.c b/src/components/appio/tests/iozone/iozone.c
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index 7708cd7..0fb29e3 100644
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--- a/src/components/appio/tests/iozone/iozone.c
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+++ b/src/components/appio/tests/iozone/iozone.c
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@@ -81,7 +81,7 @@ extern int h_errno; /* imported for errors */
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#include <sys/types.h>
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#include <sys/stat.h>
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-#if defined (__LP64__) || defined(OSF_64) || defined(__alpha__) || defined(__arch64__) || defined(_LP64) || defined(__s390x__) || defined(__AMD64__)
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+#if defined (__LP64__) || defined(OSF_64) || defined(__alpha__) || defined(__sw_64__) || defined(__arch64__) || defined(_LP64) || defined(__s390x__) || defined(__AMD64__)
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#define MODE "\tCompiled for 64 bit mode."
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#define _64BIT_ARCH_
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#else
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diff --git a/src/configure b/src/configure
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index 02db3ac..2f83166 100755
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--- a/src/configure
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+++ b/src/configure
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@@ -4628,7 +4628,7 @@ _ACEOF
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# First set pthread-mutexes based on arch
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case $arch in
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- aarch64|arm*|parisc*|riscv*)
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+ aarch64|arm*|parisc*|riscv*|sw_64)
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pthread_mutexes=yes
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CFLAGS="$CFLAGS -DUSE_PTHREAD_MUTEXES"
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echo "forcing use of pthread mutexes... " >&6
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diff --git a/src/configure.in b/src/configure.in
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index 2c219ad..964f0e6 100644
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--- a/src/configure.in
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+++ b/src/configure.in
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@@ -378,7 +378,7 @@ AC_DEFINE_UNQUOTED(CPU,$CPU,[cpu type])
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# First set pthread-mutexes based on arch
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case $arch in
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- aarch64|arm*|parisc*|riscv*)
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+ aarch64|arm*|parisc*|riscv*|sw_64)
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pthread_mutexes=yes
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CFLAGS="$CFLAGS -DUSE_PTHREAD_MUTEXES"
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echo "forcing use of pthread mutexes... " >&6
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diff --git a/src/linux-context.h b/src/linux-context.h
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index fc07338..a55127c 100644
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--- a/src/linux-context.h
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+++ b/src/linux-context.h
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@@ -33,6 +33,8 @@ typedef ucontext_t hwd_ucontext_t;
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.arm_pc
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#elif defined(__aarch64__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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+#elif defined(__sw_64__)
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+#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.sc_pc
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#elif defined(__loongarch__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.__pc
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#elif defined(__mips__)
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diff --git a/src/linux-timer.c b/src/linux-timer.c
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index 1d6b7a8..43de746 100644
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--- a/src/linux-timer.c
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+++ b/src/linux-timer.c
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@@ -230,6 +230,21 @@ get_cycles( void )
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return ret;
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}
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+/************************/
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+/* sw_64 get_cycles() */
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+/************************/
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+
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+#elif defined(__sw_64__)
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+static inline long long
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+get_cycles( void )
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+{
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+ register unsigned long ret;
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+
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+ __asm__ __volatile__ ("rtc %0" : "=r" (ret));
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+
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+ return ret;
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+}
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+
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/************************/
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/* aarch64 get_cycles() */
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/************************/
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diff --git a/src/mb.h b/src/mb.h
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index e98b574..b14bf5e 100644
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--- a/src/mb.h
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+++ b/src/mb.h
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@@ -26,6 +26,9 @@
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#elif defined (__alpha__)
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#define rmb() asm volatile("mb" ::: "memory")
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+#elif defined (__sw_64__)
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+#define rmb() asm volatile("memb" ::: "memory")
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+
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#elif defined(__ia64__)
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#define rmb() asm volatile ("mf" ::: "memory")
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--
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2.27.0
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12
papi.spec
12
papi.spec
@ -1,6 +1,6 @@
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Name: papi
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Version: 5.7.0
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Release: 1
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Release: 2
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Summary: Performance Application Programming Interface
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License: BSD
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URL: http://icl.cs.utk.edu/papi/
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@ -13,6 +13,9 @@ Obsoletes: papi-libs < %{version}-%{release}
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Patch0001: papi-add-support-riscv64.patch
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Patch3000: add-loongarch-support.patch
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Patch3001: papi-5.7.0-sw.patch
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%description
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PAPI provides a programmer interface to monitor the performance of
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running programs,and contains the run-time libraries for any application that wishes
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@ -42,7 +45,11 @@ cd src
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autoconf
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%configure --with-perf-events --with-pfm-incdir=%{_includedir} --with-pfm-libdir=%{_libdir} \
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--with-static-lib=yes --with-shared-lib=yes --with-shlib --with-shlib-tools \
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%ifarch sw_64
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--with-components="coretemp example infiniband lmsensors lustre micpower mx net rapl stealtime"
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%else
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--with-components="appio coretemp example infiniband lmsensors lustre micpower mx net rapl stealtime"
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%endif
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cd components
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cd infiniband_umad; %configure
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@ -87,6 +94,9 @@ chrpath --delete $RPM_BUILD_ROOT%{_libdir}/*.so*
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%{_mandir}/man3/*
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%changelog
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* Mon Aug 14 2023 yangchenguang <yangchenguang@kylinsec.com.cn> - 5.7.0-2
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- Add loongarch64 and sw_64 support
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* Mon Feb 13 2023 liyanan <liyanan32@h-partners.com> - 5.7.0-1
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- Update to 5.7.0
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