6b2652f6a6
Signed-off-by: yangchenguang <yangchenguang@kylinsec.com.cn> (cherry picked from commit 6119b0e0db6b0edb77bbfc4fa2050e6e314d1a1e)
91 lines
3.0 KiB
Diff
91 lines
3.0 KiB
Diff
diff -Nur a/src/linux-context.h b/src/linux-context.h
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--- a/src/linux-context.h 2023-02-13 17:13:46.695350258 +0800
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+++ b/src/linux-context.h 2023-02-13 17:12:54.094497176 +0800
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@@ -33,6 +33,8 @@
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.arm_pc
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#elif defined(__aarch64__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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+#elif defined(__loongarch__)
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+#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.__pc
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#elif defined(__mips__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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#elif defined(__hppa__)
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diff -Nur a/src/linux-lock.h b/src/linux-lock.h
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--- a/src/linux-lock.h 2019-03-05 03:56:23.000000000 +0800
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+++ b/src/linux-lock.h 2023-02-13 17:12:54.094497176 +0800
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@@ -223,6 +223,37 @@
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}
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#define _papi_hwd_lock(lck) __raw_spin_lock(&_papi_hwd_lock_data[lck]);
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#define _papi_hwd_unlock(lck) __raw_spin_unlock(&_papi_hwd_lock_data[lck])
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+#elif defined(__loongarch__)
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+static inline void __raw_spin_lock(volatile unsigned int *lock)
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+{
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+ unsigned int tmp;
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+ __asm__ __volatile__(
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+ "1: ll.w %1, %2 \n"
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+ " bnez %1, 1b \n"
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+ " li.w %1, 1 \n"
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+ " sc.w %1, %0 \n"
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+ " beqz %1, 1b \n"
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+ " nop \n"
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+ : "=m" (*lock), "=&r" (tmp)
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+ : "m" (*lock)
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+ : "memory");
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+}
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+
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+static inline void __raw_spin_unlock(volatile unsigned int *lock)
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+{
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+ unsigned int tmp;
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+ __asm__ __volatile__(
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+ " nop \n"
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+ " li.w %1, 0 \n"
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+ " st.w %1, %0 \n"
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+ : "=m" (*lock), "=&r" (tmp)
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+ : "m" (*lock)
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+ : "memory");
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+}
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+#define _papi_hwd_lock(lck) { rmb(); __raw_spin_lock(&_papi_hwd_lock_data[lck]); rmb(); }
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+#define _papi_hwd_unlock(lck) { rmb(); __raw_spin_unlock(&_papi_hwd_lock_data[lck]); rmb(); }
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+
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+
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#else
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#error "_papi_hwd_lock/unlock undefined!"
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diff -Nur a/src/linux-timer.c b/src/linux-timer.c
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--- a/src/linux-timer.c 2023-02-13 17:13:46.695350258 +0800
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+++ b/src/linux-timer.c 2023-02-13 17:12:54.094497176 +0800
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@@ -245,6 +245,20 @@
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return ret;
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}
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+/****************************/
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+/* loongarch64 get_cycles() */
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+/****************************/
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+#elif defined(__loongarch__)
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+static inline long long
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+get_cycles(void)
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+{
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+ register unsigned long ret = 0;
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+ int rID = 0;
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+ __asm__ __volatile__ ("ibar 0" ::: "memory");
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+ __asm__ __volatile__ ("rdtime.d %0, %1" :"=r"(ret),"=r"(rID));
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+ return ret;
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+}
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+
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/************************/
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/* POWER get_cycles() */
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/************************/
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diff -Nur a/src/mb.h b/src/mb.h
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--- a/src/mb.h 2023-02-13 17:13:46.695350258 +0800
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+++ b/src/mb.h 2023-02-13 17:12:54.098497240 +0800
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@@ -39,6 +39,9 @@
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#elif defined(__aarch64__)
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#define rmb() asm volatile("dmb ld" ::: "memory")
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+#elif defined(__loongarch__)
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+#define rmb() asm volatile("dbar 0" ::: "memory")
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+
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#elif defined(__riscv)
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#define rmb() asm volatile("fence ir, ir" ::: "memory")
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