- sync some bugfix patches from upstream
- fix the virtio features negotiation flaw
- fix CVE-2022-4144
Signed-off-by: yezengruan <yezengruan@huawei.com>
(cherry picked from commit 86bdfa92116f931f9f221449750d1ddb8b31bacd)
- arm/virt: Fix vcpu hotplug idx_from_topo_ids
- Revert patches related to the vSVA
- sync some bugfix patches from upstream
- add generic vDPA device support
Signed-off-by: yezengruan <yezengruan@huawei.com>
Support rbd by adding --enable-rbd compilation option
Signed-off-by: yuelg <yuelg@chinaunicom.cn>
(cherry picked from commit 62f5717c6f9c7d92224560c2d84381bc09ad9a6f)
- support dirty restraint on vCPU
- support SPR AMX in Qemu
- fix compilation errors of sw64
Signed-off-by: yezengruan <yezengruan@huawei.com>
(cherry picked from commit e9095b76ae8be40ed088bf155356ab11d61f9e3b)
net-tulip-Restrict-DMA-engine-to-memories.patch was named with CVE-XX
surfixes, the spec remains that old name, change the name there.
Signed-off-by: Zhang Bo <oscar.zhangbo@huawei.com>
(cherry picked from commit 9e73b27bd80a240f37eb04c17d593c3f83eab6b6)
fix CVE-2022-2962.
The DMA engine is started by I/O access and then itself accesses the
I/O registers, triggering a teentrancy bug.
Fix this bug by restricting the DMA engine to memories regions.
Signed-off-by: Zhang Bo <oscar.zhangbo@huawei.com>
(cherry picked from commit 69b69596a274bd68695dda39ef939ed1ddbf9ba1)
hw/scsi/lsi53c895a: Do not abort when DMA requested and no data queued
tests/qtest: Add fuzz-lsi53c895a-test
scsi/lsi53c895a: fix use-after-free in lsi_do_msgout (CVE-2022-0216)
scsi/lsi53c895a: really fix use-after-free in lsi_do_msgout (CVE-2022-0216)
Signed-off-by: yezengruan <yezengruan@huawei.com>
(cherry picked from commit 9b71f5aa79cf60ef96779e8127429e08af0f3f12)
block-nbd was refacted during release 6.2.0, but we didn't induced
all the needed patches within the 6.2.0 baseline, which leads to
vm crash during migration.
the reasons are as below:
when iothread is configured, the coroutines should get back to
the exact iothread that was out of. But within the 6.2.0 baseline,
patches were missing, nbd related coroutine didn't have its related
aio_context. It in fact get to the mainline aio_context, the mistaken
context leads to vm crash.
(cherry picked from commit 6e9beed308cf3a252419fe8fde37cae3d1f2e281)
hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR (CVE-2021-3750)
softmmu/physmem: Simplify flatview_write and address_space_access_valid
softmmu/physmem: Introduce MemTxAttrs::memory field and MEMTX_ACCESS_ERROR
(cherry picked from commit b39643dc6ee4fab61b1d840a1124cb407c7c0af1)
Change Ascend710's quirk regions to bar2 for internal causes.
And support Ascend710 2P format now.
Signed-off-by: Wu Binfeng <wubinfeng@huawei.com>
Signed-off-by: yezengruan <yezengruan@huawei.com>
(cherry picked from commit ce1ce575d621f918d1719f8d2fadbbcc68260ada)
vhost-vsock: detach the virqueue element in case of error (CVE-2022-26354)
virtio-net: fix map leaking on error during receive (CVE-2022-26353)
Signed-off-by: yezengruan <yezengruan@huawei.com>
The paramter 'cache' is invalid for host device(/dev/xxx). If
'qemu-img create' operator performed on host device, the host
device not support 'cache' would result 'qemu-img create excute'
failed.
Signed-off-by: Jinhua Cao <caojinhua1@huawei.com>
This option changes the thread local storage (TLS) model. Thread-local storage
is a mechanism by which variables are allocated in a way that causes one instance
of the variable per extant thread.
i.global-dynamic
Generates a generic TLS code. The code can be used everywhere and the code can access
variables defined anywhere else. This setting causes the largest size code to be generated
and uses the most run time to produce.
ii.local-dynamic
Generates an optimized TLS code. To use this setting, the thread-local variables must be
defined in the same object in which they are referenced.
iii.initial-exec
Generates a restrictive, optimized TLS code. To use this setting, the thread-local variables
accessed must be defined in one of the modules available to the program.
iv.local-exec
Generates the most restrictive TLS code. To use this setting, the thread-local variables
must be defined in the executable.
Optimize qemu cflags with '-ftls-model=initial-exec' which means we use initial-exec
mode.
pl011-reset-read-FIFO-when-UARTTIMSC-0-UARTICR-0xfff.patch
qcow2-fix-memory-leak-in-qcow2_read_extensions.patch
scsi-disk-define-props-in-scsi_block_disk-to-avoid-m.patch
pcie-Add-pcie-root-port-fast-plug-unplug-feature.patch
pcie-Compat-with-devices-which-do-not-support-Link-W.patch
Signed-off-by: Yan Wang <wangyan122@huawei.com>
acpi/madt: Factor out the building of MADT GICC struct
hw/arm/virt: Assign virt_madt_cpu_entry to acpi_ged madt_cpu hook
arm/virt/acpi: Factor out CPPC building from DSDT CPU aml
acpi/cpu: Prepare build_cpus_aml for arm virt
acpi/ged: Extend ACPI GED to support CPU hotplug
arm/cpu: assign arm_get_arch_id handler to get_arch_id hook
tests/acpi/bios-tables-test: Allow changes to virt/DSDT file
arm/virt: Attach ACPI CPU hotplug support to virt
tests/acpi/bios-table-test: Update expected virt/DSDT file
arm/virt: Add CPU hotplug framework
arm/virt: Add CPU topology support
test/numa: Adjust aarch64 numa test
hw/arm/virt: Factor out some CPU init codes to pre_plug hook
hw/arm/boot: Add manually register and trigger of CPU reset
arm/virt/gic: Construct irqs connection from create_gic
intc/gicv3_common: Factor out arm_gicv3_common_cpu_realize
intc/gicv3_cpuif: Factor out gicv3_init_one_cpuif
intc/kvm_gicv3: Factor out kvm_arm_gicv3_cpu_realize
hw/intc/gicv3: Add CPU hotplug realize hook
accel/kvm: Add pre-park vCPU support
intc/gicv3: Add pre-sizing capability to GICv3
acpi/madt: Add pre-sizing capability to MADT GICC struct
arm/virt: Add cpu_hotplug_enabled field
arm/virt/acpi: Extend cpufreq to support max_cpus
arm/virt: Pre-sizing MADT-GICC GICv3 and Pre-park KVM vCPU
arm/virt: Start up CPU hot-plug and cold-plug
Signed-off-by: Chen Qun<kuhn.chenqun@huawei.com>
(cherry picked from commit 9390aa07e450024769ceb3bb3ab481af8911a77b)
