qemu/amd_iommu-Fix-APIC-address-check.patch
Jiabo Feng 9803c6ed12 QEMU update to version 6.2.0-91
- hw/virtio/virtio-crypto: Protect from DMA re-entrancy bugs(CVE-2024-3446)
- hw/char/virtio-serial-bus: Protect from DMA re-entrancy bugs(CVE-2024-3446)
- hw/display/virtio-gpu: Protect from DMA re-entrancy bugs(CVE-2024-3446)
- hw/virtio: Introduce virtio_bh_new_guarded() helper
- hw: replace most qemu_bh_new calls with qemu_bh_new_guarded
- checkpatch: add qemu_bh_new/aio_bh_new checks
- async: avoid use-after-free on re-entrancy guard
- async: Add an optional reentrancy guard to the BH API
- hw/sd/sdhci: Do not update TRNMOD when Command Inhibit (DAT) is set(CVE-2024-3447)
- rtl8139: Remove unused variable
- tulip: Remove unused variable
- virtio-mem: Fix the bitmap index of the section offset
- virtio-mem: Fix the iterator variable in a vmem->rdl_list loop
- system/memory: use ldn_he_p/stn_he_p
- block: Fix crash when loading snapshot on inactive node
- smmu: Clear SMMUPciBus pointer cache when system reset
- block/mirror: Fix NULL s->job in active writes
- amd_iommu: Fix APIC address check
- virtio-crypto: fix NULL pointer dereference in virtio_crypto_free_reques
- libqos/virtio.c: Correct 'flags' reading in qvirtqueue_kick cherry-pick from 66e411885a23c96ff73742d06b793fec3ceaebb7
- ivshmem-test.c: enable test_ivshmem_server for ppc64 arch
- ivshmem.c: change endianness to LITTLE_ENDIAN
- hw/ppc/mac.h: Remove MAX_CPUS macro
- configure: remove dead variables
- virtio-gpu: do not byteswap padding
- hw/intc: clean-up error reporting for failed ITS cmd
- qemu-iotests: Discard stderr when probing devices
- linux-user: un-parent OBJECT(cpu) when closing thread
- hw/net/rocker: Avoid undefined shifts with more than 31 ports
- contrib/vhost-user-blk: Clean up deallocation of VuVirtqElement
- scsi-disk: fix overflow when block size is not a multiple of BDRV_SECTOR_SIZE

Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
(cherry picked from commit bf54b48c2963c869dfdc89977c57be4bd9e772aa)
2024-04-24 10:57:37 +08:00

58 lines
2.2 KiB
Diff

From ea8049e63b663cab607d1f900ce593547485b33b Mon Sep 17 00:00:00 2001
From: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
Date: Wed, 10 Apr 2024 20:02:38 -0700
Subject: [PATCH] amd_iommu: Fix APIC address check
An MSI from I/O APIC may not exactly equal to APIC_DEFAULT_ADDRESS. In
fact, Windows 17763.3650 configures I/O APIC to set the dest_mode bit.
Cover the range assigned to APIC.
Fixes: 577c470f43 ("x86_iommu/amd: Prepare for interrupt remap support")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20230921114612.40671-1-akihiko.odaki@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
(cherry picked from commit 0114c4513095598cdf1cd8d7dacdfff757628121)
Signed-off-by: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
---
hw/i386/amd_iommu.c | 9 ++-------
hw/i386/amd_iommu.h | 2 --
2 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 4d13d8e697..dfb9a2d8e6 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1245,13 +1245,8 @@ static int amdvi_int_remap_msi(AMDVIState *iommu,
return -AMDVI_IR_ERR;
}
- if (origin->address & AMDVI_MSI_ADDR_HI_MASK) {
- trace_amdvi_err("MSI address high 32 bits non-zero when "
- "Interrupt Remapping enabled.");
- return -AMDVI_IR_ERR;
- }
-
- if ((origin->address & AMDVI_MSI_ADDR_LO_MASK) != APIC_DEFAULT_ADDRESS) {
+ if (origin->address < AMDVI_INT_ADDR_FIRST ||
+ origin->address + sizeof(origin->data) > AMDVI_INT_ADDR_LAST + 1) {
trace_amdvi_err("MSI is not from IOAPIC.");
return -AMDVI_IR_ERR;
}
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
index 79d38a3e41..210a37dfb1 100644
--- a/hw/i386/amd_iommu.h
+++ b/hw/i386/amd_iommu.h
@@ -210,8 +210,6 @@
#define AMDVI_INT_ADDR_FIRST 0xfee00000
#define AMDVI_INT_ADDR_LAST 0xfeefffff
#define AMDVI_INT_ADDR_SIZE (AMDVI_INT_ADDR_LAST - AMDVI_INT_ADDR_FIRST + 1)
-#define AMDVI_MSI_ADDR_HI_MASK (0xffffffff00000000ULL)
-#define AMDVI_MSI_ADDR_LO_MASK (0x00000000ffffffffULL)
/* SB IOAPIC is always on this device in AMD systems */
#define AMDVI_IOAPIC_SB_DEVID PCI_BUILD_BDF(0, PCI_DEVFN(0x14, 0))
--
2.27.0