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add loongarch64 and sw_64 support

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(cherry picked from commit 8e10a648bc99cd59dd913430a402fab8eecf33d3)
This commit is contained in:
panchenbo 2023-08-12 10:05:12 +08:00 committed by openeuler-sync-bot
parent 65c02eead1
commit a886c4d3c1
2 changed files with 168 additions and 1 deletions
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157
3001-add-sw_64-support.patch Normal file
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@ -0,0 +1,157 @@
From 19765b9cec7811627262166c209bf919ed35e028 Mon Sep 17 00:00:00 2001
From: root <root@localhost.localdomain>
Date: Thu, 16 Mar 2023 11:20:56 +0800
Subject: [PATCH] add sw_64 support
---
.../JavaScriptCore/assembler/AbstractMacroAssembler.h | 6 +++---
.../javascriptcore/JavaScriptCore/jit/JITInlineMethods.h | 4 ++--
.../javascriptcore/JavaScriptCore/runtime/Collector.cpp | 7 +++++++
src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h | 7 ++++++-
.../javascriptcore/JavaScriptCore/yarr/RegexJIT.cpp | 6 +++---
5 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/assembler/AbstractMacroAssembler.h b/src/3rdparty/javascriptcore/JavaScriptCore/assembler/AbstractMacroAssembler.h
index 198e8d1..6712dc4 100644
--- a/src/3rdparty/javascriptcore/JavaScriptCore/assembler/AbstractMacroAssembler.h
+++ b/src/3rdparty/javascriptcore/JavaScriptCore/assembler/AbstractMacroAssembler.h
@@ -173,7 +173,7 @@ public:
struct Imm32 {
explicit Imm32(int32_t value)
: m_value(value)
-#if CPU(ARM)
+#if CPU(ARM) || CPU(SW_64)
, m_isPointer(false)
#endif
{
@@ -182,7 +182,7 @@ public:
#if !CPU(X86_64)
explicit Imm32(ImmPtr ptr)
: m_value(ptr.asIntptr())
-#if CPU(ARM)
+#if CPU(ARM) || CPU(SW_64)
, m_isPointer(true)
#endif
{
@@ -190,7 +190,7 @@ public:
#endif
int32_t m_value;
-#if CPU(ARM)
+#if CPU(ARM) || CPU(SW_64)
// We rely on being able to regenerate code to recover exception handling
// information. Since ARMv7 supports 16-bit immediates there is a danger
// that if pointer values change the layout of the generated code will change.
diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/jit/JITInlineMethods.h b/src/3rdparty/javascriptcore/JavaScriptCore/jit/JITInlineMethods.h
index 5af7565..ceef722 100644
--- a/src/3rdparty/javascriptcore/JavaScriptCore/jit/JITInlineMethods.h
+++ b/src/3rdparty/javascriptcore/JavaScriptCore/jit/JITInlineMethods.h
@@ -144,7 +144,7 @@ ALWAYS_INLINE void JIT::endUninterruptedSequence(int insnSpace, int constSpace)
#endif
-#if CPU(ARM)
+#if CPU(ARM) || CPU(SW_64)
ALWAYS_INLINE void JIT::preserveReturnAddressAfterCall(RegisterID reg)
{
@@ -197,7 +197,7 @@ ALWAYS_INLINE void JIT::restoreArgumentReferenceForTrampoline()
#if CPU(X86)
// Within a trampoline the return address will be on the stack at this point.
addPtr(Imm32(sizeof(void*)), stackPointerRegister, firstArgumentRegister);
-#elif CPU(ARM)
+#elif CPU(ARM) || CPU(SW_64)
move(stackPointerRegister, firstArgumentRegister);
#endif
// In the trampoline on x86-64, the first argument register is not overwritten.
diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/runtime/Collector.cpp b/src/3rdparty/javascriptcore/JavaScriptCore/runtime/Collector.cpp
index e8f78ee..a032bfb 100644
--- a/src/3rdparty/javascriptcore/JavaScriptCore/runtime/Collector.cpp
+++ b/src/3rdparty/javascriptcore/JavaScriptCore/runtime/Collector.cpp
@@ -894,6 +894,8 @@ typedef ppc_thread_state_t PlatformThreadRegisters;
typedef ppc_thread_state64_t PlatformThreadRegisters;
#elif CPU(ARM)
typedef arm_thread_state_t PlatformThreadRegisters;
+#elif CPU(SW_64)
+typedef arm_thread_state_t PlatformThreadRegisters;
#else
#error Unknown Architecture
#endif
@@ -923,6 +925,9 @@ static size_t getPlatformThreadRegisters(const PlatformThread& platformThread, P
#elif CPU(ARM)
unsigned user_count = ARM_THREAD_STATE_COUNT;
thread_state_flavor_t flavor = ARM_THREAD_STATE;
+#elif CPU(SW_64)
+ unsigned user_count = ARM_THREAD_STATE_COUNT;
+ thread_state_flavor_t flavor = ARM_THREAD_STATE;
#else
#error Unknown Architecture
#endif
@@ -959,6 +964,8 @@ static inline void* otherThreadStackPointer(const PlatformThreadRegisters& regs)
return reinterpret_cast<void*>(regs.__r1);
#elif CPU(ARM)
return reinterpret_cast<void*>(regs.__sp);
+#elif CPU(SW_64)
+ return reinterpret_cast<void*>(regs.__sp);
#else
#error Unknown Architecture
#endif
diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h b/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h
index 108adfc..5679ee4 100644
--- a/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h
+++ b/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h
@@ -263,6 +263,11 @@
#define WTF_CPU_AIX64 1
#endif
+/* CPU(sw_64) - sw_64 */
+#if defined(__sw_64__)
+#define WTF_CPU_SW_64 1
+#endif
+
/* CPU(AARCH64) - AArch64 */
#if defined(__aarch64__) || defined(_M_ARM64)
#define WTF_CPU_AARCH64 1
@@ -970,7 +975,7 @@
#endif
#if !defined(WTF_USE_JSVALUE64) && !defined(WTF_USE_JSVALUE32) && !defined(WTF_USE_JSVALUE32_64)
-#if (CPU(X86_64) && !CPU(X32) && (OS(UNIX) || OS(WINDOWS) || OS(SOLARIS) || OS(HPUX))) || (CPU(IA64) && !CPU(IA64_32)) || CPU(ALPHA) || CPU(AIX64) || CPU(SPARC64) || CPU(MIPS64) || CPU(AARCH64) || CPU(RISCV64)
+#if (CPU(X86_64) && !CPU(X32) && (OS(UNIX) || OS(WINDOWS) || OS(SOLARIS) || OS(HPUX))) || (CPU(IA64) && !CPU(IA64_32)) || CPU(ALPHA) || CPU(AIX64) || CPU(SPARC64) || CPU(MIPS64) || CPU(AARCH64) || CPU(RISCV64) || CPU(SW_64)
#define WTF_USE_JSVALUE64 1
#elif CPU(ARM) || CPU(PPC64) || CPU(RISCV32) || CPU(S390X)
#define WTF_USE_JSVALUE32 1
diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/yarr/RegexJIT.cpp b/src/3rdparty/javascriptcore/JavaScriptCore/yarr/RegexJIT.cpp
index 1015923..031460d 100644
--- a/src/3rdparty/javascriptcore/JavaScriptCore/yarr/RegexJIT.cpp
+++ b/src/3rdparty/javascriptcore/JavaScriptCore/yarr/RegexJIT.cpp
@@ -44,7 +44,7 @@ namespace JSC { namespace Yarr {
class RegexGenerator : private MacroAssembler {
friend void jitCompileRegex(JSGlobalData* globalData, RegexCodeBlock& jitObject, const UString& pattern, unsigned& numSubpatterns, const char*& error, bool ignoreCase, bool multiline);
-#if CPU(ARM)
+#if CPU(ARM) || CPU(SW_64)
static const RegisterID input = ARMRegisters::r0;
static const RegisterID index = ARMRegisters::r1;
static const RegisterID length = ARMRegisters::r2;
@@ -1308,7 +1308,7 @@ class RegexGenerator : private MacroAssembler {
#else
loadPtr(Address(X86Registers::ebp, 2 * sizeof(void*)), output);
#endif
-#elif CPU(ARM)
+#elif CPU(ARM) || CPU(SW_64)
push(ARMRegisters::r4);
push(ARMRegisters::r5);
push(ARMRegisters::r6);
@@ -1329,7 +1329,7 @@ class RegexGenerator : private MacroAssembler {
pop(X86Registers::edi);
pop(X86Registers::ebx);
pop(X86Registers::ebp);
-#elif CPU(ARM)
+#elif CPU(ARM) || CPU(SW_64)
#if CPU(ARM_TRADITIONAL)
pop(ARMRegisters::r8); // scratch register
#endif
--
2.33.0

12
qt5-qtscript.spec
View File

@ -4,11 +4,14 @@
%endif
%endif
%ifarch loongarch64
%define debug_package %{nil}
%endif
%global qt_module qtscript
Name: qt5-%{qt_module}
Version: 5.15.2
Release: 1
Release: 2
Summary: QtScript component for qt5
License: LGPLv2 with exceptions or GPLv3 with exceptions
Url: http://www.qt.io
@ -17,6 +20,7 @@ Url: http://www.qt.io
Source0: https://download.qt.io/official_releases/qt/%{major_minor}/%{version}/submodules/%{qt_module}-everywhere-src-%{version}.tar.xz
Patch0: qtscript-everywhere-src-5.12.1-s390.patch
Patch3001: 3001-add-sw_64-support.patch
BuildRequires: make
BuildRequires: gcc-c++
@ -57,6 +61,9 @@ Examples files for %{name}
%build
%ifarch loongarch64
export CXXFLAGS="${CXXFLAGS} -fpermissive"
%endif
%qmake_qt5
%make_build
@ -110,6 +117,9 @@ fi
%changelog
* Sat Aug 12 2023 panchenbo <panchenbo@kylinsec.com.cn> - 5.15.2-2
- add loongarch64 and sw_64 support
* Wed Oct 13 2021 peijiankang <peijiankang@kylinos.cn> - 5.15.2-1
- update to upstream version 5.15.2