These patches are mainly related to IO operations. Signed-off-by: zhengfeng luo <luozhengfeng@h-partners.com> Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
70 lines
2.8 KiB
Diff
70 lines
2.8 KiB
Diff
From 46548879b84e8c502198a549d82ec079ebc8b9a0 Mon Sep 17 00:00:00 2001
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From: Lang Cheng <chenglang@huawei.com>
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Date: Thu, 2 Dec 2021 21:44:26 +0800
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Subject: libhns: Forcibly rewrite the inline flag of WQE
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When a non-inline WR reuses a WQE that was used for inline the last time,
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the remaining inline flag should be cleared.
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Fixes: cbdf5e32a855 ("libhns: Reimplement verbs of post_send and post_recv for hip08 RoCE")
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Fixes: 82fc508a6625 ("libhns: Add support for UD inline")
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Signed-off-by: Lang Cheng <chenglang@huawei.com>
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Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
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---
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providers/hns/hns_roce_u_hw_v2.c | 16 +++++++---------
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1 file changed, 7 insertions(+), 9 deletions(-)
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diff --git a/providers/hns/hns_roce_u_hw_v2.c b/providers/hns/hns_roce_u_hw_v2.c
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index 18399e9..4eaa929 100644
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--- a/providers/hns/hns_roce_u_hw_v2.c
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+++ b/providers/hns/hns_roce_u_hw_v2.c
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@@ -876,8 +876,6 @@ static int set_ud_inl(struct hns_roce_qp *qp, const struct ibv_send_wr *wr,
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if (!check_inl_data_len(qp, sge_info->total_len))
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return -EINVAL;
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- roce_set_bit(ud_sq_wqe->rsv_opcode, UD_SQ_WQE_BYTE_4_INL_S, 1);
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-
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if (sge_info->total_len <= HNS_ROCE_MAX_UD_INL_INN_SZ) {
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roce_set_bit(ud_sq_wqe->rsv_msg_start_sge_idx,
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UD_SQ_WQE_BYTE_20_INL_TYPE_S, 0);
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@@ -993,6 +991,8 @@ static int set_ud_wqe(void *wqe, struct hns_roce_qp *qp, struct ibv_send_wr *wr,
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!!(wr->send_flags & IBV_SEND_SIGNALED));
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roce_set_bit(ud_sq_wqe->rsv_opcode, UD_SQ_WQE_SE_S,
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!!(wr->send_flags & IBV_SEND_SOLICITED));
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+ roce_set_bit(ud_sq_wqe->rsv_opcode, UD_SQ_WQE_BYTE_4_INL_S,
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+ !!(wr->send_flags & IBV_SEND_INLINE));
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ret = check_ud_opcode(ud_sq_wqe, wr);
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if (ret)
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@@ -1044,8 +1044,6 @@ static int set_rc_inl(struct hns_roce_qp *qp, const struct ibv_send_wr *wr,
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dseg += sizeof(struct hns_roce_rc_sq_wqe);
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- roce_set_bit(rc_sq_wqe->byte_4, RC_SQ_WQE_BYTE_4_INLINE_S, 1);
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-
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if (sge_info->total_len <= HNS_ROCE_MAX_RC_INL_INN_SZ) {
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roce_set_bit(rc_sq_wqe->byte_20, RC_SQ_WQE_BYTE_20_INL_TYPE_S,
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0);
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@@ -1150,13 +1148,13 @@ static int set_rc_wqe(void *wqe, struct hns_roce_qp *qp, struct ibv_send_wr *wr,
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return ret;
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roce_set_bit(rc_sq_wqe->byte_4, RC_SQ_WQE_BYTE_4_CQE_S,
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- (wr->send_flags & IBV_SEND_SIGNALED) ? 1 : 0);
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-
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+ !!(wr->send_flags & IBV_SEND_SIGNALED));
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roce_set_bit(rc_sq_wqe->byte_4, RC_SQ_WQE_BYTE_4_FENCE_S,
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- (wr->send_flags & IBV_SEND_FENCE) ? 1 : 0);
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-
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+ !!(wr->send_flags & IBV_SEND_FENCE));
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roce_set_bit(rc_sq_wqe->byte_4, RC_SQ_WQE_BYTE_4_SE_S,
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- (wr->send_flags & IBV_SEND_SOLICITED) ? 1 : 0);
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+ !!(wr->send_flags & IBV_SEND_SOLICITED));
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+ roce_set_bit(rc_sq_wqe->byte_4, RC_SQ_WQE_BYTE_4_INLINE_S,
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+ !!(wr->send_flags & IBV_SEND_INLINE));
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roce_set_field(rc_sq_wqe->byte_20,
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RC_SQ_WQE_BYTE_20_MSG_START_SGE_IDX_M,
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--
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2.27.0
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