HIP06 is no longer supported. So, backport these patches from rdma-core v41 to remove support for HIP06. Signed-off-by: zhengfeng luo <luozhengfeng@h-partners.com> Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
1420 lines
41 KiB
Diff
1420 lines
41 KiB
Diff
From 938dfc5422285ed48a8acd5ce588bbeffa17f409 Mon Sep 17 00:00:00 2001
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From: Chengchang Tang <tangchengchang@huawei.com>
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Date: Fri, 8 Apr 2022 11:31:08 +0800
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Subject: [PATCH 47/47] libhns: Remove support for HIP06
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HIP06 is no longer supported. In order to reduce unnecessary maintenance,
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the code of HIP06 is removed.
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Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
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Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
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---
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providers/hns/CMakeLists.txt | 1 -
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providers/hns/hns_roce_u.c | 27 +-
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providers/hns/hns_roce_u.h | 16 -
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providers/hns/hns_roce_u_hw_v1.c | 836 -------------------------------
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providers/hns/hns_roce_u_hw_v1.h | 244 ---------
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providers/hns/hns_roce_u_verbs.c | 59 +--
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6 files changed, 11 insertions(+), 1172 deletions(-)
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delete mode 100644 providers/hns/hns_roce_u_hw_v1.c
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delete mode 100644 providers/hns/hns_roce_u_hw_v1.h
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diff --git a/providers/hns/CMakeLists.txt b/providers/hns/CMakeLists.txt
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index 697dbd7e..7aaca757 100644
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--- a/providers/hns/CMakeLists.txt
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+++ b/providers/hns/CMakeLists.txt
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@@ -2,7 +2,6 @@ rdma_provider(hns
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hns_roce_u.c
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hns_roce_u_buf.c
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hns_roce_u_db.c
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- hns_roce_u_hw_v1.c
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hns_roce_u_hw_v2.c
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hns_roce_u_verbs.c
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)
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diff --git a/providers/hns/hns_roce_u.c b/providers/hns/hns_roce_u.c
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index f8a647b8..a46ceb9d 100644
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--- a/providers/hns/hns_roce_u.c
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+++ b/providers/hns/hns_roce_u.c
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@@ -46,9 +46,6 @@ static void hns_roce_free_context(struct ibv_context *ibctx);
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#endif
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static const struct verbs_match_ent hca_table[] = {
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- VERBS_MODALIAS_MATCH("acpi*:HISI00D1:*", &hns_roce_u_hw_v1),
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- VERBS_MODALIAS_MATCH("of:N*T*Chisilicon,hns-roce-v1C*", &hns_roce_u_hw_v1),
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- VERBS_MODALIAS_MATCH("of:N*T*Chisilicon,hns-roce-v1", &hns_roce_u_hw_v1),
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VERBS_PCI_MATCH(PCI_VENDOR_ID_HUAWEI, 0xA222, &hns_roce_u_hw_v2),
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VERBS_PCI_MATCH(PCI_VENDOR_ID_HUAWEI, 0xA223, &hns_roce_u_hw_v2),
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VERBS_PCI_MATCH(PCI_VENDOR_ID_HUAWEI, 0xA224, &hns_roce_u_hw_v2),
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@@ -109,7 +106,6 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev,
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struct ibv_device_attr dev_attrs;
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struct hns_roce_context *context;
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struct ibv_get_context cmd;
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- int offset = 0;
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int i;
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context = verbs_init_and_alloc_context(ibdev, cmd_fd, context, ibv_ctx,
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@@ -157,24 +153,10 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev,
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context->max_srq_sge = dev_attrs.max_srq_sge;
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context->uar = mmap(NULL, hr_dev->page_size, PROT_READ | PROT_WRITE,
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- MAP_SHARED, cmd_fd, offset);
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+ MAP_SHARED, cmd_fd, 0);
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if (context->uar == MAP_FAILED)
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goto err_free;
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|
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- offset += hr_dev->page_size;
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-
|
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- if (hr_dev->hw_version == HNS_ROCE_HW_VER1) {
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- /*
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- * when vma->vm_pgoff is 1, the cq_tptr_base includes 64K CQ,
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- * a pointer of CQ need 2B size
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- */
|
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- context->cq_tptr_base = mmap(NULL, HNS_ROCE_CQ_DB_BUF_SIZE,
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- PROT_READ | PROT_WRITE, MAP_SHARED,
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- cmd_fd, offset);
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- if (context->cq_tptr_base == MAP_FAILED)
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- goto db_free;
|
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- }
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-
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pthread_spin_init(&context->uar_lock, PTHREAD_PROCESS_PRIVATE);
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verbs_set_ops(&context->ibv_ctx, &hns_common_ops);
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@@ -182,10 +164,6 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev,
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return &context->ibv_ctx;
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-db_free:
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- munmap(context->uar, hr_dev->page_size);
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- context->uar = NULL;
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-
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err_free:
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verbs_uninit_context(&context->ibv_ctx);
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free(context);
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@@ -198,9 +176,6 @@ static void hns_roce_free_context(struct ibv_context *ibctx)
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struct hns_roce_context *context = to_hr_ctx(ibctx);
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munmap(context->uar, hr_dev->page_size);
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- if (hr_dev->hw_version == HNS_ROCE_HW_VER1)
|
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- munmap(context->cq_tptr_base, HNS_ROCE_CQ_DB_BUF_SIZE);
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-
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verbs_uninit_context(&context->ibv_ctx);
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free(context);
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}
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diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h
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index 96059172..5d90634a 100644
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--- a/providers/hns/hns_roce_u.h
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+++ b/providers/hns/hns_roce_u.h
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@@ -47,7 +47,6 @@
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#include <linux/if_ether.h>
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#include "hns_roce_u_abi.h"
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-#define HNS_ROCE_HW_VER1 ('h' << 24 | 'i' << 16 | '0' << 8 | '6')
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#define HNS_ROCE_HW_VER2 0x100
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#define HNS_ROCE_HW_VER3 0x130
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@@ -59,9 +58,7 @@
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#define HNS_ROCE_MAX_RC_INL_INN_SZ 32
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#define HNS_ROCE_MAX_UD_INL_INN_SZ 8
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-#define HNS_ROCE_MAX_CQ_NUM 0x10000
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#define HNS_ROCE_MIN_CQE_NUM 0x40
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-#define HNS_ROCE_V1_MIN_WQE_NUM 0x20
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#define HNS_ROCE_V2_MIN_WQE_NUM 0x40
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#define HNS_ROCE_MIN_SRQ_WQE_NUM 1
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@@ -75,9 +72,6 @@
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#define HNS_ROCE_GID_SIZE 16
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-#define HNS_ROCE_CQ_DB_BUF_SIZE ((HNS_ROCE_MAX_CQ_NUM >> 11) << 12)
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-#define HNS_ROCE_STATIC_RATE 3 /* Gbps */
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-
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#define INVALID_SGE_LENGTH 0x80000000
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#define HNS_ROCE_DWQE_PAGE_SIZE 65536
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@@ -159,13 +153,6 @@
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#define HNS_ROCE_SRQ_TABLE_BITS 8
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#define HNS_ROCE_SRQ_TABLE_SIZE BIT(HNS_ROCE_SRQ_TABLE_BITS)
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-/* operation type list */
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-enum {
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- /* rq&srq operation */
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- HNS_ROCE_OPCODE_SEND_DATA_RECEIVE = 0x06,
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- HNS_ROCE_OPCODE_RDMA_WITH_IMM_RECEIVE = 0x07,
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-};
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-
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struct hns_roce_device {
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struct verbs_device ibv_dev;
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int page_size;
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@@ -201,8 +188,6 @@ struct hns_roce_context {
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void *uar;
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pthread_spinlock_t uar_lock;
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- void *cq_tptr_base;
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-
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struct {
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struct hns_roce_qp **table;
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int refcnt;
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@@ -502,7 +487,6 @@ void hns_roce_free_qp_buf(struct hns_roce_qp *qp, struct hns_roce_context *ctx);
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void hns_roce_init_qp_indices(struct hns_roce_qp *qp);
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-extern const struct hns_roce_u_hw hns_roce_u_hw_v1;
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extern const struct hns_roce_u_hw hns_roce_u_hw_v2;
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#endif /* _HNS_ROCE_U_H */
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diff --git a/providers/hns/hns_roce_u_hw_v1.c b/providers/hns/hns_roce_u_hw_v1.c
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deleted file mode 100644
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index d47cba0c..00000000
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--- a/providers/hns/hns_roce_u_hw_v1.c
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+++ /dev/null
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@@ -1,836 +0,0 @@
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-/*
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- * Copyright (c) 2016 Hisilicon Limited.
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- *
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- * This software is available to you under a choice of one of two
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- * licenses. You may choose to be licensed under the terms of the GNU
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- * General Public License (GPL) Version 2, available from the file
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- * COPYING in the main directory of this source tree, or the
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- * OpenIB.org BSD license below:
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- *
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- * Redistribution and use in source and binary forms, with or
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- * without modification, are permitted provided that the following
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- * conditions are met:
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- *
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- * - Redistributions of source code must retain the above
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- * copyright notice, this list of conditions and the following
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- * disclaimer.
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- *
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- * - Redistributions in binary form must reproduce the above
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- * copyright notice, this list of conditions and the following
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- * disclaimer in the documentation and/or other materials
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- * provided with the distribution.
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- *
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- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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- * SOFTWARE.
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- */
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-
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-#include <stdio.h>
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-#include <string.h>
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-#include "hns_roce_u_db.h"
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-#include "hns_roce_u_hw_v1.h"
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-#include "hns_roce_u.h"
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-
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-static inline void set_raddr_seg(struct hns_roce_wqe_raddr_seg *rseg,
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- uint64_t remote_addr, uint32_t rkey)
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-{
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- rseg->raddr = htole64(remote_addr);
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- rseg->rkey = htole32(rkey);
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- rseg->len = 0;
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-}
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-
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-static void set_data_seg(struct hns_roce_wqe_data_seg *dseg, struct ibv_sge *sg)
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-{
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-
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- dseg->lkey = htole32(sg->lkey);
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- dseg->addr = htole64(sg->addr);
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- dseg->len = htole32(sg->length);
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-}
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-
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-static void hns_roce_update_rq_head(struct hns_roce_context *ctx,
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- unsigned int qpn, unsigned int rq_head)
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-{
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- struct hns_roce_rq_db rq_db = {};
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-
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- roce_set_field(rq_db.u32_4, RQ_DB_U32_4_RQ_HEAD_M,
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- RQ_DB_U32_4_RQ_HEAD_S, rq_head);
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- roce_set_field(rq_db.u32_8, RQ_DB_U32_8_QPN_M, RQ_DB_U32_8_QPN_S, qpn);
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- roce_set_field(rq_db.u32_8, RQ_DB_U32_8_CMD_M, RQ_DB_U32_8_CMD_S, 1);
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- roce_set_bit(rq_db.u32_8, RQ_DB_U32_8_HW_SYNC_S, 1);
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-
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- udma_to_device_barrier();
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-
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- hns_roce_write64(ctx->uar + ROCEE_DB_OTHERS_L_0_REG, (__le32 *)&rq_db);
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-}
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-
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-static void hns_roce_update_sq_head(struct hns_roce_context *ctx,
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- unsigned int qpn, unsigned int port,
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- unsigned int sl, unsigned int sq_head)
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-{
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- struct hns_roce_sq_db sq_db = {};
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-
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- roce_set_field(sq_db.u32_4, SQ_DB_U32_4_SQ_HEAD_M,
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- SQ_DB_U32_4_SQ_HEAD_S, sq_head);
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- roce_set_field(sq_db.u32_4, SQ_DB_U32_4_PORT_M, SQ_DB_U32_4_PORT_S,
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- port);
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- roce_set_field(sq_db.u32_4, SQ_DB_U32_4_SL_M, SQ_DB_U32_4_SL_S, sl);
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- roce_set_field(sq_db.u32_8, SQ_DB_U32_8_QPN_M, SQ_DB_U32_8_QPN_S, qpn);
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- roce_set_bit(sq_db.u32_8, SQ_DB_U32_8_HW_SYNC, 1);
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-
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- udma_to_device_barrier();
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-
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- hns_roce_write64(ctx->uar + ROCEE_DB_SQ_L_0_REG, (__le32 *)&sq_db);
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-}
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-
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-static void hns_roce_update_cq_cons_index(struct hns_roce_context *ctx,
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- struct hns_roce_cq *cq)
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-{
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- struct hns_roce_cq_db cq_db = {};
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-
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- roce_set_bit(cq_db.u32_8, CQ_DB_U32_8_HW_SYNC_S, 1);
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- roce_set_field(cq_db.u32_8, CQ_DB_U32_8_CMD_M, CQ_DB_U32_8_CMD_S, 3);
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- roce_set_field(cq_db.u32_8, CQ_DB_U32_8_CMD_MDF_M,
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- CQ_DB_U32_8_CMD_MDF_S, 0);
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- roce_set_field(cq_db.u32_8, CQ_DB_U32_8_CQN_M, CQ_DB_U32_8_CQN_S,
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- cq->cqn);
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- roce_set_field(cq_db.u32_4, CQ_DB_U32_4_CONS_IDX_M,
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- CQ_DB_U32_4_CONS_IDX_S,
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- cq->cons_index & ((cq->cq_depth << 1) - 1));
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-
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- hns_roce_write64(ctx->uar + ROCEE_DB_OTHERS_L_0_REG, (__le32 *)&cq_db);
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-}
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-
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-static void hns_roce_handle_error_cqe(struct hns_roce_cqe *cqe,
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- struct ibv_wc *wc)
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-{
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- switch (roce_get_field(cqe->cqe_byte_4,
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- CQE_BYTE_4_STATUS_OF_THE_OPERATION_M,
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- CQE_BYTE_4_STATUS_OF_THE_OPERATION_S) &
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- HNS_ROCE_CQE_STATUS_MASK) {
|
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- case HNS_ROCE_CQE_SYNDROME_LOCAL_LENGTH_ERR:
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- wc->status = IBV_WC_LOC_LEN_ERR;
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- break;
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- case HNS_ROCE_CQE_SYNDROME_LOCAL_QP_OP_ERR:
|
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- wc->status = IBV_WC_LOC_QP_OP_ERR;
|
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- break;
|
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- case HNS_ROCE_CQE_SYNDROME_LOCAL_PROT_ERR:
|
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- wc->status = IBV_WC_LOC_PROT_ERR;
|
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- break;
|
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- case HNS_ROCE_CQE_SYNDROME_WR_FLUSH_ERR:
|
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- wc->status = IBV_WC_WR_FLUSH_ERR;
|
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- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_MEM_MANAGE_OPERATE_ERR:
|
|
- wc->status = IBV_WC_MW_BIND_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_BAD_RESP_ERR:
|
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- wc->status = IBV_WC_BAD_RESP_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_LOCAL_ACCESS_ERR:
|
|
- wc->status = IBV_WC_LOC_ACCESS_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR:
|
|
- wc->status = IBV_WC_REM_INV_REQ_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_REMOTE_ACCESS_ERR:
|
|
- wc->status = IBV_WC_REM_ACCESS_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_REMOTE_OP_ERR:
|
|
- wc->status = IBV_WC_REM_OP_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR:
|
|
- wc->status = IBV_WC_RETRY_EXC_ERR;
|
|
- break;
|
|
- case HNS_ROCE_CQE_SYNDROME_RNR_RETRY_EXC_ERR:
|
|
- wc->status = IBV_WC_RNR_RETRY_EXC_ERR;
|
|
- break;
|
|
- default:
|
|
- wc->status = IBV_WC_GENERAL_ERR;
|
|
- break;
|
|
- }
|
|
-}
|
|
-
|
|
-static struct hns_roce_cqe *get_cqe(struct hns_roce_cq *cq, int entry)
|
|
-{
|
|
- return cq->buf.buf + entry * HNS_ROCE_CQE_SIZE;
|
|
-}
|
|
-
|
|
-static void *get_sw_cqe(struct hns_roce_cq *cq, int n)
|
|
-{
|
|
- struct hns_roce_cqe *cqe = get_cqe(cq, n & cq->verbs_cq.cq.cqe);
|
|
-
|
|
- return (!!(roce_get_bit(cqe->cqe_byte_4, CQE_BYTE_4_OWNER_S)) ^
|
|
- !!(n & (cq->verbs_cq.cq.cqe + 1))) ? cqe : NULL;
|
|
-}
|
|
-
|
|
-static struct hns_roce_cqe *next_cqe_sw(struct hns_roce_cq *cq)
|
|
-{
|
|
- return get_sw_cqe(cq, cq->cons_index);
|
|
-}
|
|
-
|
|
-static void *get_recv_wqe(struct hns_roce_qp *qp, int n)
|
|
-{
|
|
- if ((n < 0) || (n > qp->rq.wqe_cnt)) {
|
|
- verbs_err(verbs_get_ctx(qp->verbs_qp.qp.context),
|
|
- "rq wqe index:%d,rq wqe cnt:%d\r\n", n,
|
|
- qp->rq.wqe_cnt);
|
|
- return NULL;
|
|
- }
|
|
-
|
|
- return qp->buf.buf + qp->rq.offset + (n << qp->rq.wqe_shift);
|
|
-}
|
|
-
|
|
-static void *get_send_wqe(struct hns_roce_qp *qp, int n)
|
|
-{
|
|
- if ((n < 0) || (n > qp->sq.wqe_cnt)) {
|
|
- verbs_err(verbs_get_ctx(qp->verbs_qp.qp.context),
|
|
- "sq wqe index:%d,sq wqe cnt:%d\r\n", n,
|
|
- qp->sq.wqe_cnt);
|
|
- return NULL;
|
|
- }
|
|
-
|
|
- return (void *)(qp->buf.buf + qp->sq.offset + (n << qp->sq.wqe_shift));
|
|
-}
|
|
-
|
|
-static int hns_roce_wq_overflow(struct hns_roce_wq *wq, int nreq,
|
|
- struct hns_roce_cq *cq)
|
|
-{
|
|
- unsigned int cur;
|
|
-
|
|
- cur = wq->head - wq->tail;
|
|
- if (cur + nreq < wq->max_post)
|
|
- return 0;
|
|
-
|
|
- /* While the num of wqe exceeds cap of the device, cq will be locked */
|
|
- pthread_spin_lock(&cq->lock);
|
|
- cur = wq->head - wq->tail;
|
|
- pthread_spin_unlock(&cq->lock);
|
|
-
|
|
- verbs_err(verbs_get_ctx(cq->verbs_cq.cq.context),
|
|
- "wq:(head = %d, tail = %d, max_post = %d), nreq = 0x%x\n",
|
|
- wq->head, wq->tail, wq->max_post, nreq);
|
|
-
|
|
- return cur + nreq >= wq->max_post;
|
|
-}
|
|
-
|
|
-static struct hns_roce_qp *hns_roce_find_qp(struct hns_roce_context *ctx,
|
|
- uint32_t qpn)
|
|
-{
|
|
- uint32_t tind = to_hr_qp_table_index(qpn, ctx);
|
|
-
|
|
- if (ctx->qp_table[tind].refcnt) {
|
|
- return ctx->qp_table[tind].table[qpn & ctx->qp_table_mask];
|
|
- } else {
|
|
- verbs_err(&ctx->ibv_ctx, "hns_roce_find_qp fail!\n");
|
|
- return NULL;
|
|
- }
|
|
-}
|
|
-
|
|
-static void hns_roce_clear_qp(struct hns_roce_context *ctx, uint32_t qpn)
|
|
-{
|
|
- uint32_t tind = to_hr_qp_table_index(qpn, ctx);
|
|
-
|
|
- if (!--ctx->qp_table[tind].refcnt)
|
|
- free(ctx->qp_table[tind].table);
|
|
- else
|
|
- ctx->qp_table[tind].table[qpn & ctx->qp_table_mask] = NULL;
|
|
-}
|
|
-
|
|
-static int hns_roce_v1_poll_one(struct hns_roce_cq *cq,
|
|
- struct hns_roce_qp **cur_qp, struct ibv_wc *wc)
|
|
-{
|
|
- uint32_t qpn;
|
|
- int is_send;
|
|
- uint16_t wqe_ctr;
|
|
- uint32_t local_qpn;
|
|
- struct hns_roce_wq *wq = NULL;
|
|
- struct hns_roce_cqe *cqe = NULL;
|
|
- struct hns_roce_wqe_ctrl_seg *sq_wqe = NULL;
|
|
-
|
|
- /* According to CI, find the relative cqe */
|
|
- cqe = next_cqe_sw(cq);
|
|
- if (!cqe)
|
|
- return CQ_EMPTY;
|
|
-
|
|
- /* Get the next cqe, CI will be added gradually */
|
|
- ++cq->cons_index;
|
|
-
|
|
- udma_from_device_barrier();
|
|
-
|
|
- qpn = roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M,
|
|
- CQE_BYTE_16_LOCAL_QPN_S);
|
|
-
|
|
- is_send = (roce_get_bit(cqe->cqe_byte_4, CQE_BYTE_4_SQ_RQ_FLAG_S) ==
|
|
- HNS_ROCE_CQE_IS_SQ);
|
|
-
|
|
- local_qpn = roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M,
|
|
- CQE_BYTE_16_LOCAL_QPN_S);
|
|
-
|
|
- /* if qp is zero, it will not get the correct qpn */
|
|
- if (!*cur_qp ||
|
|
- (local_qpn & HNS_ROCE_CQE_QPN_MASK) != (*cur_qp)->verbs_qp.qp.qp_num) {
|
|
-
|
|
- *cur_qp = hns_roce_find_qp(to_hr_ctx(cq->verbs_cq.cq.context),
|
|
- qpn & 0xffffff);
|
|
- if (!*cur_qp) {
|
|
- verbs_err(verbs_get_ctx(cq->verbs_cq.cq.context),
|
|
- PFX "can't find qp!\n");
|
|
- return CQ_POLL_ERR;
|
|
- }
|
|
- }
|
|
- wc->qp_num = qpn & 0xffffff;
|
|
-
|
|
- if (is_send) {
|
|
- wq = &(*cur_qp)->sq;
|
|
- /*
|
|
- * if sq_signal_bits is 1, the tail pointer first update to
|
|
- * the wqe corresponding the current cqe
|
|
- */
|
|
- if ((*cur_qp)->sq_signal_bits) {
|
|
- wqe_ctr = (uint16_t)(roce_get_field(cqe->cqe_byte_4,
|
|
- CQE_BYTE_4_WQE_INDEX_M,
|
|
- CQE_BYTE_4_WQE_INDEX_S));
|
|
- /*
|
|
- * wq->tail will plus a positive number every time,
|
|
- * when wq->tail exceeds 32b, it is 0 and acc
|
|
- */
|
|
- wq->tail += (wqe_ctr - (uint16_t) wq->tail) &
|
|
- (wq->wqe_cnt - 1);
|
|
- }
|
|
- /* write the wr_id of wq into the wc */
|
|
- wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)];
|
|
- ++wq->tail;
|
|
- } else {
|
|
- wq = &(*cur_qp)->rq;
|
|
- wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)];
|
|
- ++wq->tail;
|
|
- }
|
|
-
|
|
- /*
|
|
- * HW maintains wc status, set the err type and directly return, after
|
|
- * generated the incorrect CQE
|
|
- */
|
|
- if (roce_get_field(cqe->cqe_byte_4,
|
|
- CQE_BYTE_4_STATUS_OF_THE_OPERATION_M,
|
|
- CQE_BYTE_4_STATUS_OF_THE_OPERATION_S) != HNS_ROCE_CQE_SUCCESS) {
|
|
- verbs_err(verbs_get_ctx(cq->verbs_cq.cq.context),
|
|
- PFX "error cqe!\n");
|
|
- hns_roce_handle_error_cqe(cqe, wc);
|
|
- return CQ_OK;
|
|
- }
|
|
- wc->status = IBV_WC_SUCCESS;
|
|
-
|
|
- /*
|
|
- * According to the opcode type of cqe, mark the opcode and other
|
|
- * information of wc
|
|
- */
|
|
- if (is_send) {
|
|
- /* Get opcode and flag before update the tail point for send */
|
|
- sq_wqe = (struct hns_roce_wqe_ctrl_seg *)
|
|
- get_send_wqe(*cur_qp, roce_get_field(cqe->cqe_byte_4,
|
|
- CQE_BYTE_4_WQE_INDEX_M,
|
|
- CQE_BYTE_4_WQE_INDEX_S));
|
|
- switch (le32toh(sq_wqe->flag) & HNS_ROCE_WQE_OPCODE_MASK) {
|
|
- case HNS_ROCE_WQE_OPCODE_SEND:
|
|
- wc->opcode = IBV_WC_SEND;
|
|
- break;
|
|
- case HNS_ROCE_WQE_OPCODE_RDMA_READ:
|
|
- wc->opcode = IBV_WC_RDMA_READ;
|
|
- wc->byte_len = le32toh(cqe->byte_cnt);
|
|
- break;
|
|
- case HNS_ROCE_WQE_OPCODE_RDMA_WRITE:
|
|
- wc->opcode = IBV_WC_RDMA_WRITE;
|
|
- break;
|
|
- case HNS_ROCE_WQE_OPCODE_BIND_MW2:
|
|
- wc->opcode = IBV_WC_BIND_MW;
|
|
- break;
|
|
- default:
|
|
- wc->status = IBV_WC_GENERAL_ERR;
|
|
- break;
|
|
- }
|
|
- wc->wc_flags = (le32toh(sq_wqe->flag) & HNS_ROCE_WQE_IMM ?
|
|
- IBV_WC_WITH_IMM : 0);
|
|
- } else {
|
|
- /* Get opcode and flag in rq&srq */
|
|
- wc->byte_len = le32toh(cqe->byte_cnt);
|
|
-
|
|
- switch (roce_get_field(cqe->cqe_byte_4,
|
|
- CQE_BYTE_4_OPERATION_TYPE_M,
|
|
- CQE_BYTE_4_OPERATION_TYPE_S) &
|
|
- HNS_ROCE_CQE_OPCODE_MASK) {
|
|
- case HNS_ROCE_OPCODE_RDMA_WITH_IMM_RECEIVE:
|
|
- wc->opcode = IBV_WC_RECV_RDMA_WITH_IMM;
|
|
- wc->wc_flags = IBV_WC_WITH_IMM;
|
|
- wc->imm_data = htobe32(le32toh(cqe->immediate_data));
|
|
- break;
|
|
- case HNS_ROCE_OPCODE_SEND_DATA_RECEIVE:
|
|
- if (roce_get_bit(cqe->cqe_byte_4,
|
|
- CQE_BYTE_4_IMMEDIATE_DATA_FLAG_S)) {
|
|
- wc->opcode = IBV_WC_RECV;
|
|
- wc->wc_flags = IBV_WC_WITH_IMM;
|
|
- wc->imm_data =
|
|
- htobe32(le32toh(cqe->immediate_data));
|
|
- } else {
|
|
- wc->opcode = IBV_WC_RECV;
|
|
- wc->wc_flags = 0;
|
|
- }
|
|
- break;
|
|
- default:
|
|
- wc->status = IBV_WC_GENERAL_ERR;
|
|
- break;
|
|
- }
|
|
- }
|
|
-
|
|
- return CQ_OK;
|
|
-}
|
|
-
|
|
-static int hns_roce_u_v1_poll_cq(struct ibv_cq *ibvcq, int ne,
|
|
- struct ibv_wc *wc)
|
|
-{
|
|
- int npolled;
|
|
- int err = CQ_OK;
|
|
- struct hns_roce_qp *qp = NULL;
|
|
- struct hns_roce_cq *cq = to_hr_cq(ibvcq);
|
|
- struct hns_roce_context *ctx = to_hr_ctx(ibvcq->context);
|
|
- struct hns_roce_device *dev = to_hr_dev(ibvcq->context->device);
|
|
-
|
|
- pthread_spin_lock(&cq->lock);
|
|
-
|
|
- for (npolled = 0; npolled < ne; ++npolled) {
|
|
- err = hns_roce_v1_poll_one(cq, &qp, wc + npolled);
|
|
- if (err != CQ_OK)
|
|
- break;
|
|
- }
|
|
-
|
|
- if (npolled) {
|
|
- if (dev->hw_version == HNS_ROCE_HW_VER1) {
|
|
- *cq->db = (cq->cons_index & ((cq->cq_depth << 1) - 1));
|
|
- mmio_ordered_writes_hack();
|
|
- }
|
|
-
|
|
- hns_roce_update_cq_cons_index(ctx, cq);
|
|
- }
|
|
-
|
|
- pthread_spin_unlock(&cq->lock);
|
|
-
|
|
- return err == CQ_POLL_ERR ? err : npolled;
|
|
-}
|
|
-
|
|
-/**
|
|
- * hns_roce_u_v1_arm_cq - request completion notification on a CQ
|
|
- * @ibvcq: The completion queue to request notification for.
|
|
- * @solicited: If non-zero, a event will be generated only for
|
|
- * the next solicited CQ entry. If zero, any CQ entry,
|
|
- * solicited or not, will generate an event
|
|
- */
|
|
-static int hns_roce_u_v1_arm_cq(struct ibv_cq *ibvcq, int solicited)
|
|
-{
|
|
- struct hns_roce_context *ctx = to_hr_ctx(ibvcq->context);
|
|
- struct hns_roce_cq *cq = to_hr_cq(ibvcq);
|
|
- struct hns_roce_cq_db cq_db = {};
|
|
- uint32_t solicited_flag;
|
|
- uint32_t ci;
|
|
-
|
|
- ci = cq->cons_index & ((cq->cq_depth << 1) - 1);
|
|
- solicited_flag = solicited ? HNS_ROCE_CQ_DB_REQ_SOL :
|
|
- HNS_ROCE_CQ_DB_REQ_NEXT;
|
|
-
|
|
- roce_set_bit(cq_db.u32_8, CQ_DB_U32_8_HW_SYNC_S, 1);
|
|
- roce_set_field(cq_db.u32_8, CQ_DB_U32_8_CMD_M, CQ_DB_U32_8_CMD_S, 3);
|
|
- roce_set_field(cq_db.u32_8, CQ_DB_U32_8_CMD_MDF_M,
|
|
- CQ_DB_U32_8_CMD_MDF_S, 1);
|
|
- roce_set_bit(cq_db.u32_8, CQ_DB_U32_8_NOTIFY_TYPE_S, solicited_flag);
|
|
- roce_set_field(cq_db.u32_8, CQ_DB_U32_8_CQN_M, CQ_DB_U32_8_CQN_S,
|
|
- cq->cqn);
|
|
- roce_set_field(cq_db.u32_4, CQ_DB_U32_4_CONS_IDX_M,
|
|
- CQ_DB_U32_4_CONS_IDX_S, ci);
|
|
-
|
|
- hns_roce_write64(ctx->uar + ROCEE_DB_OTHERS_L_0_REG, (__le32 *)&cq_db);
|
|
-
|
|
- return 0;
|
|
-}
|
|
-
|
|
-static int hns_roce_u_v1_post_send(struct ibv_qp *ibvqp, struct ibv_send_wr *wr,
|
|
- struct ibv_send_wr **bad_wr)
|
|
-{
|
|
- void *wqe;
|
|
- int nreq;
|
|
- int ps_opcode, i;
|
|
- int ret = 0;
|
|
- struct hns_roce_wqe_ctrl_seg *ctrl = NULL;
|
|
- struct hns_roce_wqe_data_seg *dseg = NULL;
|
|
- struct hns_roce_qp *qp = to_hr_qp(ibvqp);
|
|
- struct hns_roce_context *ctx = to_hr_ctx(ibvqp->context);
|
|
- unsigned int wqe_idx;
|
|
-
|
|
- pthread_spin_lock(&qp->sq.lock);
|
|
-
|
|
- for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
|
- if (hns_roce_wq_overflow(&qp->sq, nreq,
|
|
- to_hr_cq(qp->verbs_qp.qp.send_cq))) {
|
|
- ret = -1;
|
|
- *bad_wr = wr;
|
|
- goto out;
|
|
- }
|
|
-
|
|
- wqe_idx = (qp->sq.head + nreq) & (qp->rq.wqe_cnt - 1);
|
|
-
|
|
- if (wr->num_sge > qp->sq.max_gs) {
|
|
- ret = -1;
|
|
- *bad_wr = wr;
|
|
- verbs_err(verbs_get_ctx(ibvqp->context),
|
|
- "wr->num_sge(<=%d) = %d, check failed!\r\n",
|
|
- qp->sq.max_gs, wr->num_sge);
|
|
- goto out;
|
|
- }
|
|
-
|
|
- ctrl = wqe = get_send_wqe(qp, wqe_idx);
|
|
- memset(ctrl, 0, sizeof(struct hns_roce_wqe_ctrl_seg));
|
|
-
|
|
- qp->sq.wrid[wqe_idx] = wr->wr_id;
|
|
- for (i = 0; i < wr->num_sge; i++)
|
|
- ctrl->msg_length = htole32(le32toh(ctrl->msg_length) +
|
|
- wr->sg_list[i].length);
|
|
-
|
|
- ctrl->flag |= htole32(((wr->send_flags & IBV_SEND_SIGNALED) ?
|
|
- HNS_ROCE_WQE_CQ_NOTIFY : 0) |
|
|
- (wr->send_flags & IBV_SEND_SOLICITED ?
|
|
- HNS_ROCE_WQE_SE : 0) |
|
|
- ((wr->opcode == IBV_WR_SEND_WITH_IMM ||
|
|
- wr->opcode == IBV_WR_RDMA_WRITE_WITH_IMM) ?
|
|
- HNS_ROCE_WQE_IMM : 0) |
|
|
- (wr->send_flags & IBV_SEND_FENCE ?
|
|
- HNS_ROCE_WQE_FENCE : 0));
|
|
-
|
|
- if (wr->opcode == IBV_WR_SEND_WITH_IMM ||
|
|
- wr->opcode == IBV_WR_RDMA_WRITE_WITH_IMM)
|
|
- ctrl->imm_data = htole32(be32toh(wr->imm_data));
|
|
-
|
|
- wqe += sizeof(struct hns_roce_wqe_ctrl_seg);
|
|
-
|
|
- /* set remote addr segment */
|
|
- switch (ibvqp->qp_type) {
|
|
- case IBV_QPT_RC:
|
|
- switch (wr->opcode) {
|
|
- case IBV_WR_RDMA_READ:
|
|
- ps_opcode = HNS_ROCE_WQE_OPCODE_RDMA_READ;
|
|
- set_raddr_seg(wqe, wr->wr.rdma.remote_addr,
|
|
- wr->wr.rdma.rkey);
|
|
- break;
|
|
- case IBV_WR_RDMA_WRITE:
|
|
- case IBV_WR_RDMA_WRITE_WITH_IMM:
|
|
- ps_opcode = HNS_ROCE_WQE_OPCODE_RDMA_WRITE;
|
|
- set_raddr_seg(wqe, wr->wr.rdma.remote_addr,
|
|
- wr->wr.rdma.rkey);
|
|
- break;
|
|
- case IBV_WR_SEND:
|
|
- case IBV_WR_SEND_WITH_IMM:
|
|
- ps_opcode = HNS_ROCE_WQE_OPCODE_SEND;
|
|
- break;
|
|
- case IBV_WR_ATOMIC_CMP_AND_SWP:
|
|
- case IBV_WR_ATOMIC_FETCH_AND_ADD:
|
|
- default:
|
|
- ps_opcode = HNS_ROCE_WQE_OPCODE_MASK;
|
|
- break;
|
|
- }
|
|
- ctrl->flag |= htole32(ps_opcode);
|
|
- wqe += sizeof(struct hns_roce_wqe_raddr_seg);
|
|
- break;
|
|
- case IBV_QPT_UD:
|
|
- default:
|
|
- break;
|
|
- }
|
|
-
|
|
- dseg = wqe;
|
|
-
|
|
- /* Inline */
|
|
- if (wr->send_flags & IBV_SEND_INLINE && wr->num_sge) {
|
|
- if (le32toh(ctrl->msg_length) > qp->max_inline_data) {
|
|
- ret = -1;
|
|
- *bad_wr = wr;
|
|
- verbs_err(verbs_get_ctx(ibvqp->context),
|
|
- "inline data len(1-32)=%d, send_flags = 0x%x, check failed!\r\n",
|
|
- wr->send_flags, ctrl->msg_length);
|
|
- return ret;
|
|
- }
|
|
-
|
|
- for (i = 0; i < wr->num_sge; i++) {
|
|
- memcpy(wqe,
|
|
- ((void *) (uintptr_t) wr->sg_list[i].addr),
|
|
- wr->sg_list[i].length);
|
|
- wqe = wqe + wr->sg_list[i].length;
|
|
- }
|
|
-
|
|
- ctrl->flag |= htole32(HNS_ROCE_WQE_INLINE);
|
|
- } else {
|
|
- /* set sge */
|
|
- for (i = 0; i < wr->num_sge; i++)
|
|
- set_data_seg(dseg+i, wr->sg_list + i);
|
|
-
|
|
- ctrl->flag |=
|
|
- htole32(wr->num_sge << HNS_ROCE_WQE_SGE_NUM_BIT);
|
|
- }
|
|
- }
|
|
-
|
|
-out:
|
|
- /* Set DB return */
|
|
- if (likely(nreq)) {
|
|
- qp->sq.head += nreq;
|
|
-
|
|
- hns_roce_update_sq_head(ctx, qp->verbs_qp.qp.qp_num,
|
|
- qp->port_num - 1, qp->sl,
|
|
- qp->sq.head & ((qp->sq.wqe_cnt << 1) -
|
|
- 1));
|
|
- }
|
|
-
|
|
- pthread_spin_unlock(&qp->sq.lock);
|
|
-
|
|
- return ret;
|
|
-}
|
|
-
|
|
-static void __hns_roce_v1_cq_clean(struct hns_roce_cq *cq, uint32_t qpn,
|
|
- struct hns_roce_srq *srq)
|
|
-{
|
|
- int nfreed = 0;
|
|
- uint32_t prod_index;
|
|
- uint8_t owner_bit = 0;
|
|
- struct hns_roce_cqe *cqe, *dest;
|
|
- struct hns_roce_context *ctx = to_hr_ctx(cq->verbs_cq.cq.context);
|
|
-
|
|
- for (prod_index = cq->cons_index; get_sw_cqe(cq, prod_index);
|
|
- ++prod_index)
|
|
- if (prod_index == cq->cons_index + cq->verbs_cq.cq.cqe)
|
|
- break;
|
|
-
|
|
- while ((int) --prod_index - (int) cq->cons_index >= 0) {
|
|
- cqe = get_cqe(cq, prod_index & cq->verbs_cq.cq.cqe);
|
|
- if ((roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M,
|
|
- CQE_BYTE_16_LOCAL_QPN_S) & 0xffffff) == qpn) {
|
|
- ++nfreed;
|
|
- } else if (nfreed) {
|
|
- dest = get_cqe(cq,
|
|
- (prod_index + nfreed) & cq->verbs_cq.cq.cqe);
|
|
- owner_bit = roce_get_bit(dest->cqe_byte_4,
|
|
- CQE_BYTE_4_OWNER_S);
|
|
- memcpy(dest, cqe, sizeof(*cqe));
|
|
- roce_set_bit(dest->cqe_byte_4, CQE_BYTE_4_OWNER_S,
|
|
- owner_bit);
|
|
- }
|
|
- }
|
|
-
|
|
- if (nfreed) {
|
|
- cq->cons_index += nfreed;
|
|
- udma_to_device_barrier();
|
|
- hns_roce_update_cq_cons_index(ctx, cq);
|
|
- }
|
|
-}
|
|
-
|
|
-static void hns_roce_v1_cq_clean(struct hns_roce_cq *cq, unsigned int qpn,
|
|
- struct hns_roce_srq *srq)
|
|
-{
|
|
- pthread_spin_lock(&cq->lock);
|
|
- __hns_roce_v1_cq_clean(cq, qpn, srq);
|
|
- pthread_spin_unlock(&cq->lock);
|
|
-}
|
|
-
|
|
-static int hns_roce_u_v1_modify_qp(struct ibv_qp *qp, struct ibv_qp_attr *attr,
|
|
- int attr_mask)
|
|
-{
|
|
- int ret;
|
|
- struct ibv_modify_qp cmd = {};
|
|
- struct hns_roce_qp *hr_qp = to_hr_qp(qp);
|
|
-
|
|
- ret = ibv_cmd_modify_qp(qp, attr, attr_mask, &cmd, sizeof(cmd));
|
|
-
|
|
- if (!ret && (attr_mask & IBV_QP_STATE) &&
|
|
- attr->qp_state == IBV_QPS_RESET) {
|
|
- hns_roce_v1_cq_clean(to_hr_cq(qp->recv_cq), qp->qp_num,
|
|
- qp->srq ? to_hr_srq(qp->srq) : NULL);
|
|
- if (qp->send_cq != qp->recv_cq)
|
|
- hns_roce_v1_cq_clean(to_hr_cq(qp->send_cq), qp->qp_num,
|
|
- NULL);
|
|
-
|
|
- hns_roce_init_qp_indices(to_hr_qp(qp));
|
|
- }
|
|
-
|
|
- if (!ret && (attr_mask & IBV_QP_PORT)) {
|
|
- hr_qp->port_num = attr->port_num;
|
|
- verbs_err(verbs_get_ctx(qp->context), "hr_qp->port_num= 0x%x\n",
|
|
- hr_qp->port_num);
|
|
- }
|
|
-
|
|
- hr_qp->sl = attr->ah_attr.sl;
|
|
-
|
|
- return ret;
|
|
-}
|
|
-
|
|
-static void hns_roce_lock_cqs(struct ibv_qp *qp)
|
|
-{
|
|
- struct hns_roce_cq *send_cq = to_hr_cq(qp->send_cq);
|
|
- struct hns_roce_cq *recv_cq = to_hr_cq(qp->recv_cq);
|
|
-
|
|
- if (send_cq == recv_cq) {
|
|
- pthread_spin_lock(&send_cq->lock);
|
|
- } else if (send_cq->cqn < recv_cq->cqn) {
|
|
- pthread_spin_lock(&send_cq->lock);
|
|
- pthread_spin_lock(&recv_cq->lock);
|
|
- } else {
|
|
- pthread_spin_lock(&recv_cq->lock);
|
|
- pthread_spin_lock(&send_cq->lock);
|
|
- }
|
|
-}
|
|
-
|
|
-static void hns_roce_unlock_cqs(struct ibv_qp *qp)
|
|
-{
|
|
- struct hns_roce_cq *send_cq = to_hr_cq(qp->send_cq);
|
|
- struct hns_roce_cq *recv_cq = to_hr_cq(qp->recv_cq);
|
|
-
|
|
- if (send_cq == recv_cq) {
|
|
- pthread_spin_unlock(&send_cq->lock);
|
|
- } else if (send_cq->cqn < recv_cq->cqn) {
|
|
- pthread_spin_unlock(&recv_cq->lock);
|
|
- pthread_spin_unlock(&send_cq->lock);
|
|
- } else {
|
|
- pthread_spin_unlock(&send_cq->lock);
|
|
- pthread_spin_unlock(&recv_cq->lock);
|
|
- }
|
|
-}
|
|
-
|
|
-static int hns_roce_u_v1_destroy_qp(struct ibv_qp *ibqp)
|
|
-{
|
|
- int ret;
|
|
- struct hns_roce_qp *qp = to_hr_qp(ibqp);
|
|
-
|
|
- pthread_mutex_lock(&to_hr_ctx(ibqp->context)->qp_table_mutex);
|
|
- ret = ibv_cmd_destroy_qp(ibqp);
|
|
- if (ret) {
|
|
- pthread_mutex_unlock(&to_hr_ctx(ibqp->context)->qp_table_mutex);
|
|
- return ret;
|
|
- }
|
|
-
|
|
- hns_roce_lock_cqs(ibqp);
|
|
-
|
|
- __hns_roce_v1_cq_clean(to_hr_cq(ibqp->recv_cq), ibqp->qp_num,
|
|
- ibqp->srq ? to_hr_srq(ibqp->srq) : NULL);
|
|
-
|
|
- if (ibqp->send_cq != ibqp->recv_cq)
|
|
- __hns_roce_v1_cq_clean(to_hr_cq(ibqp->send_cq), ibqp->qp_num,
|
|
- NULL);
|
|
-
|
|
- hns_roce_clear_qp(to_hr_ctx(ibqp->context), ibqp->qp_num);
|
|
-
|
|
- hns_roce_unlock_cqs(ibqp);
|
|
- pthread_mutex_unlock(&to_hr_ctx(ibqp->context)->qp_table_mutex);
|
|
-
|
|
- free(qp->sq.wrid);
|
|
- if (qp->rq.wqe_cnt)
|
|
- free(qp->rq.wrid);
|
|
-
|
|
- hns_roce_free_buf(&qp->buf);
|
|
- free(qp);
|
|
-
|
|
- return ret;
|
|
-}
|
|
-
|
|
-static int hns_roce_u_v1_post_recv(struct ibv_qp *ibvqp, struct ibv_recv_wr *wr,
|
|
- struct ibv_recv_wr **bad_wr)
|
|
-{
|
|
- int ret = 0;
|
|
- unsigned int nreq;
|
|
- struct ibv_sge *sg;
|
|
- struct hns_roce_rc_rq_wqe *rq_wqe;
|
|
- struct hns_roce_qp *qp = to_hr_qp(ibvqp);
|
|
- struct hns_roce_context *ctx = to_hr_ctx(ibvqp->context);
|
|
- unsigned int wqe_idx;
|
|
-
|
|
- pthread_spin_lock(&qp->rq.lock);
|
|
-
|
|
- for (nreq = 0; wr; ++nreq, wr = wr->next) {
|
|
- if (hns_roce_wq_overflow(&qp->rq, nreq,
|
|
- to_hr_cq(qp->verbs_qp.qp.recv_cq))) {
|
|
- ret = -1;
|
|
- *bad_wr = wr;
|
|
- goto out;
|
|
- }
|
|
-
|
|
- wqe_idx = (qp->rq.head + nreq) & (qp->rq.wqe_cnt - 1);
|
|
-
|
|
- if (wr->num_sge > qp->rq.max_gs) {
|
|
- ret = -1;
|
|
- *bad_wr = wr;
|
|
- goto out;
|
|
- }
|
|
-
|
|
- rq_wqe = get_recv_wqe(qp, wqe_idx);
|
|
- if (wr->num_sge > HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM) {
|
|
- ret = -1;
|
|
- *bad_wr = wr;
|
|
- goto out;
|
|
- }
|
|
-
|
|
- if (wr->num_sge == HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM) {
|
|
- roce_set_field(rq_wqe->u32_2,
|
|
- RC_RQ_WQE_NUMBER_OF_DATA_SEG_M,
|
|
- RC_RQ_WQE_NUMBER_OF_DATA_SEG_S,
|
|
- HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM);
|
|
- sg = wr->sg_list;
|
|
-
|
|
- rq_wqe->va0 = htole64(sg->addr);
|
|
- rq_wqe->l_key0 = htole32(sg->lkey);
|
|
- rq_wqe->length0 = htole32(sg->length);
|
|
-
|
|
- sg = wr->sg_list + 1;
|
|
-
|
|
- rq_wqe->va1 = htole64(sg->addr);
|
|
- rq_wqe->l_key1 = htole32(sg->lkey);
|
|
- rq_wqe->length1 = htole32(sg->length);
|
|
- } else if (wr->num_sge == HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM - 1) {
|
|
- roce_set_field(rq_wqe->u32_2,
|
|
- RC_RQ_WQE_NUMBER_OF_DATA_SEG_M,
|
|
- RC_RQ_WQE_NUMBER_OF_DATA_SEG_S,
|
|
- HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM - 1);
|
|
- sg = wr->sg_list;
|
|
-
|
|
- rq_wqe->va0 = htole64(sg->addr);
|
|
- rq_wqe->l_key0 = htole32(sg->lkey);
|
|
- rq_wqe->length0 = htole32(sg->length);
|
|
-
|
|
- } else if (wr->num_sge == HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM - 2) {
|
|
- roce_set_field(rq_wqe->u32_2,
|
|
- RC_RQ_WQE_NUMBER_OF_DATA_SEG_M,
|
|
- RC_RQ_WQE_NUMBER_OF_DATA_SEG_S,
|
|
- HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM - 2);
|
|
- }
|
|
-
|
|
- qp->rq.wrid[wqe_idx] = wr->wr_id;
|
|
- }
|
|
-
|
|
-out:
|
|
- if (nreq) {
|
|
- qp->rq.head += nreq;
|
|
-
|
|
- hns_roce_update_rq_head(ctx, qp->verbs_qp.qp.qp_num,
|
|
- qp->rq.head & ((qp->rq.wqe_cnt << 1) -
|
|
- 1));
|
|
- }
|
|
-
|
|
- pthread_spin_unlock(&qp->rq.lock);
|
|
-
|
|
- return ret;
|
|
-}
|
|
-
|
|
-const struct hns_roce_u_hw hns_roce_u_hw_v1 = {
|
|
- .hw_version = HNS_ROCE_HW_VER1,
|
|
- .hw_ops = {
|
|
- .poll_cq = hns_roce_u_v1_poll_cq,
|
|
- .req_notify_cq = hns_roce_u_v1_arm_cq,
|
|
- .post_send = hns_roce_u_v1_post_send,
|
|
- .post_recv = hns_roce_u_v1_post_recv,
|
|
- .modify_qp = hns_roce_u_v1_modify_qp,
|
|
- .destroy_qp = hns_roce_u_v1_destroy_qp,
|
|
- },
|
|
-};
|
|
diff --git a/providers/hns/hns_roce_u_hw_v1.h b/providers/hns/hns_roce_u_hw_v1.h
|
|
deleted file mode 100644
|
|
index bb7aec6b..00000000
|
|
--- a/providers/hns/hns_roce_u_hw_v1.h
|
|
+++ /dev/null
|
|
@@ -1,244 +0,0 @@
|
|
-/*
|
|
- * Copyright (c) 2016 Hisilicon Limited.
|
|
- *
|
|
- * This software is available to you under a choice of one of two
|
|
- * licenses. You may choose to be licensed under the terms of the GNU
|
|
- * General Public License (GPL) Version 2, available from the file
|
|
- * COPYING in the main directory of this source tree, or the
|
|
- * OpenIB.org BSD license below:
|
|
- *
|
|
- * Redistribution and use in source and binary forms, with or
|
|
- * without modification, are permitted provided that the following
|
|
- * conditions are met:
|
|
- *
|
|
- * - Redistributions of source code must retain the above
|
|
- * copyright notice, this list of conditions and the following
|
|
- * disclaimer.
|
|
- *
|
|
- * - Redistributions in binary form must reproduce the above
|
|
- * copyright notice, this list of conditions and the following
|
|
- * disclaimer in the documentation and/or other materials
|
|
- * provided with the distribution.
|
|
- *
|
|
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
|
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
|
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
|
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
- * SOFTWARE.
|
|
- */
|
|
-
|
|
-#ifndef _HNS_ROCE_U_HW_V1_H
|
|
-#define _HNS_ROCE_U_HW_V1_H
|
|
-
|
|
-#include <stdint.h>
|
|
-#include <linux/types.h>
|
|
-
|
|
-#define HNS_ROCE_CQ_DB_REQ_SOL 1
|
|
-#define HNS_ROCE_CQ_DB_REQ_NEXT 0
|
|
-
|
|
-#define HNS_ROCE_CQE_IS_SQ 0
|
|
-
|
|
-#define HNS_ROCE_RC_RQ_WQE_MAX_SGE_NUM 2
|
|
-
|
|
-enum {
|
|
- HNS_ROCE_WQE_INLINE = 1 << 31,
|
|
- HNS_ROCE_WQE_SE = 1 << 30,
|
|
- HNS_ROCE_WQE_SGE_NUM_BIT = 24,
|
|
- HNS_ROCE_WQE_IMM = 1 << 23,
|
|
- HNS_ROCE_WQE_FENCE = 1 << 21,
|
|
- HNS_ROCE_WQE_CQ_NOTIFY = 1 << 20,
|
|
- HNS_ROCE_WQE_OPCODE_SEND = 0 << 16,
|
|
- HNS_ROCE_WQE_OPCODE_RDMA_READ = 1 << 16,
|
|
- HNS_ROCE_WQE_OPCODE_RDMA_WRITE = 2 << 16,
|
|
- HNS_ROCE_WQE_OPCODE_BIND_MW2 = 6 << 16,
|
|
- HNS_ROCE_WQE_OPCODE_MASK = 15 << 16,
|
|
-};
|
|
-
|
|
-struct hns_roce_wqe_ctrl_seg {
|
|
- __le32 sgl_pa_h;
|
|
- __le32 flag;
|
|
- __le32 imm_data;
|
|
- __le32 msg_length;
|
|
-};
|
|
-
|
|
-struct hns_roce_wqe_data_seg {
|
|
- __le64 addr;
|
|
- __le32 lkey;
|
|
- __le32 len;
|
|
-};
|
|
-
|
|
-struct hns_roce_wqe_raddr_seg {
|
|
- __le32 rkey;
|
|
- __le32 len;
|
|
- __le64 raddr;
|
|
-};
|
|
-
|
|
-enum {
|
|
- CQ_OK = 0,
|
|
- CQ_EMPTY = -1,
|
|
- CQ_POLL_ERR = -2,
|
|
-};
|
|
-
|
|
-enum {
|
|
- HNS_ROCE_CQE_QPN_MASK = 0x3ffff,
|
|
- HNS_ROCE_CQE_STATUS_MASK = 0x1f,
|
|
- HNS_ROCE_CQE_OPCODE_MASK = 0xf,
|
|
-};
|
|
-
|
|
-enum {
|
|
- HNS_ROCE_CQE_SUCCESS,
|
|
- HNS_ROCE_CQE_SYNDROME_LOCAL_LENGTH_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_LOCAL_QP_OP_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_LOCAL_PROT_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_WR_FLUSH_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_MEM_MANAGE_OPERATE_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_BAD_RESP_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_LOCAL_ACCESS_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_REMOTE_ACCESS_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_REMOTE_OP_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR,
|
|
- HNS_ROCE_CQE_SYNDROME_RNR_RETRY_EXC_ERR,
|
|
-};
|
|
-
|
|
-struct hns_roce_cq_db {
|
|
- __le32 u32_4;
|
|
- __le32 u32_8;
|
|
-};
|
|
-#define CQ_DB_U32_4_CONS_IDX_S 0
|
|
-#define CQ_DB_U32_4_CONS_IDX_M (((1UL << 16) - 1) << CQ_DB_U32_4_CONS_IDX_S)
|
|
-
|
|
-#define CQ_DB_U32_8_CQN_S 0
|
|
-#define CQ_DB_U32_8_CQN_M (((1UL << 16) - 1) << CQ_DB_U32_8_CQN_S)
|
|
-
|
|
-#define CQ_DB_U32_8_NOTIFY_TYPE_S 16
|
|
-
|
|
-#define CQ_DB_U32_8_CMD_MDF_S 24
|
|
-#define CQ_DB_U32_8_CMD_MDF_M (((1UL << 4) - 1) << CQ_DB_U32_8_CMD_MDF_S)
|
|
-
|
|
-#define CQ_DB_U32_8_CMD_S 28
|
|
-#define CQ_DB_U32_8_CMD_M (((1UL << 3) - 1) << CQ_DB_U32_8_CMD_S)
|
|
-
|
|
-#define CQ_DB_U32_8_HW_SYNC_S 31
|
|
-
|
|
-struct hns_roce_rq_db {
|
|
- __le32 u32_4;
|
|
- __le32 u32_8;
|
|
-};
|
|
-
|
|
-#define RQ_DB_U32_4_RQ_HEAD_S 0
|
|
-#define RQ_DB_U32_4_RQ_HEAD_M (((1UL << 15) - 1) << RQ_DB_U32_4_RQ_HEAD_S)
|
|
-
|
|
-#define RQ_DB_U32_8_QPN_S 0
|
|
-#define RQ_DB_U32_8_QPN_M (((1UL << 24) - 1) << RQ_DB_U32_8_QPN_S)
|
|
-
|
|
-#define RQ_DB_U32_8_CMD_S 28
|
|
-#define RQ_DB_U32_8_CMD_M (((1UL << 3) - 1) << RQ_DB_U32_8_CMD_S)
|
|
-
|
|
-#define RQ_DB_U32_8_HW_SYNC_S 31
|
|
-
|
|
-struct hns_roce_sq_db {
|
|
- __le32 u32_4;
|
|
- __le32 u32_8;
|
|
-};
|
|
-
|
|
-#define SQ_DB_U32_4_SQ_HEAD_S 0
|
|
-#define SQ_DB_U32_4_SQ_HEAD_M (((1UL << 15) - 1) << SQ_DB_U32_4_SQ_HEAD_S)
|
|
-
|
|
-#define SQ_DB_U32_4_SL_S 16
|
|
-#define SQ_DB_U32_4_SL_M (((1UL << 2) - 1) << SQ_DB_U32_4_SL_S)
|
|
-
|
|
-#define SQ_DB_U32_4_PORT_S 18
|
|
-#define SQ_DB_U32_4_PORT_M (((1UL << 3) - 1) << SQ_DB_U32_4_PORT_S)
|
|
-
|
|
-#define SQ_DB_U32_4_DIRECT_WQE_S 31
|
|
-
|
|
-#define SQ_DB_U32_8_QPN_S 0
|
|
-#define SQ_DB_U32_8_QPN_M (((1UL << 24) - 1) << SQ_DB_U32_8_QPN_S)
|
|
-
|
|
-#define SQ_DB_U32_8_HW_SYNC 31
|
|
-
|
|
-struct hns_roce_cqe {
|
|
- __le32 cqe_byte_4;
|
|
- union {
|
|
- __le32 r_key;
|
|
- __le32 immediate_data;
|
|
- };
|
|
- __le32 byte_cnt;
|
|
- __le32 cqe_byte_16;
|
|
- __le32 cqe_byte_20;
|
|
- __le32 s_mac_l;
|
|
- __le32 cqe_byte_28;
|
|
- __le32 reserved;
|
|
-};
|
|
-#define CQE_BYTE_4_OPERATION_TYPE_S 0
|
|
-#define CQE_BYTE_4_OPERATION_TYPE_M \
|
|
- (((1UL << 4) - 1) << CQE_BYTE_4_OPERATION_TYPE_S)
|
|
-
|
|
-#define CQE_BYTE_4_OWNER_S 7
|
|
-
|
|
-#define CQE_BYTE_4_STATUS_OF_THE_OPERATION_S 8
|
|
-#define CQE_BYTE_4_STATUS_OF_THE_OPERATION_M \
|
|
- (((1UL << 5) - 1) << CQE_BYTE_4_STATUS_OF_THE_OPERATION_S)
|
|
-
|
|
-#define CQE_BYTE_4_SQ_RQ_FLAG_S 14
|
|
-
|
|
-#define CQE_BYTE_4_IMMEDIATE_DATA_FLAG_S 15
|
|
-
|
|
-#define CQE_BYTE_4_WQE_INDEX_S 16
|
|
-#define CQE_BYTE_4_WQE_INDEX_M (((1UL << 14) - 1) << CQE_BYTE_4_WQE_INDEX_S)
|
|
-
|
|
-#define CQE_BYTE_16_LOCAL_QPN_S 0
|
|
-#define CQE_BYTE_16_LOCAL_QPN_M (((1UL << 24) - 1) << CQE_BYTE_16_LOCAL_QPN_S)
|
|
-
|
|
-#define ROCEE_DB_SQ_L_0_REG 0x230
|
|
-
|
|
-#define ROCEE_DB_OTHERS_L_0_REG 0x238
|
|
-
|
|
-struct hns_roce_rc_send_wqe {
|
|
- __le32 sgl_ba_31_0;
|
|
- __le32 u32_1;
|
|
- union {
|
|
- __le32 r_key;
|
|
- __le32 immediate_data;
|
|
- };
|
|
- __le32 msg_length;
|
|
- __le32 rvd_3;
|
|
- __le32 rvd_4;
|
|
- __le32 rvd_5;
|
|
- __le32 rvd_6;
|
|
- __le64 va0;
|
|
- __le32 l_key0;
|
|
- __le32 length0;
|
|
-
|
|
- __le64 va1;
|
|
- __le32 l_key1;
|
|
- __le32 length1;
|
|
-};
|
|
-
|
|
-struct hns_roce_rc_rq_wqe {
|
|
- __le32 u32_0;
|
|
- __le32 sgl_ba_31_0;
|
|
- __le32 u32_2;
|
|
- __le32 rvd_5;
|
|
- __le32 rvd_6;
|
|
- __le32 rvd_7;
|
|
- __le32 rvd_8;
|
|
- __le32 rvd_9;
|
|
-
|
|
- __le64 va0;
|
|
- __le32 l_key0;
|
|
- __le32 length0;
|
|
-
|
|
- __le64 va1;
|
|
- __le32 l_key1;
|
|
- __le32 length1;
|
|
-};
|
|
-#define RC_RQ_WQE_NUMBER_OF_DATA_SEG_S 16
|
|
-#define RC_RQ_WQE_NUMBER_OF_DATA_SEG_M \
|
|
- (((1UL << 6) - 1) << RC_RQ_WQE_NUMBER_OF_DATA_SEG_S)
|
|
-
|
|
-#endif /* _HNS_ROCE_U_HW_V1_H */
|
|
diff --git a/providers/hns/hns_roce_u_verbs.c b/providers/hns/hns_roce_u_verbs.c
|
|
index 215d82ec..ba7f2aee 100644
|
|
--- a/providers/hns/hns_roce_u_verbs.c
|
|
+++ b/providers/hns/hns_roce_u_verbs.c
|
|
@@ -40,7 +40,6 @@
|
|
#include <ccan/minmax.h>
|
|
#include "hns_roce_u.h"
|
|
#include "hns_roce_u_db.h"
|
|
-#include "hns_roce_u_hw_v1.h"
|
|
#include "hns_roce_u_hw_v2.h"
|
|
|
|
void hns_roce_init_qp_indices(struct hns_roce_qp *qp)
|
|
@@ -341,7 +340,6 @@ static int exec_cq_create_cmd(struct ibv_context *context,
|
|
static struct ibv_cq_ex *create_cq(struct ibv_context *context,
|
|
struct ibv_cq_init_attr_ex *attr)
|
|
{
|
|
- struct hns_roce_device *hr_dev = to_hr_dev(context->device);
|
|
struct hns_roce_context *hr_ctx = to_hr_ctx(context);
|
|
struct hns_roce_cq *cq;
|
|
int ret;
|
|
@@ -384,8 +382,7 @@ static struct ibv_cq_ex *create_cq(struct ibv_context *context,
|
|
return &cq->verbs_cq.cq_ex;
|
|
|
|
err_cmd:
|
|
- if (hr_dev->hw_version != HNS_ROCE_HW_VER1)
|
|
- hns_roce_free_db(hr_ctx, cq->db, HNS_ROCE_CQ_TYPE_DB);
|
|
+ hns_roce_free_db(hr_ctx, cq->db, HNS_ROCE_CQ_TYPE_DB);
|
|
err_db:
|
|
hns_roce_free_buf(&cq->buf);
|
|
err_lock:
|
|
@@ -446,9 +443,8 @@ int hns_roce_u_destroy_cq(struct ibv_cq *cq)
|
|
if (ret)
|
|
return ret;
|
|
|
|
- if (to_hr_dev(cq->context->device)->hw_version != HNS_ROCE_HW_VER1)
|
|
- hns_roce_free_db(to_hr_ctx(cq->context), to_hr_cq(cq)->db,
|
|
- HNS_ROCE_CQ_TYPE_DB);
|
|
+ hns_roce_free_db(to_hr_ctx(cq->context), to_hr_cq(cq)->db,
|
|
+ HNS_ROCE_CQ_TYPE_DB);
|
|
hns_roce_free_buf(&to_hr_cq(cq)->buf);
|
|
free(to_hr_cq(cq));
|
|
|
|
@@ -782,7 +778,7 @@ static int check_qp_create_mask(struct hns_roce_context *ctx,
|
|
|
|
switch (attr->qp_type) {
|
|
case IBV_QPT_UD:
|
|
- if (hr_dev->hw_version < HNS_ROCE_HW_VER3)
|
|
+ if (hr_dev->hw_version == HNS_ROCE_HW_VER2)
|
|
return -EINVAL;
|
|
SWITCH_FALLTHROUGH;
|
|
case IBV_QPT_RC:
|
|
@@ -813,7 +809,6 @@ static int hns_roce_qp_has_rq(struct ibv_qp_init_attr_ex *attr)
|
|
static int verify_qp_create_cap(struct hns_roce_context *ctx,
|
|
struct ibv_qp_init_attr_ex *attr)
|
|
{
|
|
- struct hns_roce_device *hr_dev = to_hr_dev(ctx->ibv_ctx.context.device);
|
|
struct ibv_qp_cap *cap = &attr->cap;
|
|
uint32_t min_wqe_num;
|
|
int has_rq;
|
|
@@ -833,9 +828,7 @@ static int verify_qp_create_cap(struct hns_roce_context *ctx,
|
|
cap->max_recv_sge = 0;
|
|
}
|
|
|
|
- min_wqe_num = hr_dev->hw_version == HNS_ROCE_HW_VER1 ?
|
|
- HNS_ROCE_V1_MIN_WQE_NUM : HNS_ROCE_V2_MIN_WQE_NUM;
|
|
-
|
|
+ min_wqe_num = HNS_ROCE_V2_MIN_WQE_NUM;
|
|
if (cap->max_send_wr < min_wqe_num)
|
|
cap->max_send_wr = min_wqe_num;
|
|
|
|
@@ -905,18 +898,10 @@ static void qp_free_recv_inl_buf(struct hns_roce_qp *qp)
|
|
static int calc_qp_buff_size(struct hns_roce_device *hr_dev,
|
|
struct hns_roce_qp *qp)
|
|
{
|
|
- struct hns_roce_wq *sq, *rq;
|
|
+ struct hns_roce_wq *sq = &qp->sq;
|
|
+ struct hns_roce_wq *rq = &qp->rq;
|
|
unsigned int size;
|
|
|
|
- if (hr_dev->hw_version == HNS_ROCE_HW_VER1 &&
|
|
- qp->rq.wqe_shift > qp->sq.wqe_shift) {
|
|
- sq = &qp->rq;
|
|
- rq = &qp->sq;
|
|
- } else {
|
|
- sq = &qp->sq;
|
|
- rq = &qp->rq;
|
|
- }
|
|
-
|
|
qp->buf_size = 0;
|
|
|
|
/* SQ WQE */
|
|
@@ -1013,11 +998,6 @@ static void set_ext_sge_param(struct hns_roce_device *hr_dev,
|
|
|
|
qp->ex_sge.sge_shift = HNS_ROCE_SGE_SHIFT;
|
|
|
|
- if (hr_dev->hw_version == HNS_ROCE_HW_VER1) {
|
|
- qp->sq.max_gs = HNS_ROCE_SGE_IN_WQE;
|
|
- return;
|
|
- }
|
|
-
|
|
qp->sq.max_gs = attr->cap.max_send_sge;
|
|
|
|
wqe_sge_cnt = get_wqe_ext_sge_cnt(qp);
|
|
@@ -1048,20 +1028,11 @@ static void hns_roce_set_qp_params(struct ibv_qp_init_attr_ex *attr,
|
|
|
|
qp->rq.max_gs = roundup_pow_of_two(attr->cap.max_recv_sge +
|
|
qp->rq.rsv_sge);
|
|
- if (hr_dev->hw_version == HNS_ROCE_HW_VER1)
|
|
- qp->rq.wqe_shift =
|
|
- hr_ilog32(sizeof(struct hns_roce_rc_rq_wqe));
|
|
- else
|
|
- qp->rq.wqe_shift =
|
|
- hr_ilog32(HNS_ROCE_SGE_SIZE * qp->rq.max_gs);
|
|
-
|
|
+ qp->rq.wqe_shift = hr_ilog32(HNS_ROCE_SGE_SIZE * qp->rq.max_gs);
|
|
cnt = roundup_pow_of_two(attr->cap.max_recv_wr);
|
|
qp->rq.wqe_cnt = cnt;
|
|
qp->rq.shift = hr_ilog32(cnt);
|
|
- if (hr_dev->hw_version == HNS_ROCE_HW_VER1)
|
|
- qp->rq_rinl_buf.wqe_cnt = 0;
|
|
- else
|
|
- qp->rq_rinl_buf.wqe_cnt = cnt;
|
|
+ qp->rq_rinl_buf.wqe_cnt = cnt;
|
|
|
|
attr->cap.max_recv_wr = qp->rq.wqe_cnt;
|
|
attr->cap.max_recv_sge = qp->rq.max_gs;
|
|
@@ -1086,11 +1057,6 @@ static void hns_roce_set_qp_params(struct ibv_qp_init_attr_ex *attr,
|
|
|
|
static void qp_free_db(struct hns_roce_qp *qp, struct hns_roce_context *ctx)
|
|
{
|
|
- struct hns_roce_device *hr_dev = to_hr_dev(ctx->ibv_ctx.context.device);
|
|
-
|
|
- if (hr_dev->hw_version == HNS_ROCE_HW_VER1)
|
|
- return;
|
|
-
|
|
if (qp->sdb)
|
|
hns_roce_free_db(ctx, qp->sdb, HNS_ROCE_QP_TYPE_DB);
|
|
|
|
@@ -1101,11 +1067,6 @@ static void qp_free_db(struct hns_roce_qp *qp, struct hns_roce_context *ctx)
|
|
static int qp_alloc_db(struct ibv_qp_init_attr_ex *attr, struct hns_roce_qp *qp,
|
|
struct hns_roce_context *ctx)
|
|
{
|
|
- struct hns_roce_device *hr_dev = to_hr_dev(ctx->ibv_ctx.context.device);
|
|
-
|
|
- if (hr_dev->hw_version == HNS_ROCE_HW_VER1)
|
|
- return 0;
|
|
-
|
|
if (attr->cap.max_send_wr) {
|
|
qp->sdb = hns_roce_alloc_db(ctx, HNS_ROCE_QP_TYPE_DB);
|
|
if (!qp->sdb)
|
|
@@ -1421,7 +1382,7 @@ struct ibv_ah *hns_roce_u_create_ah(struct ibv_pd *pd, struct ibv_ah_attr *attr)
|
|
struct hns_roce_ah *ah;
|
|
|
|
/* HIP08 don't support create ah */
|
|
- if (hr_dev->hw_version < HNS_ROCE_HW_VER3)
|
|
+ if (hr_dev->hw_version == HNS_ROCE_HW_VER2)
|
|
return NULL;
|
|
|
|
ah = malloc(sizeof(*ah));
|
|
--
|
|
2.30.0
|
|
|