60127170d4
Signed-off-by: Xue Liu <liuxue@loongson.cn> (cherry picked from commit 4f97277029574b386291a8c9a87d479a147d179e)
42 lines
1.4 KiB
Diff
42 lines
1.4 KiB
Diff
From 2d686707df37b8752f31684db16b689637ba141d Mon Sep 17 00:00:00 2001
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From: Xue Liu <liuxue@loongson.cn>
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Date: Thu, 1 Dec 2022 18:37:21 +0800
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Subject: [PATCH 1/3] barrier: LOONGARCH memory barriers
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Implement memory barrier for LOONGARCH platforms.
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Change-Id: I44f5e63e6eb3f8bf98e965a22fb86f94e727061d
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Signed-off-by: Xue Liu <liuxue@loongson.cn>
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Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/16082
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Community-CI: Mellanox Build Bot
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Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
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Reviewed-by: Jim Harris <james.r.harris@intel.com>
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Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
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---
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include/spdk/barrier.h | 9 +++++++++
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1 file changed, 9 insertions(+)
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diff --git a/include/spdk/barrier.h b/include/spdk/barrier.h
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index acae360..1ee7240 100644
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--- a/include/spdk/barrier.h
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+++ b/include/spdk/barrier.h
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@@ -97,6 +97,15 @@ extern "C" {
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#define _spdk_smp_mb() __asm volatile("lock addl $0, -128(%%esp); " ::: "memory");
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#endif
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+#elif defined(__loongarch__)
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+
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+#define _spdk_rmb() __asm volatile("dbar 0" ::: "memory")
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+#define _spdk_wmb() __asm volatile("dbar 0" ::: "memory")
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+#define _spdk_mb() __asm volatile("dbar 0" ::: "memory")
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+#define _spdk_smp_rmb() __asm volatile("dbar 0" ::: "memory")
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+#define _spdk_smp_wmb() __asm volatile("dbar 0" ::: "memory")
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+#define _spdk_smp_mb() __asm volatile("dbar 0" ::: "memory")
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+
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#else
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#define _spdk_rmb()
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--
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2.20.1
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