60127170d4
Signed-off-by: Xue Liu <liuxue@loongson.cn> (cherry picked from commit 4f97277029574b386291a8c9a87d479a147d179e)
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From e9a94122b8704411b79157b25c4d07580246be6c Mon Sep 17 00:00:00 2001
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From: Xue Liu <liuxue@loongson.cn>
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Date: Thu, 1 Dec 2022 18:38:57 +0800
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Subject: [PATCH 2/3] nvme/pcie: add memory barrier for LOONGARCH
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Add memory barrier for LOONGARCH in nvme_pcie_qpair_process_completions.
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Signed-off-by: Xue Liu <liuxue@loongson.cn>
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Change-Id: Icc992ef612a00dd18ff33f70ab8f54e8c5d5c5b7
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Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/16083
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Community-CI: Mellanox Build Bot
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Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
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Reviewed-by: Jim Harris <james.r.harris@intel.com>
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Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
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---
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lib/nvme/nvme_pcie_common.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/lib/nvme/nvme_pcie_common.c b/lib/nvme/nvme_pcie_common.c
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index 0ef56cb..5fb6304 100644
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--- a/lib/nvme/nvme_pcie_common.c
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+++ b/lib/nvme/nvme_pcie_common.c
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@@ -801,7 +801,7 @@ nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_
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__builtin_prefetch(&pqpair->tr[next_cpl->cid]);
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}
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-#ifdef __PPC64__
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+#if defined(__PPC64__) || defined(__loongarch__)
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/*
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* This memory barrier prevents reordering of:
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* - load after store from/to tr
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--
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2.20.1
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