e423655c55
commit: e26726: digest: fix codecheck warning Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com> (cherry picked from commit f6221f178fe43735fe56d45ae8d030dd949b3a23)
114 lines
3.3 KiB
Diff
114 lines
3.3 KiB
Diff
From e26726746340428c58ea1ce2460c0fb669bb7545 Mon Sep 17 00:00:00 2001
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From: Kai Ye <yekai13@huawei.com>
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Date: Fri, 7 Jan 2022 09:56:54 +0800
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Subject: [PATCH 18/18] digest: fix codecheck warning
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fix a more than 50 lines function uadk_e_digest_init.
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Signed-off-by: Kai Ye <yekai13@huawei.com>
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---
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src/uadk_digest.c | 57 ++++++++++++++++++++++++++---------------------
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1 file changed, 31 insertions(+), 26 deletions(-)
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diff --git a/src/uadk_digest.c b/src/uadk_digest.c
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index bf738af..5b843a0 100644
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--- a/src/uadk_digest.c
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+++ b/src/uadk_digest.c
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@@ -95,6 +95,13 @@ struct digest_priv_ctx {
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bool copy;
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};
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+struct digest_info {
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+ int nid;
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+ enum wd_digest_mode mode;
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+ enum wd_digest_type alg;
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+ __u32 out_len;
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+};
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+
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static int digest_nids[] = {
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NID_md5,
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NID_sm3,
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@@ -116,6 +123,16 @@ static struct digest_threshold_table digest_pkt_threshold_table[] = {
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{ NID_sha512, SHA_SMALL_PACKET_OFFLOAD_THRESHOLD_DEFAULT },
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};
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+static struct digest_info digest_info_table[] = {
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+ {NID_md5, WD_DIGEST_NORMAL, WD_DIGEST_MD5, 16},
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+ {NID_sm3, WD_DIGEST_NORMAL, WD_DIGEST_SM3, 32},
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+ {NID_sha1, WD_DIGEST_NORMAL, WD_DIGEST_SHA1, 20},
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+ {NID_sha224, WD_DIGEST_NORMAL, WD_DIGEST_SHA224, 28},
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+ {NID_sha256, WD_DIGEST_NORMAL, WD_DIGEST_SHA256, 32},
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+ {NID_sha384, WD_DIGEST_NORMAL, WD_DIGEST_SHA384, 48},
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+ {NID_sha512, WD_DIGEST_NORMAL, WD_DIGEST_SHA512, 64},
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+};
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+
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static EVP_MD *uadk_md5;
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static EVP_MD *uadk_sm3;
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static EVP_MD *uadk_sha1;
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@@ -451,8 +468,8 @@ static void digest_priv_ctx_setup(struct digest_priv_ctx *priv,
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enum wd_digest_type alg, enum wd_digest_mode mode,
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__u32 out_len)
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{
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- priv->setup.mode = alg;
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- priv->setup.alg = mode;
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+ priv->setup.alg = alg;
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+ priv->setup.mode = mode;
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priv->req.out_buf_bytes = out_len;
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priv->req.out_bytes = out_len;
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}
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@@ -461,9 +478,10 @@ static int uadk_e_digest_init(EVP_MD_CTX *ctx)
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{
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struct digest_priv_ctx *priv =
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(struct digest_priv_ctx *) EVP_MD_CTX_md_data(ctx);
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+ int digest_counts = ARRAY_SIZE(digest_info_table);
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int nid = EVP_MD_nid(EVP_MD_CTX_md(ctx));
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struct sched_params params = {0};
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- int ret;
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+ int ret, i;
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/* Allocate a soft ctx for hardware engine */
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if (priv->soft_ctx == NULL)
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@@ -478,29 +496,16 @@ static int uadk_e_digest_init(EVP_MD_CTX *ctx)
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goto soft_init;
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}
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- switch (nid) {
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- case NID_md5:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_MD5, 16);
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- break;
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- case NID_sm3:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_SM3, 32);
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- break;
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- case NID_sha1:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_SHA1, 20);
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- break;
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- case NID_sha224:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_SHA224, 28);
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- break;
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- case NID_sha256:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_SHA256, 32);
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- break;
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- case NID_sha384:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_SHA384, 48);
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- break;
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- case NID_sha512:
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- digest_priv_ctx_setup(priv, WD_DIGEST_NORMAL, WD_DIGEST_SHA512, 64);
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- break;
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- default:
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+ for (i = 0; i < digest_counts; i++) {
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+ if (nid == digest_info_table[i].nid) {
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+ digest_priv_ctx_setup(priv, digest_info_table[i].alg,
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+ digest_info_table[i].mode, digest_info_table[i].out_len);
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+ break;
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+ }
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+ }
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+
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+ if (i == digest_counts) {
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+ fprintf(stderr, "failed to setup the private ctx.\n");
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return 0;
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}
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--
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2.24.4
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