Correct the return of error code, add init of pthread spinlock and mutex
judgement, remove a repeated init of pthread lock init, fix owner bit
when SQ wrqps.
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com
Signed-off-by: Ran Zhou <zhouran10@h-partners.com>
Currently the QPC state in HW is modified inside the critical section of
spinlock but the ibv_qp state is modified outside. There will be a short
period when QPC state has been modified to err with ibv_qp state still
remaining RTS. WQEs during this period will still be post-send by RTS-state
ibv_qp but then dropped by err-state HW with no flush CQEs generated.
To fix this problem, the QPC state in HW and ibv_qp state should be both
modified to err inside the critical section of spinlock.
Signed-off-by: Ran Zhou <zhouran10@h-partners.com>
Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
The issues mainly lies in the memory empty check, variable range
inconsistency, parameter verification, and print format.
Signed-off-by: Luoyouming <luoyouming@huawei.com>
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com
Signed-off-by: Ran Zhou <zhouran10@h-partners.com>
As dmac is already resolved in kernel while creating AH, there is no
need to repeat the resolving in userspace. Prioritizes getting dmac
from kernel driver, unless kernel driver didn't response one.
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Ran Zhou <zhouran10@h-partners.com>
For RDMA over UBLink, MAC Layer if replaced by UBLink, and thus the
MAC addr is not nedded. So skip the MAC addr resolving for this mode.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8A08Z
Compared with normal doorbell, using record doorbell can shorten the
process of ringing the doorbell and reduce the latency.
Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Ran Zhou <zhouran10@h-partners.com>
In order to improve performance, we allow user-mode drivers to use a
larger page size to allocate WQE buffers, thereby reducing the latency
introduced by HW page switching. User-mode drivers will be allowed to
allocate WQE buffers between 4K to system page size. During
ibv_create_qp(), the driver will dynamically select the appropriate page
size based on ibv_qp_cap, thus reducing memory consumption while improving
performance.
Signed-off-by: Ran Zhou <zhouran10@h-partners.com>
1.libhns: Support reporting wc as software mode
2.libhns: return error when post send in reset state
3.libhns: separate the initialization steps of lock
4.libhns: assign doorbell to zero when allocate it
5.libhns: Fix missing reset notification
Signed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
According to Annex17_RoCEv2 (A17.4.5.2), for RoCEv2 UD, a CQE should
carry a flag that indicates if the received frame is an IPv4, IPv6 or
RoCE packet. But currently, the values of the flag corresponding to
these packet types haven't been defined yet in WC.
In UCX, 'sl' in ibv_wc for UD is used as the packet type flag, and the
packet type values have already been defined in the UCX patch of
ed28845b88
Therefore, to adapt UCX, add a create flag to hnsdv_create_qp() to allow
users to choose whether they use 'sl' in ibv_wc as service level or
packet type for UD. For the latter, obtain and translate the packet type
from CQE and fill it to 'sl' in ibv_wc.
Singed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
(cherry picked from commit e102d4c9aa2992c125b26ad5cc237ae002bc6541)
1.Fix the owner bit error of sq in new io
2.Fix incorrect post-send with direct wqe of
3.Add a judgment to the congestion control algorithm
Singed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
(cherry picked from commit 092143ba858a7aba0630fadd416faa2a4e7eaf06)
1. The hns hardware logic requires wr->num_sge to be 1 when
performing atomic operations. The code does not judge this
condition, and the current patch adds this constraint.
2. In the sq inline scenario, when num_sge in post_send is not 1, sge
array appears in the for loop without rotation and directly copy
out of bounds.
3. Currently local invalidate operation don't work properly.
Disable it for the time being.
HIP08 and HIP09 hardware does not support this feature, so
delete the associated code.
Signed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
Some Kunpeng SoCs do not support the DWQE through NEON
instructions. In this case, the IO path works normally,
but the performance will deteriorate.
For these SoCs that do not support NEON DWQE, they support
DWQE through SVE instructions. This patch supports SVE DWQE
to guarantee the performance of these SoCs. In addition, in
this scenario, DWQE only supports acceleration through SVE's
ldr and str instructions. Other load and store instructions
also cause performance degradation.
Signed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
Added the use of direct verbs to implement QP-level
user-configurable congestion control algorithms. Among them,
the user mode driver mainly provides interfaces for users to
choose, and the kernel mode driver is responsible for filling
the resources of different algorithms and providing the
supported algorithm types for user mode.
At the same time, provide a direct verbs interface for users to
query the type of congestion control algorithm.
Signed-off-by: Juan Zhou <zhoujuan51@h-partners.com>
Add an interface to the user space, which is used to receive
the kernel reset state. After receiving the reset flag, the
user space stops sending db.
Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
(cherry picked from commit 8b56ab8b70262183cac5995dcb395ec099cc89a4)
DCA(Dynamic context attachment) support many RC QPs to share the WQE
buffer in a memory pool, this help reducing the memory consumption
when there are many QPs are inactive.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
(cherry picked from commit b88a370b79cd9b93f9a587c1e4e0d9c89d0b1d1e)
These patches support running the roce function in hns roh mode
Signed-off-by: Guofeng Yue <yueguofeng@hisilicon.com>
(cherry picked from commit 648d17f1efa1ca1c458618421ab01a0c4b8872af)
(cherry picked from commit 08d265affcb38d014d69436b5200692612baa394)
Backport patches from rdma-core 41.1.
And bugfix patches reported by #I5Q3S5 has also been included.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
(cherry picked from commit 6f27f67e51b251ea5185fa61a635ab9fdb64d467)
Update rdma-core version from 35.1 to 41.0.
Version 41.0 is the latest version in community until
2022/7/27. It includes some new bugfixes and new features,
we choose this version to facilitate future development.
The patches added to this repo has already included in the
new version, so remove them.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
HIP06 is no longer supported. So, backport these patches from
rdma-core v41 to remove support for HIP06.
Signed-off-by: zhengfeng luo <luozhengfeng@h-partners.com>
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Add support for hns CQ_EX and all its dependent patches are also added.
Signed-off-by: zhengfeng luo <luozhengfeng@h-partners.com>
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
These patches are mainly related to IO operations.
Signed-off-by: zhengfeng luo <luozhengfeng@h-partners.com>
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
